2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2016 fenugrec <fenugrec users.sourceforge.net>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 # - Annotations are very crude and could be improved.
23 # - Annotate every nibble? Would give insight on interrupted shifts.
24 # - Annotate invalid "command" nibbles while SYNC==1?
26 import sigrokdecode as srd
28 class Decoder(srd.Decoder):
32 longname = 'Advanced User Debugger'
33 desc = 'Renesas/Hitachi Advanced User Debugger (AUD) protocol.'
38 {'id': 'audck', 'name': 'AUDCK', 'desc': 'AUD clock'},
39 {'id': 'naudsync', 'name': 'nAUDSYNC', 'desc': 'AUD sync'},
40 {'id': 'audata3', 'name': 'AUDATA3', 'desc': 'AUD data line 3'},
41 {'id': 'audata2', 'name': 'AUDATA2', 'desc': 'AUD data line 2'},
42 {'id': 'audata1', 'name': 'AUDATA1', 'desc': 'AUD data line 1'},
43 {'id': 'audata0', 'name': 'AUDATA0', 'desc': 'AUD data line 0'},
46 ('dest', 'Destination address'),
59 self.out_ann = self.register(srd.OUTPUT_ANN)
62 self.put(self.ss, self.samplenum, self.out_ann, data)
64 def find_clk_edge(self, clk, sync, datapins):
65 # Ignore sample if there's no edge.
66 if clk == self.oldclk:
69 # Ignore falling edges.
76 nib |= datapins[3-i] << i
78 # sync == 1: annotate if finished; update cmd.
79 # TODO: Annotate idle level (nibble = 0x03 && SYNC=1).
81 if (self.ncnt == self.nmax) and (self.nmax != 0):
82 # Done shifting an address: annotate.
83 self.putx([0, ['0x%08X' % self.addr]])
84 self.lastaddr = self.addr
87 self.addr = self.lastaddr
88 self.ss = self.samplenum
101 # sync == 0, valid cmd: start or continue shifting in nibbles.
104 self.addr &= ~(0x0F << (self.ncnt * 4))
106 self.addr |= nib << (self.ncnt * 4)
109 def decode(self, ss, es, data):
110 for (self.samplenum, pins) in data:
114 self.find_clk_edge(clk, sync, d)