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1 | ## |
2 | ## This file is part of the libsigrokdecode project. | |
3 | ## | |
4 | ## Copyright (C) 2020 Analog Devices Inc. | |
5 | ## | |
6 | ## This program is free software; you can redistribute it and/or modify | |
7 | ## it under the terms of the GNU General Public License as published by | |
8 | ## the Free Software Foundation; either version 3 of the License, or | |
9 | ## (at your option) any later version. | |
10 | ## | |
11 | ## This program is distributed in the hope that it will be useful, | |
12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ## GNU General Public License for more details. | |
15 | ## | |
16 | ## You should have received a copy of the GNU General Public License | |
17 | ## along with this program; if not, see <http://www.gnu.org/licenses/>. | |
18 | ## | |
19 | ||
20 | import sigrokdecode as srd | |
21 | ||
22 | channel_format = ['Channel %d', 'Ch %d', '%d'] | |
23 | input_voltage_format = ['%fV', '%fV', '%.6fV', '%.2fV'] | |
24 | ||
25 | class Decoder(srd.Decoder): | |
26 | api_version = 3 | |
27 | id = 'ltc242x' | |
28 | name = 'LTC242x' | |
29 | longname = 'Linear Technology LTC242x' | |
30 | desc = 'Linear Technology LTC2421/LTC2422 1-/2-channel 20-bit ADC.' | |
31 | license = 'gplv2+' | |
32 | inputs = ['spi'] | |
33 | outputs = [] | |
34 | tags = ['Display'] | |
35 | annotations = ( | |
36 | ('channel', 'Channel'), | |
37 | ('input', 'Input voltage'), | |
38 | ) | |
39 | annotation_rows = ( | |
40 | ('channel', 'Channel', (0,)), | |
41 | ('input', 'Input voltage', (1,)), | |
42 | ) | |
43 | options = ( | |
44 | {'id': 'ref', 'desc': 'Reference voltage', 'default': 1.5}, | |
45 | ) | |
46 | ||
47 | def __init__(self): | |
48 | self.reset() | |
49 | ||
50 | def reset(self): | |
51 | self.data = 0 | |
52 | self.ss, self.es = 0, 0 | |
53 | ||
54 | def start(self): | |
55 | self.out_ann = self.register(srd.OUTPUT_ANN) | |
56 | ||
57 | def handle_channel(self, data): | |
58 | channel = (data & (1 << 22)) >> 22 | |
59 | ann = [] | |
60 | for format in channel_format: | |
61 | ann.append(format % channel) | |
62 | ||
63 | self.put(self.ss, self.es, self.out_ann, [0, ann]) | |
64 | ||
65 | def handle_input_voltage(self, data): | |
66 | input_voltage = data & 0x3FFFFF | |
67 | input_voltage = -(2**21 - input_voltage) | |
68 | input_voltage = (input_voltage / 0xfffff) * self.options['ref'] | |
69 | ann = [] | |
70 | for format in input_voltage_format: | |
71 | ann.append(format % input_voltage) | |
72 | ||
73 | self.put(self.ss, self.es, self.out_ann, [1, ann]) | |
74 | ||
75 | def decode(self, ss, es, data): | |
76 | ptype = data[0] | |
77 | ||
78 | if ptype == 'CS-CHANGE': | |
79 | cs_old, cs_new = data[1:] | |
80 | if cs_old is not None and cs_old == 0 and cs_new == 1: | |
81 | self.es = es | |
82 | self.data >>= 1 | |
83 | self.handle_channel(self.data) | |
84 | self.handle_input_voltage(self.data) | |
85 | ||
86 | self.data = 0 | |
87 | elif cs_old is not None and cs_old == 1 and cs_new == 0: | |
88 | self.ss = ss | |
89 | ||
90 | elif ptype == 'BITS': | |
91 | miso = data[2] | |
92 | for bit in reversed(miso): | |
93 | self.data = self.data | bit[0] | |
94 | ||
95 | self.data <<= 1 |