projects / libsigrokdecode.git / blame
| Commit | Line | Data |
|---|---|---|
| 2ab416c2 JH |
1 | ## |
| 2 | ## This file is part of the sigrok project. | |
| 3 | ## | |
| 4 | ## Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk> | |
| 5 | ## | |
| 6 | ## This program is free software; you can redistribute it and/or modify | |
| 7 | ## it under the terms of the GNU General Public License as published by | |
| 8 | ## the Free Software Foundation; either version 2 of the License, or | |
| 9 | ## (at your option) any later version. | |
| 10 | ## | |
| 11 | ## This program is distributed in the hope that it will be useful, | |
| 12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | ## GNU General Public License for more details. | |
| 15 | ## | |
| 16 | ## You should have received a copy of the GNU General Public License | |
| 17 | ## along with this program; if not, write to the Free Software | |
| 18 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
| 19 | ## | |
| 20 | ||
| 21 | # I2S protocol decoder | |
| 22 | ||
| 23 | import sigrokdecode as srd | |
| 24 | ||
| 25 | # Annotation formats | |
| 26 | ANN_HEX = 0 | |
| 27 | ||
| 28 | class Decoder(srd.Decoder): | |
| 29 | api_version = 1 | |
| 30 | id = 'i2s' | |
| 31 | name = 'I2S' | |
| 32 | longname = 'Integrated Interchip Sound' | |
| 33 | desc = 'I2S is an electrical serial bus interface standard used ' \ | |
| 34 | 'for connecting digital audio devices together.' | |
| 35 | license = 'gplv2+' | |
| 36 | inputs = ['logic'] | |
| 37 | outputs = ['i2s'] | |
| 38 | probes = [ | |
| 39 | {'id': 'sck', 'name': 'SCK', 'desc': 'Bit clock line'}, | |
| 40 | {'id': 'ws', 'name': 'WS', 'desc': 'Word select line'}, | |
| 41 | {'id': 'sd', 'name': 'SD', 'desc': 'Serial Data line'}, | |
| 42 | ] | |
| 43 | annotations = [ | |
| 44 | ['ASCII', 'Annotations in ASCII format'], | |
| 45 | ] | |
| 46 | ||
| 47 | def __init__(self, **kwargs): | |
| 48 | self.oldsck = 1 | |
| 49 | self.oldws = 1 | |
| 50 | self.bitcount = 0 | |
| 51 | self.data = 0 | |
| 52 | self.samplesreceived = 0 | |
| 53 | self.start_sample = None | |
| 54 | self.samplenum = -1 | |
| 55 | ||
| 56 | def start(self, metadata): | |
| 57 | self.out_proto = self.add(srd.OUTPUT_PROTO, 'i2s') | |
| 58 | self.out_ann = self.add(srd.OUTPUT_ANN, 'i2s') | |
| 59 | ||
| 60 | def report(self): | |
| 61 | return 'I2S: %d samples received' % self.samplesreceived | |
| 62 | ||
| 63 | def decode(self, ss, es, data): | |
| 64 | for samplenum, (sck, ws, sd) in data: | |
| 65 | ||
| 66 | # Ignore sample if the bit clock hasn't changed. | |
| 67 | if sck == self.oldsck: | |
| 68 | continue | |
| 69 | ||
| 70 | self.oldsck = sck | |
| 71 | if sck == 0: # Ignore the falling clock edge | |
| 72 | continue | |
| 73 | ||
| 74 | self.data = (self.data << 1) | sd | |
| 75 | self.bitcount += 1 | |
| 76 | ||
| 77 | # This was not the LSB unless WS has flipped | |
| 78 | if ws == self.oldws: | |
| 79 | continue | |
| 80 | ||
| 81 | # Only submit the sample, if we received the beginning of it | |
| 82 | if self.start_sample != None: | |
| 83 | self.samplesreceived += 1 | |
| 84 | self.put(self.start_sample, self.samplenum, self.out_proto, | |
| 85 | ['data', self.data]) | |
| 86 | self.put(self.start_sample, self.samplenum, self.out_ann, | |
| 87 | [ANN_HEX, ['%s %d-bits: 0x%08x' % ('L' if self.oldws else 'R', | |
| 88 | self.bitcount, self.data)]]) | |
| 89 | ||
| 90 | # Reset decoder state. | |
| 91 | self.data = 0 | |
| 92 | self.bitcount = 0 | |
| 93 | self.start_sample = self.samplenum | |
| 94 | ||
| 95 | self.oldws = ws | |
| 96 |