static const int hwcaps[] = {
SR_HWCAP_LOGIC_ANALYZER,
SR_HWCAP_SAMPLERATE,
- SR_HWCAP_TRIGGER_SLOPE,
- SR_HWCAP_HORIZ_TRIGGERPOS,
-// SR_HWCAP_CAPTURE_RATIO,
+ SR_HWCAP_TRIGGER_SLOPE,
+ SR_HWCAP_HORIZ_TRIGGERPOS,
+// SR_HWCAP_CAPTURE_RATIO,
SR_HWCAP_LIMIT_SAMPLES,
-// SR_HWCAP_RLE,
+// SR_HWCAP_RLE,
0,
};
sr_err("Driver context malloc failed.");
return SR_ERR_MALLOC;
}
+
drvc->sr_ctx = sr_ctx;
di->priv = drvc;
static GSList *hw_scan(GSList *options)
{
- int i;
+ int i;
+ GSList *devices = NULL;
+ const char *conn = NULL;
+ const char *serialcomm = NULL;
+ GSList *l;
+ struct sr_hwopt *opt;
+ struct udev *udev;
(void)options;
- GSList *devices = NULL;
- const char* conn = NULL;
- const char* serialcomm = NULL;
- GSList *l;
for (l = options; l; l = l->next) {
- struct sr_hwopt* opt = l->data;
+ opt = l->data;
switch (opt->hwopt) {
case SR_HWOPT_CONN:
conn = opt->value;
}
}
if (!conn)
- conn = SERIALCONN;
+ conn = SERIALCONN;
if (serialcomm == NULL)
serialcomm = SERIALCOMM;
- struct udev *udev = udev_new();
+ udev = udev_new();
if (!udev) {
sr_err("Failed to initialize udev.");
}
+
struct udev_enumerate *enumerate = udev_enumerate_new(udev);
udev_enumerate_add_match_subsystem(enumerate, "usb-serial");
udev_enumerate_scan_devices(enumerate);
struct udev_list_entry *devs = udev_enumerate_get_list_entry(enumerate);
struct udev_list_entry *dev_list_entry;
- for (dev_list_entry = devs;
- dev_list_entry != NULL;
- dev_list_entry = udev_list_entry_get_next(dev_list_entry))
- {
+ for (dev_list_entry = devs;
+ dev_list_entry != NULL;
+ dev_list_entry = udev_list_entry_get_next(dev_list_entry)) {
const char *syspath = udev_list_entry_get_name(dev_list_entry);
- struct udev_device *dev = udev_device_new_from_syspath(udev, syspath);
+ struct udev_device *dev =
+ udev_device_new_from_syspath(udev, syspath);
const char *sysname = udev_device_get_sysname(dev);
- struct udev_device *parent = udev_device_get_parent_with_subsystem_devtype(
- dev, "usb", "usb_device");
+ struct udev_device *parent =
+ udev_device_get_parent_with_subsystem_devtype(dev, "usb",
+ "usb_device");
if (!parent) {
sr_err("Unable to find parent usb device for %s",
continue;
}
- const char *idVendor = udev_device_get_sysattr_value(parent, "idVendor");
- const char *idProduct = udev_device_get_sysattr_value(parent, "idProduct");
+ const char *idVendor =
+ udev_device_get_sysattr_value(parent, "idVendor");
+ const char *idProduct =
+ udev_device_get_sysattr_value(parent, "idProduct");
if (strcmp(USB_VENDOR, idVendor)
- || strcmp(USB_PRODUCT, idProduct))
+ || strcmp(USB_PRODUCT, idProduct))
continue;
- const char* iSerial = udev_device_get_sysattr_value(parent, "serial");
- const char* iProduct = udev_device_get_sysattr_value(parent, "product");
+ const char *iSerial =
+ udev_device_get_sysattr_value(parent, "serial");
+ const char *iProduct =
+ udev_device_get_sysattr_value(parent, "product");
- char path[32];
+ char path[32];
snprintf(path, sizeof(path), "/dev/%s", sysname);
- conn = path;
+ conn = path;
size_t s = strcspn(iProduct, " ");
- char product[32];
- char manufacturer[32];
+ char product[32];
+ char manufacturer[32];
if (s > sizeof(product) ||
- strlen(iProduct) - s > sizeof(manufacturer)) {
- sr_err("Could not parse iProduct: %s.", iProduct);
+ strlen(iProduct) - s > sizeof(manufacturer)) {
+ sr_err("Could not parse iProduct: %s.", iProduct);
continue;
}
strncpy(product, iProduct, s);
product[s] = 0;
strcpy(manufacturer, iProduct + s + 1);
-
- //Create the device context and set its params
- struct dev_context *devc;
- if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
- sr_err("Device context malloc failed.");
- return devices;
- }
-
- if (mso_parse_serial(iSerial, iProduct, devc) != SR_OK) {
- sr_err("Invalid iSerial: %s.", iSerial);
- g_free(devc);
- return devices;
- }
-
- char hwrev[32];
- sprintf(hwrev, "r%d", devc->hwrev);
- devc->ctlbase1 = 0;
- devc->protocol_trigger.spimode = 0;
- for (i = 0; i < 4; i++) {
- devc->protocol_trigger.word[i] = 0;
- devc->protocol_trigger.mask[i] = 0xff;
- }
-
- if (!(devc->serial = sr_serial_dev_inst_new(conn, serialcomm)))
- {
- g_free(devc);
- return devices;
- }
-
- struct sr_dev_inst *sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
- manufacturer, product, hwrev);
-
- if (!sdi) {
- sr_err("Unable to create device instance for %s",
- sysname);
- sr_dev_inst_free(sdi);
- g_free(devc);
- return devices;
- }
-
- sdi->driver = di;
- sdi->priv = devc;
-
- for (i = 0; i < NUM_PROBES; i++) {
- struct sr_probe *probe;
- if (!(probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
- mso19_probe_names[i])))
- return 0;
- sdi->probes = g_slist_append(sdi->probes, probe);
- }
-
- //Add the driver
- struct drv_context *drvc = di->priv;
- drvc->instances = g_slist_append(drvc->instances, sdi);
- devices = g_slist_append(devices, sdi);
- }
+
+ //Create the device context and set its params
+ struct dev_context *devc;
+ if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
+ sr_err("Device context malloc failed.");
+ return devices;
+ }
+
+ if (mso_parse_serial(iSerial, iProduct, devc) != SR_OK) {
+ sr_err("Invalid iSerial: %s.", iSerial);
+ g_free(devc);
+ return devices;
+ }
+
+ char hwrev[32];
+ sprintf(hwrev, "r%d", devc->hwrev);
+ devc->ctlbase1 = 0;
+ devc->protocol_trigger.spimode = 0;
+ for (i = 0; i < 4; i++) {
+ devc->protocol_trigger.word[i] = 0;
+ devc->protocol_trigger.mask[i] = 0xff;
+ }
+
+ if (!(devc->serial = sr_serial_dev_inst_new(conn, serialcomm))) {
+ g_free(devc);
+ return devices;
+ }
+
+ struct sr_dev_inst *sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
+ manufacturer, product, hwrev);
+
+ if (!sdi) {
+ sr_err("Unable to create device instance for %s",
+ sysname);
+ sr_dev_inst_free(sdi);
+ g_free(devc);
+ return devices;
+ }
+
+ sdi->driver = di;
+ sdi->priv = devc;
+
+ for (i = 0; i < NUM_PROBES; i++) {
+ struct sr_probe *probe;
+ if (!(probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
+ mso19_probe_names[i])))
+ return 0;
+ sdi->probes = g_slist_append(sdi->probes, probe);
+ }
+
+ //Add the driver
+ struct drv_context *drvc = di->priv;
+ drvc->instances = g_slist_append(drvc->instances, sdi);
+ devices = g_slist_append(devices, sdi);
+ }
return devices;
}
static int hw_dev_open(struct sr_dev_inst *sdi)
{
+ int ret;
struct dev_context *devc;
devc = sdi->priv;
mso_check_trigger(devc->serial, &devc->trigger_state);
sr_dbg("Trigger state: 0x%x.", devc->trigger_state);
- int ret = mso_reset_adc(sdi);
+ ret = mso_reset_adc(sdi);
if (ret != SR_OK)
return ret;
mso_check_trigger(devc->serial, &devc->trigger_state);
sr_dbg("Trigger state: 0x%x.", devc->trigger_state);
- // ret = mso_reset_fsm(sdi);
- // if (ret != SR_OK)
- // return ret;
- // return SR_ERR;
+ // ret = mso_reset_fsm(sdi);
+ // if (ret != SR_OK)
+ // return ret;
+ // return SR_ERR;
return SR_OK;
}
}
static int hw_info_get(int info_id, const void **data,
- const struct sr_dev_inst *sdi)
+ const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
}
static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
- const void *value)
+ const void *value)
{
int ret;
-
struct dev_context *devc;
- devc = sdi->priv;
+ uint64_t num_samples, slope;
+ int trigger_pos;
+ float pos;
+
+ devc = sdi->priv;
if (sdi->status != SR_ST_ACTIVE)
return SR_ERR;
switch (hwcap) {
case SR_HWCAP_SAMPLERATE:
- return mso_configure_rate(sdi, *(const uint64_t *) value);
+ // FIXME
+ return mso_configure_rate(sdi, *(const uint64_t *)value);
ret = SR_OK;
break;
case SR_HWCAP_LIMIT_SAMPLES:
- {
- const uint64_t num_samples = *(const uint64_t *)value;
- if (num_samples < 1024)
- {
- sr_err("minimum of 1024 samples required");
- ret = SR_ERR_ARG;
-
- } else {
- devc->limit_samples = num_samples;
- sr_dbg("setting limit_samples to %i\n", num_samples);
- ret = SR_OK;
- }
- }
+ num_samples = *(uint64_t *)value;
+ if (num_samples < 1024) {
+ sr_err("minimum of 1024 samples required");
+ ret = SR_ERR_ARG;
+ } else {
+ devc->limit_samples = num_samples;
+ sr_dbg("setting limit_samples to %i\n",
+ num_samples);
+ ret = SR_OK;
+ }
break;
- case SR_HWCAP_CAPTURE_RATIO:
- ret = SR_OK;
+ case SR_HWCAP_CAPTURE_RATIO:
+ ret = SR_OK;
+ break;
+ case SR_HWCAP_TRIGGER_SLOPE:
+ slope = *(uint64_t *)value;
+ if (slope != SLOPE_NEGATIVE && slope != SLOPE_POSITIVE) {
+ sr_err("Invalid trigger slope");
+ ret = SR_ERR_ARG;
+ } else {
+ devc->trigger_slope = slope;
+ ret = SR_OK;
+ }
+ break;
+ case SR_HWCAP_HORIZ_TRIGGERPOS:
+ pos = *(float *)value;
+ if (pos < 0 || pos > 255) {
+ sr_err("Trigger position (%f) should be between 0 and 255.", pos);
+ ret = SR_ERR_ARG;
+ } else {
+ trigger_pos = (int)pos;
+ devc->trigger_holdoff[0] = trigger_pos & 0xff;
+ ret = SR_OK;
+ }
break;
- case SR_HWCAP_TRIGGER_SLOPE:
- {
- const uint64_t slope = *(const uint64_t *)value;
- if (slope != SLOPE_NEGATIVE && slope != SLOPE_POSITIVE)
- {
- sr_err("Invalid trigger slope");
- ret = SR_ERR_ARG;
- } else {
- devc->trigger_slope = slope;
- ret = SR_OK;
- }
- }
- break;
- case SR_HWCAP_HORIZ_TRIGGERPOS:
- {
- const float pos = *(const float *)value;
- if (pos < 0 || pos > 255) {
- sr_err("Trigger position (%f) should be between 0 and 255.", pos);
- ret = SR_ERR_ARG;
- } else {
- int trigger_pos = (int)pos;
- devc->trigger_holdoff[0] = trigger_pos&0xff;
- ret = SR_OK;
- }
- }
- break;
-
case SR_HWCAP_RLE:
- ret = SR_OK;
+ ret = SR_OK;
break;
default:
ret = SR_ERR;
+ break;
}
return ret;
}
static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
- void *cb_data)
+ void *cb_data)
{
struct sr_datafeed_packet *packet;
struct sr_datafeed_header *header;
struct sr_datafeed_meta_logic meta;
struct dev_context *devc;
int ret = SR_ERR;
-
-
+
devc = sdi->priv;
if (sdi->status != SR_ST_ACTIVE)
}
/* FIXME: No need to do full reconfigure every time */
-// ret = mso_reset_fsm(sdi);
-// if (ret != SR_OK)
-// return ret;
+// ret = mso_reset_fsm(sdi);
+// if (ret != SR_OK)
+// return ret;
/* FIXME: ACDC Mode */
devc->ctlbase1 &= 0x7f;
-// devc->ctlbase1 |= devc->acdcmode;
+// devc->ctlbase1 |= devc->acdcmode;
ret = mso_configure_rate(sdi, devc->cur_rate);
if (ret != SR_OK)
if (ret != SR_OK)
return ret;
-
ret = mso_configure_trigger(sdi);
if (ret != SR_OK)
return ret;
-
/* END of config hardware part */
- ret = mso_arm(sdi);
- if (ret != SR_OK)
- return ret;
+ ret = mso_arm(sdi);
+ if (ret != SR_OK)
+ return ret;
/* Start acquisition on the device. */
mso_check_trigger(devc->serial, &devc->trigger_state);
if (ret != SR_OK)
return ret;
- sr_source_add(devc->serial->fd, G_IO_IN, -1, mso_receive_data, cb_data);
+ sr_source_add(devc->serial->fd, G_IO_IN, -1, mso_receive_data, cb_data);
if (!(packet = g_try_malloc(sizeof(struct sr_datafeed_packet)))) {
sr_err("Datafeed packet malloc failed.");
return SR_ERR_MALLOC;
}
-
packet->type = SR_DF_HEADER;
packet->payload = (unsigned char *)header;
header->feed_version = 1;
meta.samplerate = devc->cur_rate;
meta.num_probes = NUM_PROBES;
sr_session_send(cb_data, packet);
-
+
g_free(header);
g_free(packet);
/* This stops acquisition on ALL devices, ignoring dev_index. */
static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
{
- /* Avoid compiler warnings. */
(void)cb_data;
stop_acquisition(sdi);
static struct sr_dev_driver *di = &link_mso19_driver_info;
SR_PRIV int mso_send_control_message(struct sr_serial_dev_inst *serial,
- uint16_t payload[], int n)
+ uint16_t payload[], int n)
{
int i, w, ret, s = n * 2 + sizeof(mso_head) + sizeof(mso_foot);
char *p, *buf;
return ret;
}
-
SR_PRIV int mso_configure_trigger(struct sr_dev_inst *sdi)
{
struct dev_context *devc = sdi->priv;
uint16_t threshold_value = mso_calc_raw_from_mv(devc);
+ threshold_value = 0x153C;
+ uint8_t trigger_config = 0;
- threshold_value = 0x153C;
- uint8_t trigger_config = 0;
-
- if (devc->trigger_slope)
- trigger_config |= 0x04; //Trigger on falling edge
+ if (devc->trigger_slope)
+ trigger_config |= 0x04; //Trigger on falling edge
switch (devc->trigger_outsrc) {
case 1:
- trigger_config |= 0x00; //Trigger pulse output
+ trigger_config |= 0x00; //Trigger pulse output
break;
case 2:
- trigger_config |= 0x08; //PWM DAC from the pattern generator buffer
+ trigger_config |= 0x08; //PWM DAC from the pattern generator buffer
break;
case 3:
- trigger_config |= 0x18; //White noise
+ trigger_config |= 0x18; //White noise
break;
}
switch (devc->trigger_chan) {
- case 0:
- trigger_config |= 0x00; //DSO level trigger //b00000000
- break;
- case 1:
- trigger_config |= 0x20; //DSO level trigger & width < trigger_width
- break;
- case 2:
- trigger_config |= 0x40; //DSO level trigger & width >= trigger_width
- break;
- case 3:
- trigger_config |= 0x60; //LA combination trigger
- break;
- }
-
- //Last bit of trigger config reg 4 needs to be 1 for trigger enable,
- //otherwise the trigger is not enabled
- if (devc->use_trigger)
- trigger_config |= 0x80;
+ case 0:
+ trigger_config |= 0x00; //DSO level trigger //b00000000
+ break;
+ case 1:
+ trigger_config |= 0x20; //DSO level trigger & width < trigger_width
+ break;
+ case 2:
+ trigger_config |= 0x40; //DSO level trigger & width >= trigger_width
+ break;
+ case 3:
+ trigger_config |= 0x60; //LA combination trigger
+ break;
+ }
+
+ //Last bit of trigger config reg 4 needs to be 1 for trigger enable,
+ //otherwise the trigger is not enabled
+ if (devc->use_trigger)
+ trigger_config |= 0x80;
uint16_t ops[18];
ops[0] = mso_trans(3, threshold_value & 0xff);
- //The trigger_config also holds the 2 MSB bits from the threshold value
+ //The trigger_config also holds the 2 MSB bits from the threshold value
ops[1] = mso_trans(4, trigger_config | (threshold_value >> 8) & 0x03);
ops[2] = mso_trans(5, devc->la_trigger);
ops[3] = mso_trans(6, devc->la_trigger_mask);
ops[5] = mso_trans(8, devc->trigger_holdoff[1]);
ops[6] = mso_trans(11,
- devc->dso_trigger_width / SR_HZ_TO_NS(devc->cur_rate));
+ devc->dso_trigger_width /
+ SR_HZ_TO_NS(devc->cur_rate));
/* Select the SPI/I2C trigger config bank */
ops[7] = mso_trans(REG_CTL2, (devc->ctlbase2 | BITS_CTL2_BANK(2)));
return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
}
-SR_PRIV inline uint16_t mso_calc_raw_from_mv(struct dev_context *devc)
+SR_PRIV inline uint16_t mso_calc_raw_from_mv(struct dev_context * devc)
{
return (uint16_t) (0x200 -
- ((devc->dso_trigger_voltage / devc->dso_probe_attn) /
- devc->vbit));
+ ((devc->dso_trigger_voltage / devc->dso_probe_attn) /
+ devc->vbit));
}
-
SR_PRIV int mso_parse_serial(const char *iSerial, const char *iProduct,
- struct dev_context *devc)
+ struct dev_context *devc)
{
unsigned int u1, u2, u3, u4, u5, u6;
- iProduct = iProduct;
- /* FIXME: This code is in the original app, but I think its
- * used only for the GUI */
- /* if (strstr(iProduct, "REV_02") || strstr(iProduct, "REV_03"))
- devc->num_sample_rates = 0x16;
- else
- devc->num_sample_rates = 0x10; */
-
+ iProduct = iProduct;
+ /* FIXME: This code is in the original app, but I think its
+ * used only for the GUI */
+ /* if (strstr(iProduct, "REV_02") || strstr(iProduct, "REV_03"))
+ devc->num_sample_rates = 0x16;
+ else
+ devc->num_sample_rates = 0x10; */
/* parse iSerial */
if (iSerial[0] != '4' || sscanf(iSerial, "%5u%3u%3u%1u%1u%6u",
- &u1, &u2, &u3, &u4, &u5, &u6) != 6)
+ &u1, &u2, &u3, &u4, &u5, &u6) != 6)
return SR_ERR;
devc->hwmodel = u4;
devc->hwrev = u5;
}
}
- if (ret != SR_OK)
+ if (ret != SR_OK)
sr_err("Unsupported rate.");
return ret;
}
-
-
-
-
-SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info)
+SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t * info)
{
uint16_t ops[] = { mso_trans(REG_TRIGGER, 0) };
int ret;
if (info == NULL || ret != SR_OK)
return ret;
-
- uint8_t buf = 0;
- if (serial_read(serial, &buf, 1) != 1) /* FIXME: Need timeout */
+ uint8_t buf = 0;
+ if (serial_read(serial, &buf, 1) != 1) /* FIXME: Need timeout */
ret = SR_ERR;
*info = buf;
SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data)
{
-
struct sr_datafeed_packet packet;
struct sr_datafeed_logic logic;
struct sr_dev_inst *sdi;
if (s <= 0)
return FALSE;
-
- /* Check if we triggered, then send a command that we are ready
- * to read the data */
- if (devc->trigger_state != MSO_TRIGGER_DATAREADY) {
- devc->trigger_state = in[0];
- if (devc->trigger_state == MSO_TRIGGER_DATAREADY) {
- mso_read_buffer(sdi);
- devc->buffer_n = 0;
- } else {
- mso_check_trigger(devc->serial, NULL);
- }
- return TRUE;
- }
+
+ /* Check if we triggered, then send a command that we are ready
+ * to read the data */
+ if (devc->trigger_state != MSO_TRIGGER_DATAREADY) {
+ devc->trigger_state = in[0];
+ if (devc->trigger_state == MSO_TRIGGER_DATAREADY) {
+ mso_read_buffer(sdi);
+ devc->buffer_n = 0;
+ } else {
+ mso_check_trigger(devc->serial, NULL);
+ }
+ return TRUE;
+ }
/* the hardware always dumps 1024 samples, 24bits each */
if (devc->buffer_n < 3072) {
for (i = 0; i < 1024; i++) {
/* FIXME: Need to do conversion to mV */
analog_out[i] = (devc->buffer[i * 3] & 0x3f) |
- ((devc->buffer[i * 3 + 1] & 0xf) << 6);
+ ((devc->buffer[i * 3 + 1] & 0xf) << 6);
logic_out[i] = ((devc->buffer[i * 3 + 1] & 0x30) >> 4) |
- ((devc->buffer[i * 3 + 2] & 0x3f) << 2);
+ ((devc->buffer[i * 3 + 2] & 0x3f) << 2);
}
packet.type = SR_DF_LOGIC;
logic.data = logic_out;
sr_session_send(cb_data, &packet);
- devc->num_samples += 1024;
+ devc->num_samples += 1024;
// Dont bother fixing this yet, keep it "old style"
/*
- packet.type = SR_DF_ANALOG;
- packet.length = 1024;
- packet.unitsize = sizeof(double);
- packet.payload = analog_out;
- sr_session_send(ctx->session_dev_id, &packet);
- */
-
- if (devc->limit_samples && devc->num_samples >= devc->limit_samples) {
- sr_info("Requested number of samples reached.");
- sdi->driver->dev_acquisition_stop(sdi, cb_data);
- }
-
- return TRUE;
+ packet.type = SR_DF_ANALOG;
+ packet.length = 1024;
+ packet.unitsize = sizeof(double);
+ packet.payload = analog_out;
+ sr_session_send(ctx->session_dev_id, &packet);
+ */
+
+ if (devc->limit_samples && devc->num_samples >= devc->limit_samples) {
+ sr_info("Requested number of samples reached.");
+ sdi->driver->dev_acquisition_stop(sdi, cb_data);
+ }
+
+ return TRUE;
}
SR_PRIV int mso_configure_probes(const struct sr_dev_inst *sdi)
int probe_bit, stage, i;
char *tc;
-
devc = sdi->priv;
- devc->la_trigger_mask = 0xFF; //the mask for the LA_TRIGGER (bits set to 0 matter, those set to 1 are ignored).
- devc->la_trigger = 0x00; //The value of the LA byte that generates a trigger event (in that mode).
- devc->dso_trigger_voltage = 3;
- devc->dso_probe_attn = 1;
- devc->trigger_outsrc = 0;
- devc->trigger_chan = 3; //LA combination trigger
- devc->use_trigger = FALSE;
+ devc->la_trigger_mask = 0xFF; //the mask for the LA_TRIGGER (bits set to 0 matter, those set to 1 are ignored).
+ devc->la_trigger = 0x00; //The value of the LA byte that generates a trigger event (in that mode).
+ devc->dso_trigger_voltage = 3;
+ devc->dso_probe_attn = 1;
+ devc->trigger_outsrc = 0;
+ devc->trigger_chan = 3; //LA combination trigger
+ devc->use_trigger = FALSE;
for (l = sdi->probes; l; l = l->next) {
probe = (struct sr_probe *)l->data;
if (!(probe->trigger))
continue;
- devc->use_trigger = TRUE;
+ devc->use_trigger = TRUE;
//Configure trigger mask and value.
for (tc = probe->trigger; *tc; tc++) {
devc->la_trigger_mask &= ~probe_bit;
- if (*tc == '1')
- devc->la_trigger |= probe_bit;
- }
- }
+ if (*tc == '1')
+ devc->la_trigger |= probe_bit;
+ }
+ }
return SR_OK;
}
-
-
-
#ifndef LIBSIGROK_HARDWARE_LINK_MSO19_PROTOCOL_H
#define LIBSIGROK_HARDWARE_LINK_MSO19_PROTOCOL_H
-#define USB_VENDOR "3195"
-#define USB_PRODUCT "f190"
-
#include <stdint.h>
#include <string.h>
#include <glib.h>
#define sr_warn(s, args...) sr_warn(DRIVER_LOG_DOMAIN s, ## args)
#define sr_err(s, args...) sr_err(DRIVER_LOG_DOMAIN s, ## args)
-#define NUM_PROBES 8
-#define NUM_TRIGGER_STAGES 4
-#define TRIGGER_TYPES "01" //the first r/f is used for the whole group
-#define SERIALCOMM "460800/8n1/flow=2"
-#define SERIALCONN "/dev/ttyUSB0"
-#define CLOCK_RATE SR_MHZ(100)
-#define MIN_NUM_SAMPLES 4
+#define USB_VENDOR "3195"
+#define USB_PRODUCT "f190"
+
+#define NUM_PROBES 8
+#define NUM_TRIGGER_STAGES 4
+#define TRIGGER_TYPES "01" //the first r/f is used for the whole group
+#define SERIALCOMM "460800/8n1/flow=2"
+#define SERIALCONN "/dev/ttyUSB0"
+#define CLOCK_RATE SR_MHZ(100)
+#define MIN_NUM_SAMPLES 4
#define MSO_TRIGGER_UNKNOWN '!'
#define MSO_TRIGGER_UNKNOWN1 '1'
#define MSO_TRIGGER_DATAREADY '6'
enum trigger_slopes {
- SLOPE_POSITIVE = 0,
- SLOPE_NEGATIVE,
+ SLOPE_POSITIVE = 0,
+ SLOPE_NEGATIVE,
};
/* Structure for the pattern generator state */
uint8_t config;
/* Samples buffer */
uint8_t buffer[1024];
- /* Input/output configuration for the samples buffer (?)*/
+ /* Input/output configuration for the samples buffer (?) */
uint8_t io[1024];
/* Number of loops for the pattern generator */
uint8_t loops;
uint8_t hwmodel;
uint8_t hwrev;
struct sr_serial_dev_inst *serial;
-// uint8_t num_sample_rates;
+// uint8_t num_sample_rates;
/* calibration */
double vbit;
uint16_t dac_offset;
uint16_t offset_range;
- uint64_t limit_samples;
- uint64_t num_samples;
+ uint64_t limit_samples;
+ uint64_t num_samples;
/* register cache */
uint8_t ctlbase1;
uint8_t ctlbase2;
uint8_t la_threshold;
uint64_t cur_rate;
uint8_t dso_probe_attn;
- int8_t use_trigger;
+ int8_t use_trigger;
uint8_t trigger_chan;
uint8_t trigger_slope;
uint8_t trigger_outsrc;
};
SR_PRIV int mso_parse_serial(const char *iSerial, const char *iProduct,
- struct dev_context *ctx);
-SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info);
+ struct dev_context *ctx);
+SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial,
+ uint8_t * info);
SR_PRIV int mso_reset_adc(struct sr_dev_inst *sdi);
SR_PRIV int mso_clkrate_out(struct sr_serial_dev_inst *serial, uint16_t val);
SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate);
SR_PRIV int mso_configure_probes(const struct sr_dev_inst *sdi);
SR_PRIV void stop_acquisition(const struct sr_dev_inst *sdi);
-///////////////////////
-//
-
/* serial protocol */
#define mso_trans(a, v) \
(((v) & 0x3f) | (((v) & 0xc0) << 6) | (((a) & 0xf) << 8) | \
#define REG_CTL1 14
/* bank 2 registers (SPI/I2C protocol trigger) */
-#define REG_PT_WORD(x) (x)
-#define REG_PT_MASK(x) (x+4)
-#define REG_PT_SPIMODE 8
+#define REG_PT_WORD(x) (x)
+#define REG_PT_MASK(x) (x + 4)
+#define REG_PT_SPIMODE 8
/* bits - REG_CTL1 */
-#define BIT_CTL1_RESETFSM (1 << 0)
-#define BIT_CTL1_ARM (1 << 1)
-#define BIT_CTL1_ADC_UNKNOWN4 (1 << 4) /* adc enable? */
-#define BIT_CTL1_RESETADC (1 << 6)
-#define BIT_CTL1_LED (1 << 7)
+#define BIT_CTL1_RESETFSM (1 << 0)
+#define BIT_CTL1_ARM (1 << 1)
+#define BIT_CTL1_ADC_UNKNOWN4 (1 << 4) /* adc enable? */
+#define BIT_CTL1_RESETADC (1 << 6)
+#define BIT_CTL1_LED (1 << 7)
/* bits - REG_CTL2 */
-#define BITS_CTL2_BANK(x) (x & 0x3)
-#define BIT_CTL2_SLOWMODE (1 << 5)
+#define BITS_CTL2_BANK(x) (x & 0x3)
+#define BIT_CTL2_SLOWMODE (1 << 5)
struct rate_map {
uint32_t rate;
};
static struct rate_map rate_map[] = {
- { SR_MHZ(200), 0x0205, 0 },
- { SR_MHZ(100), 0x0105, 0 },
- { SR_MHZ(50), 0x0005, 0 },
- { SR_MHZ(20), 0x0303, 0 },
- { SR_MHZ(10), 0x0308, 0 },
- { SR_MHZ(5), 0x030c, 0 },
- { SR_MHZ(2), 0x0330, 0 },
- { SR_MHZ(1), 0x0362, 0 },
- { SR_KHZ(500), 0x03c6, 0 },
- { SR_KHZ(200), 0x07f2, 0 },
- { SR_KHZ(100), 0x0fe6, 0 },
- { SR_KHZ(50), 0x1fce, 0 },
- { SR_KHZ(20), 0x4f86, 0 },
- { SR_KHZ(10), 0x9f0e, 0 },
- { SR_KHZ(5), 0x03c7, 0x20 },
- { SR_KHZ(2), 0x07f3, 0x20 },
- { SR_KHZ(1), 0x0fe7, 0x20 },
- { 500, 0x1fcf, 0x20 },
- { 200, 0x4f87, 0x20 },
- { 100, 0x9f0f, 0x20 },
+ { SR_MHZ(200), 0x0205, 0 },
+ { SR_MHZ(100), 0x0105, 0 },
+ { SR_MHZ(50), 0x0005, 0 },
+ { SR_MHZ(20), 0x0303, 0 },
+ { SR_MHZ(10), 0x0308, 0 },
+ { SR_MHZ(5), 0x030c, 0 },
+ { SR_MHZ(2), 0x0330, 0 },
+ { SR_MHZ(1), 0x0362, 0 },
+ { SR_KHZ(500), 0x03c6, 0 },
+ { SR_KHZ(200), 0x07f2, 0 },
+ { SR_KHZ(100), 0x0fe6, 0 },
+ { SR_KHZ(50), 0x1fce, 0 },
+ { SR_KHZ(20), 0x4f86, 0 },
+ { SR_KHZ(10), 0x9f0e, 0 },
+ { SR_KHZ(5), 0x03c7, 0x20 },
+ { SR_KHZ(2), 0x07f3, 0x20 },
+ { SR_KHZ(1), 0x0fe7, 0x20 },
+ { SR_HZ(500), 0x1fcf, 0x20 },
+ { SR_HZ(200), 0x4f87, 0x20 },
+ { SR_HZ(100), 0x9f0f, 0x20 },
};
/* FIXME: Determine corresponding voltages */
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