HSA Logic
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| Status | in progress |
|---|---|
| Source code | hardware/hsa-tple |
| Channels | 8 (24 planned) |
| Samplerate | 6.25 MHz |
| Samplerate (state) | ? |
| Triggers | none (SW-only) |
| Min/max voltage | 3.3V; 5.0V |
| Threshold voltage | ? |
| Memory | 1 MB (245K*16), 262144 samples |
| Compression | RLE |
| Website | [] |
The HSA Logic is a USB-based, 8-channel logic analyzer with 6.25 MHz sampling rate. It is an open-hardware / open-source design. Both hardware and software have been developed at Hochschule Augsburg so far.
Hardware
- CPLD: Altera Max II with 240 logic elements (programmed in VHDL)
- microcontroller: Atmel ATmega32u4 (programmed in C)
- 2x RAM organised as 256K*16
- I/O drivers supporting 5V and 3V as input voltage
Photos
TODO.
Firmware
TODO.
Protocol
TODO.
Resources
TODO.