GreatFET One
 | |
| Status | in progress |
|---|---|
| Channels | 8 |
| Samplerate | 204MHz max |
| Min/max voltage | 3.3V |
| Compression | No (packing) |
| Website | greatscottgadgets.com |
The GreatFET One is a USB connected 8 channel logic analyser with 204MHz maximum samplerate and no local sample memory. Data acquisition employs the SGPIO machinery of the NXP LPC4330 microcontroller. The GreatFET's firmware is also available for other boards which use the same MCU. The device firmware is known for its efficient use of USB communication, streaming capabilities to the host are similar to HackRF One. Transfer rates are a little shy of 42MB/s. The greatfet sigrok driver supports the operation of these devices in logic analyzer mode.
The GreatFET device is exclusively used in continuous mode where sample data gets streamed to the host while the acquisition is executing. With 8 channels enabled, sample rates up to 40.8 MHz are supported. Higher samplerates are available when the number of channels gets reduced. The device firmware always captures channel counts that are a power of two. In other words when three channels are enabled, then data is captured for four channels. This is important to keep in mind, as the product of samplerate and channel count must not exceed the USB2.0 bandwidth. The limit is near 336Mbps (depends on the host computer's capabilities).
"Seemingly odd" samplerates are the result of an unusual (rather: unexpected to users) base clock and integer dividers. Users can specify arbitrary desired samplerates, the device firmware will determine the minimum samplerate which satisfies this user request.
| channels count | max samplerate |
|---|---|
| 8-5 | 40.8 MHz |
| 4-3 | 68 MHz |
| 2 | 102 MHz |
| 1 | 204 MHz |
Using more than 8 channels requires coordination of multiple pin banks (and their SGPIO activity) within the device firmware, is said to be under construction, and currently is not supported by sigrok. If you are aware of requirements for this feature, and a working combination of the involved components, please report them so that the sigrok device driver could get adjusted to support up to 16 channels. It is understood that the use of 9..16 channels will result in a maximum samplerate of 20.4MHz to allow for continuous streaming to the host.
See GreatFET One/Info for more details (USB identification).
Getting firmware, example use (vendor software)
It is recommended to use at least v2021.2.1 firmware. This version was used for the initial development of sigrok support and is known to work well.
The simplest method of checking the device's operation and upgrading its firmware is to use the greatfet host software. Which is available as a Python package, and makes the gf(1) utility available. This also happens to verify permissions to access the USB device.
$ pip install greatfet $ gf (see available subcommands) $ gf info $ gf firmware --help $ gf firmware --autoflash $ gf info
The greatfet host software ships with firmware images that correspond to the host's software version. Which ensures proper operation of the device under the host's software control. The "auto flash" feature writes that matching firmware to the device. Other options are available to write arbitrary images and thus firmware versions, as well as backup a device's firmware.
The greatfet host software demonstrates the GreatFET device's several modes of operation (as serial or parallel bridge, JTAG adapter, et al), allows versatile use of the device in interactive ways as well as scripted. It also covers operation as a logic analyzer, which can either store raw data in files on disk, or optionally can create archives in sigrok's native format.
$ gf logic --help $ gf logic -p capture.sr -f 34M (executes until CTRL-C terminates) $ sigrok-cli -i capture.sr --show $ pulseview capture.sr &
See the read the docs pages for details on using the software. Especially the Logic Analyzer mode of operation and its pinout. Also greatfet_logic for identical information on the first 8 channels.
The software resides in a github repo. This covers the device firmware as well as the host software.
Example use (sigrok software)
Make sure a compatible firmware version is loaded and that you have permissions to access the USB device.
Scan for the device(s), see their USB connection details and serial number(s).
$ sigrok-cli -d greatfet --scan greatfet:conn=3.85 - Great Scott Gadgets GreatFET v2021.2.1 [S/N: 000057cc67e630223f57] with 8 channels: SGPIO0 SGPIO1 SGPIO2 SGPIO3 SGPIO4 SGPIO5 SGPIO6 SGPIO7
See the device's parameters and its current configuration. Optionally specify connection details or serial numbers to disambiguate.
$ sigrok-cli -d greatfet:conn=3.85 --show
(or)
$ sigrok-cli -d greatfet:conn=sn=30223f57 --show
Driver functions:
Logic analyzer
Scan options:
conn
probe_names
greatfet:conn=3.85 - Great Scott Gadgets GreatFET v2021.2.1 [S/N: 000057cc67e630223f57] with 8 channels: SGPIO0 SGPIO1 SGPIO2 SGPIO3 SGPIO4 SGPIO5 SGPIO6 SGPIO7
Channel groups:
Logic: channels SGPIO0 SGPIO1 SGPIO2 SGPIO3 SGPIO4 SGPIO5 SGPIO6 SGPIO7
Supported configuration options across all channel groups:
continuous: on (current), off
conn: 3.85 (current)
samplerate - supported samplerates:
1 MHz
2 MHz
4 MHz
8.5 MHz
10.2 MHz
12 MHz
17 MHz
20.4 MHz
25.5 MHz
34 MHz (current)
40.8 MHz
51 MHz
68 MHz
102 MHz
204 MHz
limit_samples: 0 (current)
limit_time: 0 (current)
Capture some data, use the device interactively.
$ sigrok-cli -d greatfet --config samplerate=40M --time 1000 -o capture.sr $ sigrok-cli -i capture.sr --show
$ pulseview -d greatfet &
Hardware
The GreatFET One is also code named Azalea, and is based on the NXP LPC4330 microcontroller. See the hardware git repo for design documents. It's all open hardware (BSD 3-clause).
"Shields", "HATs", "capes", etc are referred to as neighbours in the GreatFET ecosystem.
- Foxglove is a level shifting neighbour.
- Rhododendron sniffs USB (two wires, high samplerates)
Photos
top
bottom
capturing USB and UART
Resources
- Great Scott Gadgets GreatFET product page
- hardware git repo and firmware and host software repo
- read the docs pages, with logic analyzer pinout and logic analyzer pinout, with a pinout sticker
