XZL_Studio DX
Status | planned |
---|---|
Source code | fx2lafw |
Channels | 16 + 2 |
Samplerate | 24MHz |
Samplerate (state) | — |
Triggers | none (SW-only) |
Min/max voltage |
Digital 0 — 5.4V Analog ±10V |
Threshold voltage | Fixed: VIH=1.4V, VIL=0.8V |
Memory | none |
Compression | none |
Website | hotmcu.com |
The XZL_Studio DX is a USB-based, 16-channel logic analyzer with up to 24MHz sampling rate, and with 2 additional analog channels.
It is a clone of the CWAV USBee DX.
See XZL_Studio DX/Info for some more details (such as lsusb -vvv output) on the device.
Note: Due to the fact that this device has two FX2 chips behind a USB hub inside, this will need extra code to enumerate correctly in sigrok. Do you have this device? Let us know!
Hardware
- Main chip: 2x Cypress CY7C68013A-56LTXC (FX2LP)
- Analog-to-Digital converter: 2x Texas Instruments TLC5510I (SO 24pin package)
- I2C EEPROM: Atmel ATML H136 24C02C M Y, place for second EEPROM chip.
- USB 2.0 Hub: SMSC USB2512A (QFN 36-pin package)
- Low-dropout voltage regulator: Advanced Monolithic Systems AMS1117-3.3
- CMOS Voltage Converter: 2x 7660 AIBAZ V01828A
- Crystal: 24MHz
- ...
Two jumpers:
- P1 jumper - WRITE PROTECT, Connects WP EEPROM pin [7] to Vcc. If pin is closed, Write Protection is enabled.
- P3 jumper - EEPROM CONNECTION, connects SDA EEPROM pin [5] to some pin on second CY7C68013A (if open there is no connection)
Extra info,
It looks that place for second eeprom is designed as backup memory. If P4 is closed, and P3 is open, then only spare memory is connected.
Photos
Protocol
Since we use the open-source fx2lafw firmware for this device, we don't need to know the protocol.
Resources
TODO.