Protocol decoder:arm_etmv3
| Name | ARM Embedded Trace Macrocell |
|---|---|
| Description | Instruction-level trace from ARM processors |
| Status | supported |
| License | GPLv2+ |
| Source code | decoders/arm_etmv3 |
| Input | uart |
| Output | arm_etmv3 |
| Options | objdump, objdump_opts, elffile, branch_enc |
This is one of three closely related protocol decoders: arm_tpiu, arm_itm, arm_etmv3.
ARM ETM (Embedded Trace Macroblock) allows tracing of every instruction executed on the CPU. Currently only ETM version 3 (the newest version, present in Cortex-M3 and other ARMv7-m) is supported.
ARM ETMv3 protocol
The ARM ETMv3 protocol consists of variable length packets of 1-10 bytes. The first byte of the packet identifies the packet type. Typical packets are Branch to address xxxx and N instructions executed or N instructions failed condition codes. These can be used to follow instruction-by-instruction the flow of the program code.
The ETM unit can be configured to either output all branches, or only indirect branches. In the latter case, an .elf image is required to follow the code execution. The protocol decoder uses arm-none-eabi-objdump to disassemble the .elf image in order to obtain the branch addresses.
More information on ETM protocol is found in ARM IHI0014: ETM Architecture Specification, section ETMv3 Signal Protocol.
Example code
Example code for configuring STM32F1 to output a debug trace is available here: [ https://github.com/PetteriAimonen/STM32_Trace_Example ]
It outputs ITM trace as TPIU stream 1, and ETMv3 trace as TPIU stream 2.
Example configuration for PulseView:
