Difference between revisions of "HP 1662C"
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== Photos == | == Photos == | ||
[[File:HP1662C.jpeg]] | [[File:HP1662C.jpeg|upright]] | ||
== Protocol == | == Protocol == | ||
Revision as of 23:30, 12 September 2014
The HP 1662C is a big old logic analyzer.
Hardware
68 Channels at 100 MHz state/500 MHz timing. 4k/8k sample depth per channel.
Photos
Protocol
See the programmers guide: http://literature.cdn.keysight.com/litweb/pdf/01660-97024.pdf