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* '''Hardware support'''. Supports a wide variety of logic analyzer hardware from various vendors with different capabilities. | * '''Hardware support'''. Supports a wide variety of logic analyzer hardware from various vendors with different capabilities. | ||
* '''Cross-platform'''. Works on Linux, Mac OS X and Windows, and on architectures including x86, ARM, Sparc and PowerPC. | * '''Cross-platform'''. Works on Linux, Mac OS X and Windows, and on architectures including x86, ARM, Sparc and PowerPC. | ||
* '''Scriptable'''. Extendable with protocol decoders and analyzers written in | * '''Scriptable'''. Extendable with protocol decoders and analyzers written in Python. | ||
* '''Format support'''. Supports various input and output formats (raw, CSV, gnuplot, [http://en.wikipedia.org/wiki/Value_change_dump VCD], others). | * '''Format support'''. Supports various input and output formats (raw, CSV, gnuplot, [http://en.wikipedia.org/wiki/Value_change_dump VCD], others). | ||
Revision as of 19:09, 26 March 2010
The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source logic analyzer software that supports various (usually USB-based) logic analyzer hardware products. The code is licensed under the terms of the GNU GPL.
Design goals
- Hardware support. Supports a wide variety of logic analyzer hardware from various vendors with different capabilities.
- Cross-platform. Works on Linux, Mac OS X and Windows, and on architectures including x86, ARM, Sparc and PowerPC.
- Scriptable. Extendable with protocol decoders and analyzers written in Python.
- Format support. Supports various input and output formats (raw, CSV, gnuplot, VCD, others).
Supported hardware
Saleae Logic
(supported)- Open workbench logic sniffer.jpg
Openbench Logic Sniffer
(work in progress) CWAV USBee SX
(coming up)Braintechnology USB-LPS
(planned)Zeroplus Logic Cube
(planned)- Buspirate v3.jpg
Buspirate
(planned)
Development
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Documentation |
Getting in touch
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