Difference between revisions of "Kingst LA2016"
(changed trigger description to level and one edge trigger) |
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| image = [[File:Kingst la2016 mugshot.png|180px]] | | image = [[File:Kingst la2016 mugshot.png|180px]] | ||
| name = Kingst LA2016 | | name = Kingst LA2016 | ||
| status = | | status = in progress | ||
| source_code_dir = kingst-la2016 | | source_code_dir = kingst-la2016 | ||
| channels = 16 | | channels = 16 | ||
| samplerate = 200MHz | | samplerate = 200MHz max. | ||
| samplerate_state = | | samplerate_state = State analysis not supported | ||
| triggers = | | triggers = Level (multiple channels)<br/>Edge (one channel) | ||
| voltages = -50V — 50V | | voltages = -50V — 50V | ||
| threshold = | | threshold = Configurable:<br/>-4V—4V, min step 0.01V | ||
| memory = 128MByte DDR2 SDRAM | | memory = 128MByte DDR2 SDRAM<br/>40M—10G samples | ||
| compression = | | compression = Yes | ||
| website = [http://www.qdkingst.com/en | | website = [http://www.qdkingst.com/en qdkingst.com] | ||
}} | }} | ||
'''5th March 2021:'''<br/> | |||
'''This device was previously marked as supported, however, some users are reporting issues with this device and we are working on some driver changes.''' | |||
The '''Kingst LA2016''' is a USB-based, 16-channel logic analyser with 200MHz maximum sampling rate. | |||
The current vendor is "Qingdao Kingst Electronics Co., Ltd." but older models appear to be branded "Jiankun" rather than "Kingst". | |||
The vendor software can be freely downloaded from their [http://www.qdkingst.com/en/products website]. | |||
== Hardware == | == Hardware == | ||
This logic analyser has been on the market since around 2012 and there are a few different revisions of it. | |||
This [[Media:Kingst_LA2016_LA1016_Schematic.zip|schematic]] has been reverse engineered from | |||
a unit purchased in 2020 containing a PCB marked as v1.3.0. | |||
The circuitry of early issue PCBs is similar but may have different voltage regulators, different input | |||
channel routing to the FPGA and no input threshold adjustment. | |||
The LA1016 uses identical hardware with a different FPGA bitstream which limits the sample rate to 100MHz maximum. | |||
All of these devices use the same firmware for the FX2LP MCU but there are four different FPGA bitstreams. | |||
i.e. LA1016 & LA2016 bitstreams and the older versions of these (to swap some of the input channels). | |||
Once the FX2LP firmware has been loaded, a 'magic number' in the EEPROM is used to identify the different | |||
models and thus allow the correct FPGA bitstream to be loaded. | |||
Note that the LA1016 cannot be boosted to 200MHz by | |||
changing the 'magic number' or the FPGA bitstream because of device U10 which | |||
is used by the FPGA to authenticate the bitstream. It is also used by the OEM software to authenticate | |||
the logic analyser as genuine 'Kingst'. U10 does not impact Sigrok support in any way and we don't need | |||
to communicate with it. | |||
Main components and their function: | |||
* '''I2C EEPROM''': 2Kbit [http://www.atmel.com/devices/AT24C02B.aspx Atmel 24C02B] (markings: "ATMEL317 24C02BN SU27 D") ([http://www.atmel.com/Images/doc5126.pdf datasheet]) | |||
* Cypress FX2LP MCU | |||
See [[Kingst LA2016/Info]] for '''lsusb -v''' endpoint information. | |||
* Atmel AT24C02 2Kbit EEPROM | |||
* Altera EP4CE6 FPGA | |||
* Samsung DDR2 SDRAM | |||
Datasheets | |||
U15 [http://www.ti.com/lit/ds/symlink/tps60403.pdf TPS60403] Charge pump voltage inverter | |||
The IC marked PFNI is a http://www.ti.com/lit/ds/symlink/tps60403.pdf | The IC marked PFNI is a http://www.ti.com/lit/ds/symlink/tps60403.pdf | ||
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[[Category:Device]] | [[Category:Device]] | ||
[[Category:Logic analyzer]] | [[Category:Logic analyzer]] | ||
[[Category: | [[Category:In progress]] |
Revision as of 13:52, 5 March 2021
Status | in progress |
---|---|
Source code | kingst-la2016 |
Channels | 16 |
Samplerate | 200MHz max. |
Samplerate (state) | State analysis not supported |
Triggers |
Level (multiple channels) Edge (one channel) |
Min/max voltage | -50V — 50V |
Threshold voltage |
Configurable: -4V—4V, min step 0.01V |
Memory |
128MByte DDR2 SDRAM 40M—10G samples |
Compression | Yes |
Website | qdkingst.com |
5th March 2021:
This device was previously marked as supported, however, some users are reporting issues with this device and we are working on some driver changes.
The Kingst LA2016 is a USB-based, 16-channel logic analyser with 200MHz maximum sampling rate.
The current vendor is "Qingdao Kingst Electronics Co., Ltd." but older models appear to be branded "Jiankun" rather than "Kingst".
The vendor software can be freely downloaded from their website.
Hardware
This logic analyser has been on the market since around 2012 and there are a few different revisions of it. This schematic has been reverse engineered from a unit purchased in 2020 containing a PCB marked as v1.3.0. The circuitry of early issue PCBs is similar but may have different voltage regulators, different input channel routing to the FPGA and no input threshold adjustment.
The LA1016 uses identical hardware with a different FPGA bitstream which limits the sample rate to 100MHz maximum.
All of these devices use the same firmware for the FX2LP MCU but there are four different FPGA bitstreams. i.e. LA1016 & LA2016 bitstreams and the older versions of these (to swap some of the input channels). Once the FX2LP firmware has been loaded, a 'magic number' in the EEPROM is used to identify the different models and thus allow the correct FPGA bitstream to be loaded.
Note that the LA1016 cannot be boosted to 200MHz by changing the 'magic number' or the FPGA bitstream because of device U10 which is used by the FPGA to authenticate the bitstream. It is also used by the OEM software to authenticate the logic analyser as genuine 'Kingst'. U10 does not impact Sigrok support in any way and we don't need to communicate with it.
Main components and their function:
- I2C EEPROM: 2Kbit Atmel 24C02B (markings: "ATMEL317 24C02BN SU27 D") (datasheet)
- Cypress FX2LP MCU
See Kingst LA2016/Info for lsusb -v endpoint information.
- Atmel AT24C02 2Kbit EEPROM
- Altera EP4CE6 FPGA
- Samsung DDR2 SDRAM
Datasheets
U15 TPS60403 Charge pump voltage inverter
The IC marked PFNI is a http://www.ti.com/lit/ds/symlink/tps60403.pdf
Photos
Firmware
In order to use this device you need to extract the firmware/FPGA files from the vendor software (Linux download) using the sigrok-fwextract-kingst-la2016 script from the sigrok-util repo and place them in one of the usual places where libsigrok expects firmware files:
$ ./sigrok-fwextract-kingst-la2016 KingstVIS/KingstVIS saved 180224 bytes to kingst-la2016a-fpga.bitstream saved 5350 bytes to kingst-la-01a1.fw saved 5430 bytes to kingst-la-01a2.fw saved 5718 bytes to kingst-la-01a3.fw saved 142412 bytes to kingst-la-01a4.fw saved 5452 bytes to kingst-la-03a1.fw