Difference between revisions of "Sysclk LWLA1016"
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(Link to protocol documentation sub-page) |
(Elevate state to "in progress") |
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| image = [[File:Sysclk lwla1016.png|180px]] | | image = [[File:Sysclk lwla1016.png|180px]] | ||
| name = Sysclk LWLA1016 | | name = Sysclk LWLA1016 | ||
| status = | | status = in progress | ||
| source_code_dir = | | source_code_dir = | ||
| channels = 16 | | channels = 16 | ||
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}} | }} | ||
The '''Sysclk LWLA1016''' is a USB-based, 16-channel logic analyzer with up to 100MHz sampling rate. | The '''Sysclk LWLA1016''' is a USB-based, 16-channel logic analyzer with up to 100MHz sampling rate, or up to 250MHz with 8 channels. | ||
See [[Sysclk LWLA1016/Info]] for more details (such as '''lsusb -v''' output) about the device. | See [[Sysclk LWLA1016/Info]] for more details (such as '''lsusb -v''' output) about the device. | ||
Revision as of 23:54, 5 July 2015
 | |
| Status | in progress |
|---|---|
| Channels | 16 |
| Samplerate | 100MHz |
| Samplerate (state) | ? |
| Triggers | ? |
| Min/max voltage | ? |
| Threshold voltage | ? |
| Memory | 256Kbit/channel |
| Compression | ? |
| Website | taobao.com |
The Sysclk LWLA1016 is a USB-based, 16-channel logic analyzer with up to 100MHz sampling rate, or up to 250MHz with 8 channels.
See Sysclk LWLA1016/Info for more details (such as lsusb -v output) about the device.
Hardware
TODO.
Photos
Device, front
Device, back
Device, open
PCB, top
PCB, bottom
Cypress FX2
ISSI 1
ISSI 2
ATMLH105
STC
LDOs
Input stage
Crystal
Protocol
Reverse engineering of the vendor's custom protocol has begun. See Sysclk LWLA1016/Protocol for the findings gathered so far.
Resources
TODO.