Difference between revisions of "YiXingDianZi MDSO"
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(Added sigrok dump of eeprom communication with FX2 during booting.) |
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<gallery> | <gallery> | ||
File:YiXingDianZi-MDSO-outside.jpg|Outside | |||
File:YiXingDianZi-MDSO-inside.jpg|Inside | |||
File:YiXingDianZi-MDSO-pcb-top.jpg|PCB top side | |||
File:YiXingDianZi-MDSO-bottom.jpg|PCB bottom side | |||
File:YiXingDianZi-MDSO-usb-side.jpg|PCB, usb side | |||
File:YiXingDianZi-MDSO-frontend.jpg|PCB, analog frontend | |||
File:YiXingDianZi-MDSO-box.jpg|Packaging | |||
</gallery> | </gallery> | ||
Revision as of 23:19, 5 November 2018
 | |
| Status | in progress |
|---|---|
| Channels | 2 |
| Samplerate | 48MHz |
| Analog bandwidth | 20MHz |
| Vertical resolution | 8bit |
| Triggers | none (SW-only) |
| Input impedance | 1MΩ‖25pF |
| Memory | none |
| Display | none |
| Connectivity | USB |
The YiXingDianZi MDSO is a USB-based, 2-channel oscilloscope with an analog bandwidth of 20MS/s and 48MS/s sampling rate.
It comes in very compact plastic case (82x65x23mm) without any branding. It has:
- usb type B input
- 2c BNC inputs
- red led
See YiXingDianZi MDSO/Info for more details (such as lsusb -v output) on the device.
Hardware
- Cypress FX2LP CY7C68013A-56PVXC (USB 2.0 HS controller)
- ADC: Analog Devices AD9288
- EEPROM: Microchip 24LC64I (64K I²C EEPROM)
- 2x ST 74HC4051 (8-Channel Analog Mux)
- Crystal oscillator 24MHz (crystal)
- 4x 145 MHz FastFET Op Amp: Analog Devices AD8065 (top markings HRA)
- unmarked DC/DC converter
- 3.3V LDO: AMS1117-3.3
Cypress FX2 pinout:
| PD5 | 1- | O | -56 | PD4 |
| PD6 | 2- | -55 | PD3 | |
| PD7 | 3- | -54 | PD2 | |
| GND | 4- | -53 | PD1 | |
| CLKOUT | 5- | -52 | PD0 | |
| VCC | 6- | -51 | *WAKEUP | |
| GND | 7- | -50 | VCC | |
| RDY0/*SLRD | 8- | -49 | RESET# | |
| RDY1/*SLWR | 9- | -48 | GND | |
| AVCC | 10- | -47 | PA7 | |
| (24MHz crystal) XTALOUT | 11- | -46 | PA6 | |
| (24MHz crystal) XTALIN | 12- | -45 | PA5 | |
| AGND | 13- | -44 | PA4 | |
| AVCC | 14- | -43 | PA3 | |
| (USB D+) DPLUS | 15- | -42 | PA2 | |
| (USB D-) DMINUS | 16- | -41 | PA1 | |
| AGND | 17- | -40 | PA0 | |
| VCC | 18- | -39 | VCC | |
| GND | 19- | -38 | CTL2 | |
| (CTL0, AD9288 ENCA/B) *IFCLK | 20- | -37 | CTL1 | |
| RESERVED | 21- | -36 | CTL0 (IFCLK, AD9288 ENCA/B) | |
| (EEPROM SCL) SCL | 22- | -35 | GND | |
| (EEPROM SDA) SDA | 23- | -34 | VCC | |
| VCC | 24- | -33 | GND | |
| PB0 | 25- | -32 | PB7 | |
| PB1 | 26- | -31 | PB6 | |
| PB2 | 27- | -30 | PB5 | |
| PB3 | 28- | -29 | PB4 |
NXP 74HC4051D (upper/lower, CH1/CH2) pinout:
|
|
Microchip 24LC64I pinout:
| (VCC) A0 | 1- | O | -8 | VCC |
| (GND) A1 | 2- | -7 | WP (GND) | |
| (GND) A2 | 3- | -6 | SCL (FX2 SCL) | |
| VSS | 4- | -5 | SDA (FX2 SDA) |
Analog Devices ADS9288 pinout:
| AD9288 pins | Description |
|---|---|
| S1, S2 | S1=VCC, S2=GND. "Normal operation, data align disabled". |
| DFS | Tied to GND. Data format select = "offset binary" (not "twos complement"). |
| AINA, AINB | Analog input channels. |
| D0A-D7A | Connected to FX2 PB0-PB7. |
| D0B-D7B | Connected to FX2 PD0-PD7. |
Firmware
Note: The firmware is flashed into the device permanently.
EEPROM layout
The device has a 8KB I²C EEPROM with the following layout:
c2 47 05 31 21 00 00 04 XX XX XX XX XX XX .. ..
Description:
| Bytes | Description |
|---|---|
| 0 | 0xc2: FX2 "c2 load" mode, i.e. VID/PID/DID are loaded from EEPROM as the firmware. |
| 1-2 | 0x0547: USB vendor ID (VID before firmware renumerate). |
| 3-4 | 0x2131: USB product ID (PID before firmware renumerate). |
| 5-6 | 0x0000: USB device ID (DID before firmware renumerate). |
| 7 | 0x04: FX2 configuration byte (see FX2 TRM for details). |
| 8-1917h | Firmware. |
| 1918h -1fffh | All-0xff. |
See full dump of FX2 boot communication with EEPROM: Media:YiXingDianZi MDSO eeprom read.sr.gz
Photos
Outside
Inside
PCB top side
PCB bottom side
PCB, usb side
PCB, analog frontend
Packaging
