Difference between revisions of "Protocol decoder:Sae j1850 vpw"

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(update screenshot, example screen output)
 
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TODO  this page needs some more attention
{{Infobox protocol decoder
| id              = sae_j1850_vpw
| name            = SAE J1850 VPW
| description    = SAE J1850 Variable Pulse Width 1x and 4x.
| status          = supported
| license        = GPLv2+
| source_code_dir = sae_j1850_vpw
| input          = logic
| output          = —
| probes          = data
| image          = [[File:sae_j1850_vpw_mugshot.png|250px]]
| info            =
}}


SAE J1850 VPW is one of several signal protocols mandated by OBD2/EOBD legislation, which requires automotive vehicle manufacturers from 1996 (USA) or 2001 (Europe) to provide access to the vehicles data bus via a standard 16 pin SAE J1962 connector. The purpose originally being to allow testing and diagnostics from the "on-board diagnostic" capabilities (which were also required by the legislation), of the control module responsible for the vehicles emission control system (typically the PCM, Powertrain Control Module). However the VPW databus also serves many other purposes.  
SAE J1850 VPW is one of several signal protocols mandated by OBD2/EOBD legislation, which requires automotive vehicle manufacturers from 1996 (USA) or 2001 (Europe) to provide access to the vehicles data bus via a standard 16 pin SAE J1962 connector. The purpose originally being to allow testing and diagnostics from the "on-board diagnostic" capabilities (which were also required by the legislation), of the control module responsible for the vehicles emission control system (typically the PCM, Powertrain Control Module). However the VPW databus also serves many other purposes.  
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The way the bits are represented on the bus and voltage level is different between them. This decoder is for the VPW variety.
The way the bits are represented on the bus and voltage level is different between them. This decoder is for the VPW variety.


= Example use =


<small>
  $ sigrok-cli -i P01_bench_by_itself.sr -P sae_j1850_vpw:data=D0 -A sae_j1850_vpw=fields --protocol-decoder-ann-class
  ...
  sae_j1850_vpw-1: prio: 88
  sae_j1850_vpw-1: dest: 15
  sae_j1850_vpw-1: src: 10
  sae_j1850_vpw-1: mode: 01
  sae_j1850_vpw-1: csum: c8
  sae_j1850_vpw-1: prio: 88
  sae_j1850_vpw-1: dest: 1b
  sae_j1850_vpw-1: src: 10
  sae_j1850_vpw-1: mode: 10
  sae_j1850_vpw-1: data: 00 00
  sae_j1850_vpw-1: csum: 46
  sae_j1850_vpw-1: prio: 8a
  sae_j1850_vpw-1: dest: ea
  sae_j1850_vpw-1: src: 10
  sae_j1850_vpw-1: mode: 20
  sae_j1850_vpw-1: data: 8a 00
  sae_j1850_vpw-1: csum: 10
  ...
</small>


IRC user pman92 reported on 1/5/2020 that antus created a J1850 VPW decoder in 2016, which needs migration to PD API v3 and mainlining.
[[File:Sae_j1850_vpw_mugshot.png|800px|center|SAE J1850 VPW in the GUI application]]
 
 
 
pman92 has created a branch of sigrokdecode and commited the 2016 version of the PD, as well as commited an attempted change to v3 API:
https://github.com/pman92/libsigrokdecode/tree/master/decoders/vpw
 
There is also a branch of sigrok-dumps with example captures containing VPW data packets:
https://github.com/pman92/sigrok-dumps/tree/master/vpw/
 
Discussion about the decoder can be found here:
https://pcmhacking.net/forums/viewtopic.php?f=3&t=4761
 
Antus has partially completed migration to PD V3
https://bitbucket.org/antuspcm/sigrok-vpw-decoder/commits/


= Resources =
= Resources =


* [https://pcmhacking.net/forums/viewtopic.php?f=3&t=4761 PCM hacking forum thread]
* [https://bitbucket.org/antuspcm/sigrok-vpw-decoder/commits Antus' partial migration], [https://github.com/pman92/libsigrokdecode pman92's repo] (see the decoders/vpw/ directory)
* [https://github.com/pman92/sigrok-dumps pman92's example captures] (see the vpw/ directory)
* https://www.irjet.net/archives/V4/i7/IRJET-V4I791.pdf
* https://www.irjet.net/archives/V4/i7/IRJET-V4I791.pdf
* http://www.fastfieros.com/tech/vpw_communication_protocol.htm
* http://www.fastfieros.com/tech/vpw_communication_protocol.htm
[[Category:Protocol decoder]]

Latest revision as of 22:08, 30 July 2023

sae_j1850_vpw
Sae j1850 vpw mugshot.png
Name SAE J1850 VPW
Description SAE J1850 Variable Pulse Width 1x and 4x.
Status supported
License GPLv2+
Source code decoders/sae_j1850_vpw
Input logic
Output —
Probes data

SAE J1850 VPW is one of several signal protocols mandated by OBD2/EOBD legislation, which requires automotive vehicle manufacturers from 1996 (USA) or 2001 (Europe) to provide access to the vehicles data bus via a standard 16 pin SAE J1962 connector. The purpose originally being to allow testing and diagnostics from the "on-board diagnostic" capabilities (which were also required by the legislation), of the control module responsible for the vehicles emission control system (typically the PCM, Powertrain Control Module). However the VPW databus also serves many other purposes.

SAE J1850 came in 2 varieties:

  • PWM (Pulse Width Modulation), 41.6 kb/s, typically used by Ford.
  • VPW (Variable Pulse Width), 10.4 kb/s, typically used by General Motors.

The way the bits are represented on the bus and voltage level is different between them. This decoder is for the VPW variety.

Example use

 $ sigrok-cli -i P01_bench_by_itself.sr -P sae_j1850_vpw:data=D0 -A sae_j1850_vpw=fields --protocol-decoder-ann-class 
 ...
 sae_j1850_vpw-1: prio: 88
 sae_j1850_vpw-1: dest: 15
 sae_j1850_vpw-1: src: 10
 sae_j1850_vpw-1: mode: 01
 sae_j1850_vpw-1: csum: c8
 sae_j1850_vpw-1: prio: 88
 sae_j1850_vpw-1: dest: 1b
 sae_j1850_vpw-1: src: 10
 sae_j1850_vpw-1: mode: 10
 sae_j1850_vpw-1: data: 00 00
 sae_j1850_vpw-1: csum: 46
 sae_j1850_vpw-1: prio: 8a
 sae_j1850_vpw-1: dest: ea
 sae_j1850_vpw-1: src: 10
 sae_j1850_vpw-1: mode: 20
 sae_j1850_vpw-1: data: 8a 00
 sae_j1850_vpw-1: csum: 10
 ...

SAE J1850 VPW in the GUI application

Resources

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