Difference between revisions of "ASIX SIGMA / SIGMA2"
m (Update status of triggers) |
(mention disabled trigger support in the place where triggers are discussed, and to the top for improved awareness) |
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| samplerate = 200MHz @ 4ch, 100MHz @ 8ch, 50MHz @ 16ch | | samplerate = 200MHz @ 4ch, 100MHz @ 8ch, 50MHz @ 16ch | ||
| samplerate_state = 50MHz | | samplerate_state = 50MHz | ||
| triggers = | | triggers = value, edge, duration, sequence, counter, logical ops | ||
| voltages = -0.3V — 5.5V | | voltages = -0.3V — 5.5V | ||
| threshold = Fixed: VIH=2.0V, VIL=0.8V (suitable for TTL, LVTTL, 2.7-5.5V CMOS) | | threshold = Fixed: VIH=2.0V, VIL=0.8V (suitable for TTL, LVTTL, 2.7-5.5V CMOS) | ||
| Line 22: | Line 22: | ||
Many thanks to the vendor ([http://www.asix.net/ ASIX]) for providing information on the protocol used to communicate with the device and for releasing the device's firmware / FPGA bitstreams under a [http://sigrok.org/gitweb/?p=sigrok-firmware.git;a=blob;f=asix-sigma/LICENSE.Sigma license which allows us to distribute the files]. | Many thanks to the vendor ([http://www.asix.net/ ASIX]) for providing information on the protocol used to communicate with the device and for releasing the device's firmware / FPGA bitstreams under a [http://sigrok.org/gitweb/?p=sigrok-firmware.git;a=blob;f=asix-sigma/LICENSE.Sigma license which allows us to distribute the files]. | ||
</em> | </em> | ||
Notice that the device itself does support hardware triggers, but the software '''driver currently disables trigger support''' until the corresponding logic gets fixed. The existing logic is not operational. | |||
== Hardware == | == Hardware == | ||
| Line 34: | Line 36: | ||
=== ASIX SIGMA === | === ASIX SIGMA === | ||
<gallery> | <gallery> | ||
File:ASIX SIGMA.jpg | File:ASIX SIGMA.jpg | ||
File:Sigma.jpg | File:Sigma.jpg | ||
</gallery> | </gallery> | ||
=== ASIX SIGMA 2 === | === ASIX SIGMA 2 === | ||
<gallery> | <gallery> | ||
File:ASIX SIGMA 2 back.jpg | File:ASIX SIGMA 2 back.jpg | ||
| Line 50: | Line 55: | ||
The ASIX SIGMA/SIGMA2 firmware files are generously provided by the vendor for distribution. As a result, the device works out of the box with sigrok. Trigger support has been implemented in 100MHz and 200MHz modes for rising/falling edges. In other modes, users can specify additional trigger values, listed in the table below. | The ASIX SIGMA/SIGMA2 firmware files are generously provided by the vendor for distribution. As a result, the device works out of the box with sigrok. Trigger support has been implemented in 100MHz and 200MHz modes for rising/falling edges. In other modes, users can specify additional trigger values, listed in the table below. | ||
Note: See the [https://sigrok.org/gitweb/?p=libsigrok.git;a=blob;f=src/hardware/asix-sigma/protocol.h;hb=HEAD asix-sigma driver] source code for the current status of trigger support. It got disabled until the code becomes operational. | |||
NOTE: In 50MHz mode, the device uses an internal 8-bit integer divider. The sample rate is therefore 50MHz/n , where n = 1...256 . The table below matches sigrok's current representation and will need to be changed. | NOTE: In 50MHz mode, the device uses an internal 8-bit integer divider. The sample rate is therefore 50MHz/n , where n = 1...256 . The table below matches sigrok's current representation and will need to be changed. | ||
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The new hardware revision requires the new firmware files to support the button and the different LED wiring. The new firmware is usable for both SIGMA '''and''' SIGMA2. However, the new hardware revision cannot work with the old firmware files. | The new hardware revision requires the new firmware files to support the button and the different LED wiring. The new firmware is usable for both SIGMA '''and''' SIGMA2. However, the new hardware revision cannot work with the old firmware files. | ||
== Resources == | == Resources == | ||
Revision as of 19:34, 28 January 2020
 | |
| Status | supported |
|---|---|
| Source code | asix-sigma |
| Channels | 16 |
| Samplerate | 200MHz @ 4ch, 100MHz @ 8ch, 50MHz @ 16ch |
| Samplerate (state) | 50MHz |
| Triggers | value, edge, duration, sequence, counter, logical ops |
| Min/max voltage | -0.3V — 5.5V |
| Threshold voltage | Fixed: VIH=2.0V, VIL=0.8V (suitable for TTL, LVTTL, 2.7-5.5V CMOS) |
| Memory | 32MByte (SDRAM) |
| Compression | "real-time hardware data compression" |
| Website | asix.net |
The ASIX SIGMA/SIGMA2 is a USB-based, 16-channel logic analyzer with up to 200MHz sampling rate.
See ASIX SIGMA/Info for more details (such as lsusb -vvv output) about the device.
Many thanks to the vendor (ASIX) for providing information on the protocol used to communicate with the device and for releasing the device's firmware / FPGA bitstreams under a license which allows us to distribute the files.
Notice that the device itself does support hardware triggers, but the software driver currently disables trigger support until the corresponding logic gets fixed. The existing logic is not operational.
Hardware
- Xilinx Spartan XC3S50
- FTDI FT245RL
- 2x TI SN74LVC245AN
- MT 48LCI6MI6A2
- ...
Photos
ASIX SIGMA
ASIX SIGMA 2
Documentation
The ASIX SIGMA/SIGMA2 firmware files are generously provided by the vendor for distribution. As a result, the device works out of the box with sigrok. Trigger support has been implemented in 100MHz and 200MHz modes for rising/falling edges. In other modes, users can specify additional trigger values, listed in the table below.
Note: See the asix-sigma driver source code for the current status of trigger support. It got disabled until the code becomes operational.
NOTE: In 50MHz mode, the device uses an internal 8-bit integer divider. The sample rate is therefore 50MHz/n , where n = 1...256 . The table below matches sigrok's current representation and will need to be changed.
| Samplerate | Number of probes | Trigger support |
|---|---|---|
| 200 kHz | 16 | Edge of two probes, state, boolean expression1 |
| 250 kHz | 16 | Edge of two probes, state, boolean expression1 |
| 500 kHz | 16 | Edge of two probes, state, boolean expression1 |
| 1 MHz | 16 | Edge of two probes, state, boolean expression1 |
| 5 MHz | 16 | Edge of two probes, state, boolean expression1 |
| 10 MHz | 16 | Edge of two probes, state, boolean expression1 |
| 25 MHz | 16 | Edge of two probes, state, boolean expression1 |
| 50 MHz | 16 | Edge of two probes, state, boolean expression1 |
| 100 MHz | 8 | Edge of one probe |
| 200 MHz | 4 | Edge of one probe |
1 Boolean expression feature not implemented in sigrok yet.
Example usage
An example that captures from 4 probes, for 100ms at 10MHz, with trigger condition 1:high, 2:rising, 3:low, 4:high.
$ sigrok-cli --driver asix-sigma --config samplerate=10m --wait-trigger \ --triggers 1=1,2=r,3=0,4=1 --output-format bits --probes 1-4 --time 100ms
Firmware
The firmware files (FPGA bitstreams) for the ASIX SIGMA/SIGMA2 have been provided by the vendor under a license which allows redistribution, and are available from the sigrok-firmware repository. See Firmware for installation instructions.
Differences between SIGMA and SIGMA2
The hardware of SIGMA and SIGMA2 is almost identical, up to few exceptions:
- Seven one-color LEDs were replaced with two two-color LEDs.
- A button was added. It can be used to start, stop, trigger.
- The SIGMA has input TTLs in DIL sockets, SIGMA2 is has input TTLs in SMD package.
The new hardware revision requires the new firmware files to support the button and the different LED wiring. The new firmware is usable for both SIGMA and SIGMA2. However, the new hardware revision cannot work with the old firmware files.
Resources
- Initial support for Asix Sigma in Sigrok
- PING Labs: Sampi – A Logic Analyzer
- flickr: ASIX SIGMA in chlunde's photostream (photos and more information about the device)