Difference between revisions of "Instrustar MDSO-LA"
		
		
		
		
		
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| Martinloren (talk | contribs)  (New Device) | Martinloren (talk | contribs)  m (→Hardware) | ||
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| {{Infobox oscilloscope | {{Infobox oscilloscope | ||
| | image               =   | | image               = [[File:Instrustar_MDSO-LA.jpeg|180px]] | ||
| | name                = Instrustar MDSO-LA | | name                = Instrustar MDSO-LA | ||
| | status              =  | | status              = supported | ||
| | source_code_dir     =   | | source_code_dir     =   | ||
| | channels            = 2 | | channels            = 2 | ||
| Line 18: | Line 18: | ||
| }} | }} | ||
| The '''Instrustar MDSO-LA''' is a USB-based | The '''Instrustar MDSO-LA''' is a USB-based, same hardware as [[YiXingDianZi MDSO]] except that add the logic analyzer and a double eeprom to provide 2 different VID/PID. | ||
| * 2-channel oscilloscope with an analog bandwidth of 20MS/s and 48MS/s sampling rate, | * 2-channel oscilloscope with an analog bandwidth of 20MS/s and 48MS/s sampling rate, | ||
| * 8/16-channel logic analyzer with a max. sampling rate of 24MHz. | * 8/16-channel logic analyzer with a max. sampling rate of 24MHz. | ||
| == Hardware == | == Hardware == | ||
| * '''USB''': [http://www.cypress.com/documentation/datasheets/cy7c68013a-cy7c68014a-cy7c68015a-cy7c68016a-ez-usb-fx2lp-usb Cypress CY7C68013A-100AXC] (FX2LP) ([http://www.cypress.com/file/138911/download datasheet]) | |||
| * '''256-byte I²C EEPROM''': 2x [http://www.microchip.com/wwwproducts/en/24LC02B Microchip 24LC02BI] ([http://ww1.microchip.com/downloads/en/DeviceDoc/21709J.pdf datasheet]) | |||
| * '''16-Bit bus transceiver with 3-state outputs''': [http://www.ti.com/product/sn74lvc16245a TI SN74LVC16245A] ([http://www.ti.com/lit/ds/symlink/sn74lvc16245a.pdf datasheet]) | |||
| * '''8-channel analog mux/demux''': 2x [http://www.nxp.com/products/discretes-and-logic/logic/8-channel-analog-multiplexer-demultiplexer:74HC4051D NXP 74HC4051D] ([https://assets.nexperia.com/documents/data-sheet/74HC_HCT4051.pdf datasheet]) | |||
| * '''1A low-dropout voltage regulator (3.3V):''' [http://www.advanced-monolithic.com/products/voltreg.html#1117 Advanced Monolithic Systems AMS1117-3.3] [http://www.advanced-monolithic.com/pdf/ds1117.pdf datasheet]) | |||
| * '''2W, fixed input, isolated & unregulated dual/single output DC/DC converter''': [http://www.mornsun.cn/html/product/content/A_S-2WR2.html Mornsun A_S-2WR2 (A0505S-2WR2)] ([http://www.mornsun.cn/uploads/pdf/A_S-2WR2.pdf datasheet]) | |||
| * '''ADC 8-bit, 40MHz, dual ADC''': [http://www.analog.com/en/products/analog-to-digital-converters/ad-converters/ad9288.html Analog Devices AD9288] ([http://www.analog.com/media/en/technical-documentation/data-sheets/AD9288.pdf datasheet]) | |||
| * '''1.4GHz current feedback amplifiers with enable''': 2x [http://www.intersil.com/en/products/amplifiers-and-buffers/all-amplifiers/amplifiers/EL5166.html Intersil EL5166] ([http://www.intersil.com/content/dam/Intersil/documents/el51/el5166-67.pdf datasheet]) | |||
| * '''145 MHz FastFET Opamps''': 2x [http://www.analog.com/en/products/amplifiers/operational-amplifiers/jfet-input-amplifiers/ad8065.html#product-overview AD8065]: ([http://www.analog.com/static/imported-files/data_sheets/AD8065_8066.pdf datasheet]), markings "HRA" | |||
| * '''Crystal''': 24MHz | |||
| The device has a switch. Depending on the position it comes up with different USB VID/PIDs: | |||
| * '''MDSO-LA''': See [[YiXingDianZi MDSO/Info]] for more details (such as '''lsusb -v''' output) on the device (used for oscilloscope mode). | |||
| * '''Saleae Logic''': [[Hantek_6022BL/Info|0925:3881 Lakeview Research Saleae Logic]] ([[Saleae Logic]] VID/PID, so [[fx2lafw]] works out of the box) | |||
| '''Cypress FX2 pinout:''' | '''Cypress FX2 pinout:''' | ||
| <small> | <small> | ||
| {{ | {{chip_56pin | ||
| | 1=PD5 | | 1=PD5 | ||
| | 2=PD6 | | 2=PD6 | ||
| Line 69: | Line 85: | ||
| | 38=CTL2 | | 38=CTL2 | ||
| | 39=VCC | | 39=VCC | ||
| | 40=PA0  | | 40=PA0   | ||
| | 41=PA1 <span style="color:red">( | | 41=PA1 <span style="color:red">(74HC4051, S2)</span> | ||
| | 42=PA2 <span style="color:red">( | | 42=PA2 <span style="color:red">(774HC4051, S1)</span> | ||
| | 43=PA3 <span style="color:red">( | | 43=PA3 <span style="color:red">(74HC4051, S0)</span> | ||
| | 44=PA4 <span style="color:red">( | | 44=PA4 <span style="color:red">(74HC4051, S0)</span> | ||
| | 45=PA5 <span style="color:red">( | | 45=PA5 <span style="color:red">(74HC4051, S1)</span> | ||
| | 46=PA6 <span style="color: | | 46=PA6 <span style="color:red">(74HC4051, S2)</span> | ||
| | 47=PA7 <span style="color: | | 47=PA7 <span style="color:magenta">(Activate analog mode vs digital mode)</span> | ||
| | 48=GND | | 48=GND | ||
| | 49=RESET# | | 49=RESET# | ||
| Line 99: | Line 115: | ||
| </small> | </small> | ||
| '''NXP 74HC4051D (upper/lower, CH1/CH2) pinout''': | '''NXP 74HC4051D (upper/lower, CH1/CH2) pinout''': | ||
| Line 133: | Line 128: | ||
| |7=VEE | |7=VEE | ||
| |8=GND | |8=GND | ||
| |9=S2 <span style="color: | |9=S2 <span style="color:red">(PA1)</span> | ||
| |10=S1 <span style="color: | |10=S1 <span style="color:red">(PA2)</span> | ||
| |11=S0 <span style="color: | |11=S0 <span style="color:red">(PA3)</span> | ||
| |12=Y3 | |12=Y3 | ||
| |13=Y0 | |13=Y0 | ||
| Line 152: | Line 147: | ||
| |7=VEE | |7=VEE | ||
| |8=GND | |8=GND | ||
| |9=S2 <span style="color: | |9=S2 <span style="color:red">(PA6)</span> | ||
| |10=S1 <span style="color: | |10=S1 <span style="color:red">(PA5)</span> | ||
| |11=S0 <span style="color: | |11=S0 <span style="color:red">(PA4)</span> | ||
| |12=Y3 | |12=Y3 | ||
| |13=Y0 | |13=Y0 | ||
| Line 165: | Line 160: | ||
| '''Microchip 24LC02B (top / bottom) pinout''': | '''Microchip 24LC02B (top / bottom) pinout''': | ||
| There are 2 for the 2 possible hardware configurations (as MSDO-LA or as USBee) | |||
| <small> | <small> | ||
| <table><tr><td> | <table><tr><td> | ||
| Line 182: | Line 177: | ||
| </td></tr></table> | </td></tr></table> | ||
| </small> | </small> | ||
| '''Analog Devices AD9288 pinout''': | |||
| {| border="0" style="font-size: smaller" class="alternategrey sortable sigroktable" | |||
| |- | |||
| !AD9288 pins | |||
| !Description | |||
| |- | |||
| | S1, S2 | |||
| | S1=VCC, S2=GND. "Normal operation, data align disabled". | |||
| |- | |||
| | DFS | |||
| | Tied to GND. Data format select = "offset binary" (not "twos complement"). | |||
| |- | |||
| | A<sub>IN</sub>A, A<sub>IN</sub>B | |||
| | Analog input channels. | |||
| |- | |||
| | D0<sub>A</sub>-D7<sub>A</sub> | |||
| | Connected to FX2 PB0-PB7. | |||
| |- | |||
| | D0<sub>B</sub>-D7<sub>B</sub> | |||
| | Connected to FX2 PD0-PD7. | |||
| |} | |||
| == Photos == | == Photos == | ||
| <gallery> | |||
| File:Instrustar_MDSO-LA_front.jpeg | |||
| File:Instrustar_MDSO-LA_back.jpg | |||
| </gallery> | |||
| == Resources == | == Resources == | ||
| [[Category:Device]] | [[Category:Device]] | ||
| [[Category:Oscilloscope]] | [[Category:Oscilloscope]] | ||
| [[Category:Logic analyzer]] | [[Category:Logic analyzer]] | ||
| [[Category: | [[Category:Supported]] | ||
Latest revision as of 11:51, 19 February 2019
|  | |
| Status | supported | 
|---|---|
| Channels | 2 | 
| Samplerate | 48MHz | 
| Analog bandwidth | 20MHz | 
| Vertical resolution | 8bit | 
| Triggers | none (SW-only) | 
| Input impedance | 1MΩ‖25pF | 
| Memory | none | 
| Display | none | 
| Connectivity | USB | 
| Website | instrustar.com | 
The Instrustar MDSO-LA is a USB-based, same hardware as YiXingDianZi MDSO except that add the logic analyzer and a double eeprom to provide 2 different VID/PID.
- 2-channel oscilloscope with an analog bandwidth of 20MS/s and 48MS/s sampling rate,
- 8/16-channel logic analyzer with a max. sampling rate of 24MHz.
Hardware
- USB: Cypress CY7C68013A-100AXC (FX2LP) (datasheet)
- 256-byte I²C EEPROM: 2x Microchip 24LC02BI (datasheet)
- 16-Bit bus transceiver with 3-state outputs: TI SN74LVC16245A (datasheet)
- 8-channel analog mux/demux: 2x NXP 74HC4051D (datasheet)
- 1A low-dropout voltage regulator (3.3V): Advanced Monolithic Systems AMS1117-3.3 datasheet)
- 2W, fixed input, isolated & unregulated dual/single output DC/DC converter: Mornsun A_S-2WR2 (A0505S-2WR2) (datasheet)
- ADC 8-bit, 40MHz, dual ADC: Analog Devices AD9288 (datasheet)
- 1.4GHz current feedback amplifiers with enable: 2x Intersil EL5166 (datasheet)
- 145 MHz FastFET Opamps: 2x AD8065: (datasheet), markings "HRA"
- Crystal: 24MHz
The device has a switch. Depending on the position it comes up with different USB VID/PIDs:
- MDSO-LA: See YiXingDianZi MDSO/Info for more details (such as lsusb -v output) on the device (used for oscilloscope mode).
- Saleae Logic: 0925:3881 Lakeview Research Saleae Logic (Saleae Logic VID/PID, so fx2lafw works out of the box)
Cypress FX2 pinout:
| PD5 | 1- | O | -56 | PD4 | 
| PD6 | 2- | -55 | PD3 | |
| PD7 | 3- | -54 | PD2 | |
| GND | 4- | -53 | PD1 | |
| CLKOUT | 5- | -52 | PD0 | |
| VCC | 6- | -51 | *WAKEUP | |
| GND | 7- | -50 | VCC | |
| RDY0/*SLRD | 8- | -49 | RESET# | |
| RDY1/*SLWR | 9- | -48 | GND | |
| AVCC | 10- | -47 | PA7 (Activate analog mode vs digital mode) | |
| (24MHz crystal) XTALOUT | 11- | -46 | PA6 (74HC4051, S2) | |
| (24MHz crystal) XTALIN | 12- | -45 | PA5 (74HC4051, S1) | |
| AGND | 13- | -44 | PA4 (74HC4051, S0) | |
| AVCC | 14- | -43 | PA3 (74HC4051, S0) | |
| (USB D+) DPLUS | 15- | -42 | PA2 (774HC4051, S1) | |
| (USB D-) DMINUS | 16- | -41 | PA1 (74HC4051, S2) | |
| AGND | 17- | -40 | PA0 | |
| VCC | 18- | -39 | VCC | |
| GND | 19- | -38 | CTL2 | |
| (CTL0, AD9288 ENCA/B) *IFCLK | 20- | -37 | CTL1 | |
| RESERVED | 21- | -36 | CTL0 (IFCLK, AD9288 ENCA/B) | |
| (EEPROM SCL) SCL | 22- | -35 | GND | |
| (EEPROM SDA) SDA | 23- | -34 | VCC | |
| VCC | 24- | -33 | GND | |
| PB0 | 25- | -32 | PB7 | |
| PB1 | 26- | -31 | PB6 | |
| PB2 | 27- | -30 | PB5 | |
| PB3 | 28- | -29 | PB4 | 
NXP 74HC4051D (upper/lower, CH1/CH2) pinout:
| 
 | 
 | 
Microchip 24LC02B (top / bottom) pinout: There are 2 for the 2 possible hardware configurations (as MSDO-LA or as USBee)
| 
 | 
Analog Devices AD9288 pinout:
| AD9288 pins | Description | 
|---|---|
| S1, S2 | S1=VCC, S2=GND. "Normal operation, data align disabled". | 
| DFS | Tied to GND. Data format select = "offset binary" (not "twos complement"). | 
| AINA, AINB | Analog input channels. | 
| D0A-D7A | Connected to FX2 PB0-PB7. | 
| D0B-D7B | Connected to FX2 PD0-PD7. | 

