Difference between revisions of "ASIX OMEGA"
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== Photos == | == Photos == | ||
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File:ASIX_Omega.png | |||
File:Omega-Top.jpg | File:Omega-Top.jpg | ||
File:Omega-Bottom.jpg | File:Omega-Bottom.jpg | ||
Revision as of 23:05, 4 November 2016
The ASIX OMEGA is new version of ASIX SIGMA logic analyzer. It is a 16 channel logic analyzer with sample rate support up to 400 MHz and with 512 Mbit on-board memory. It uses Huffman compression and achieves much better compression ratio than SIGMA. Two or more OMEGA analyzers can be connected in with synchronization cable and use more inputs.
 | |
| Status | in progress |
|---|---|
| Source code | asix-sigma |
| Channels | 16 |
| Samplerate | 400MHz @ 8ch, 200MHz @ 16 |
| Samplerate (state) | ? |
| Triggers | value, edge, duration, sequence, counter, logical ops |
| Min/max voltage | -0.3V — 5.5V |
| Threshold voltage | Fixed: VIH=2.0V, VIL=0.8V (suitable for TTL, LVTTL, 2.7-5.5V CMOS) |
| Memory | 512 megabit |
| Compression | "real-time hardware data compression" |
| Website | asix.net |
The ASIX OMEGA is a USB-based, 16-channel logic analyzer with up to 400MHz sampling rate.
See ASIX OMEGA/Info for more details (such as lsusb -vvv output) about the device.
Hardware
- Xilinx Spartan XC3S200A
- FTDI FT232HL
- 2 x NXP LVC245A
- 2 x MT48LC16M16A2B4-7E
- ICS570BL
- MF204A
- LC125A
- ...
Photos
Documentation
TODO
Example usage
TODO
Firmware
TODO
Resources
TODO