2 * This file is part of the fx2lafw project.
4 * Copyright (C) 2011-2012 Uwe Hermann <uwe@hermann-uwe.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * fx2lafw is an open-source firmware for Cypress FX2 based logic analyzers.
24 * It is written in C, using fx2lib as helper library, and sdcc as compiler.
25 * The code is licensed under the terms of the GNU GPL, version 2 or later.
29 * - We use the FX2 in GPIF mode to sample the data (asynchronously).
30 * - We use the internal 48MHz clock for GPIF.
31 * - The 8 channels/pins we sample (the GPIF data bus) are PB0-PB7.
32 * Support for 16 channels is not yet included, but might be added later.
33 * - Endpoint 2 is used for data transfers from FX2 to host.
34 * - The endpoint is quad-buffered.
38 * - See http://sigrok.org/wiki/Fx2lafw
42 #include <fx2macros.h>
50 #include <gpif-acquisition.h>
56 static void setup_endpoints(void)
59 EP2CFG = (1 << 7) | /* EP is valid/activated */
60 (1 << 6) | /* EP direction: IN */
61 (1 << 5) | (0 << 4) | /* EP Type: bulk */
62 (0 << 3) | /* EP buffer size: 512 */
63 (0 << 2) | /* Reserved. */
64 (0 << 1) | (0 << 0); /* EP buffering: quad buffering */
67 /* Setup EP6 (IN) in the debug build. */
69 EP6CFG = (1 << 7) | /* EP is valid/activated */
70 (1 << 6) | /* EP direction: IN */
71 (1 << 5) | (0 << 4) | /* EP Type: bulk */
72 (0 << 3) | /* EP buffer size: 512 */
73 (0 << 2) | /* Reserved */
74 (1 << 1) | (0 << 0); /* EP buffering: double buffering */
80 /* Disable all other EPs (EP1, EP4, and EP8). */
83 EP1OUTCFG &= ~bmVALID;
90 /* EP2: Reset the FIFOs. */
91 /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
94 /* Reset the FIFOs of EP6 when in debug mode. */
98 /* EP2: Enable AUTOIN mode. Set FIFO width to 8bits. */
99 EP2FIFOCFG = bmAUTOIN | ~bmWORDWIDE;
102 /* EP2: Auto-commit 512 (0x200) byte packets (due to AUTOIN = 1). */
103 EP2AUTOINLENH = 0x02;
105 EP2AUTOINLENL = 0x00;
108 /* EP2: Set the GPIF flag to 'full'. */
109 EP2GPIFFLGSEL = (1 << 1) | (0 << 1);
113 BOOL handle_vendorcommand(BYTE cmd)
115 /* Protocol implementation */
118 /* There is data to receive - arm EP0 */
120 case CMD_GET_FW_VERSION:
121 vendor_command = cmd;
124 /* Unimplemented command. */
131 BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
133 /* We only support interface 0, alternate interface 0. */
141 BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc)
143 /* We only support interface 0, alternate interface 0. */
144 if (ifc != 0 || alt_ifc != 0)
147 /* Perform procedure from TRM, section 2.3.7: */
151 /* (2) Reset data toggles of the EPs in the interface. */
152 /* Note: RESETTOGGLE() gets the EP number WITH bit 7 set/cleared. */
158 /* (3) Restore EPs to their default conditions. */
159 /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
166 /* (4) Clear the HSNAK bit. Not needed, fx2lib does this. */
171 BYTE handle_get_configuration(void)
173 /* We only support configuration 1. */
177 BOOL handle_set_configuration(BYTE cfg)
179 /* We only support configuration 1. */
180 return (cfg == 1) ? TRUE : FALSE;
183 void sudav_isr(void) interrupt SUDAV_ISR
189 void sof_isr(void) interrupt SOF_ISR using 1
194 void usbreset_isr(void) interrupt USBRESET_ISR
196 handle_hispeed(FALSE);
200 void hispeed_isr(void) interrupt HISPEED_ISR
202 handle_hispeed(TRUE);
206 void fx2lafw_init(void)
208 /* Set DYN_OUT and ENH_PKT bits, as recommended by the TRM. */
209 REVCTL = bmNOAUTOARM | bmSKIPCOMMIT;
221 /* TODO: Does the order of the following lines matter? */
227 /* Global (8051) interrupt enable. */
230 /* Setup the endpoints. */
233 /* Put the FX2 into GPIF master mode and setup the GPIF. */
237 void fx2lafw_poll(void)
244 if (vendor_command) {
245 switch (vendor_command) {
246 case CMD_GET_FW_VERSION:
249 /* Acknowledge the vendor command. */
254 if((EP0CS & bmEPBUSY) != 0)
258 gpif_acquisition_start(
259 (const struct cmd_start_acquisition*)EP0BUF);
262 /* Acknowledge the vendor command. */
267 /* Unimplemented command. */