# [<packet-type>, <rxtx>, <packet-data>]
#
# This is the list of <packet-types>s and their respective <packet-data>:
-# - T_START: The data is the (integer) value of the start bit (0 or 1).
-# - T_DATA: The data is the (integer) value of the UART data. Valid values
+# - 'STARTBIT': The data is the (integer) value of the start bit (0 or 1).
+# - 'DATA': The data is the (integer) value of the UART data. Valid values
# range from 0 to 512 (as the data can be up to 9 bits in size).
-# - T_PARITY: The data is the (integer) value of the parity bit (0 or 1).
-# - T_STOP: The data is the (integer) value of the stop bit (0 or 1).
-# - T_INVALID_START: The data is the (integer) value of the start bit (0 or 1).
-# - T_INVALID_STOP: The data is the (integer) value of the stop bit (0 or 1).
-# - T_PARITY_ERROR: The data is a tuple with two entries. The first one is
+# - 'PARITYBIT': The data is the (integer) value of the parity bit (0 or 1).
+# - 'STOPBIT': The data is the (integer) value of the stop bit (0 or 1).
+# - 'INVALID STARTBIT': The data is the (integer) value of the start bit
+# (0 or 1).
+# - 'INVALID STOPBIT': The data is the (integer) value of the stop bit
+# (0 or 1).
+# - 'PARITY ERROR': The data is a tuple with two entries. The first one is
# the expected parity value, the second is the actual parity value.
+# - TODO: Frame error?
#
# The <rxtx> field is 0 for RX packets, 1 for TX packets.
#
ANN_OCT = 3
ANN_BITS = 4
-# Protocol output packet types
-T_START = 0
-T_DATA = 1
-T_PARITY = 2
-T_STOP = 3
-T_INVALID_START = 4
-T_INVALID_STOP = 5
-T_PARITY_ERROR = 6
-
# Given a parity type to check (odd, even, zero, one), the value of the
# parity bit, the value of the data, and the length of the data (5-9 bits,
# usually 8 bits) return True if the parity is correct, False otherwise.
return parity_bit == 1
# Count number of 1 (high) bits in the data (and the parity bit itself!).
- parity = bin(data).count('1') + parity_bit
+ ones = bin(data).count('1') + parity_bit
# Check for odd/even parity.
if parity_type == PARITY_ODD:
- return (parity % 2) == 1
+ return (ones % 2) == 1
elif parity_type == PARITY_EVEN:
- return (parity % 2) == 0
+ return (ones % 2) == 0
else:
raise Exception('Invalid parity type: %d' % parity_type)
{'id': 'rx', 'name': 'RX', 'desc': 'UART receive line'},
{'id': 'tx', 'name': 'TX', 'desc': 'UART transmit line'},
]
+ optional_probes = []
options = {
'baudrate': ['Baud rate', 115200],
'num_data_bits': ['Data bits', 8], # Valid: 5-9.
- 'parity': ['Parity', PARITY_NONE], # TODO: Rename to parity_type.
- 'parity_check': ['Check parity', True], # TODO: Bool supported?
+ 'parity_type': ['Parity type', PARITY_NONE],
+ 'parity_check': ['Check parity?', True], # TODO: Bool supported?
'num_stop_bits': ['Stop bit(s)', STOP_BITS_1],
'bit_order': ['Bit order', LSB_FIRST],
# TODO: Options to invert the signal(s).
# The startbit must be 0. If not, we report an error.
if self.startbit[rxtx] != 0:
self.put(self.frame_start[rxtx], self.samplenum, self.out_proto,
- [T_INVALID_START, rxtx, self.startbit[rxtx]])
+ ['INVALID STARTBIT', rxtx, self.startbit[rxtx]])
# TODO: Abort? Ignore rest of the frame?
self.cur_data_bit[rxtx] = 0
self.state[rxtx] = GET_DATA_BITS
self.put(self.frame_start[rxtx], self.samplenum, self.out_proto,
- [T_START, rxtx, self.startbit[rxtx]])
+ ['STARTBIT', rxtx, self.startbit[rxtx]])
self.put(self.frame_start[rxtx], self.samplenum, self.out_ann,
[ANN_ASCII, ['Start bit', 'Start', 'S']])
# Get the next data bit in LSB-first or MSB-first fashion.
if self.options['bit_order'] == LSB_FIRST:
self.databyte[rxtx] >>= 1
- self.databyte[rxtx] |= (signal << (self.options['num_data_bits'] - 1))
+ self.databyte[rxtx] |= \
+ (signal << (self.options['num_data_bits'] - 1))
elif self.options['bit_order'] == MSB_FIRST:
self.databyte[rxtx] <<= 1
self.databyte[rxtx] |= (signal << 0)
self.state[rxtx] = GET_PARITY_BIT
self.put(self.startsample[rxtx], self.samplenum - 1, self.out_proto,
- [T_DATA, rxtx, self.databyte[rxtx]])
+ ['DATA', rxtx, self.databyte[rxtx]])
s = 'RX: ' if (rxtx == RX) else 'TX: '
self.putx(rxtx, [ANN_ASCII, [s + chr(self.databyte[rxtx])]])
def get_parity_bit(self, rxtx, signal):
# If no parity is used/configured, skip to the next state immediately.
- if self.options['parity'] == PARITY_NONE:
+ if self.options['parity_type'] == PARITY_NONE:
self.state[rxtx] = GET_STOP_BITS
return
self.state[rxtx] = GET_STOP_BITS
- if parity_ok(self.options['parity'], self.paritybit[rxtx],
+ if parity_ok(self.options['parity_type'], self.paritybit[rxtx],
self.databyte[rxtx], self.options['num_data_bits']):
# TODO: Fix range.
self.put(self.samplenum, self.samplenum, self.out_proto,
- [T_PARITY_BIT, rxtx, self.paritybit[rxtx]])
+ ['PARITYBIT', rxtx, self.paritybit[rxtx]])
self.put(self.samplenum, self.samplenum, self.out_ann,
[ANN_ASCII, ['Parity bit', 'Parity', 'P']])
else:
# TODO: Fix range.
# TODO: Return expected/actual parity values.
self.put(self.samplenum, self.samplenum, self.out_proto,
- [T_PARITY_ERROR, rxtx, (0, 1)]) # FIXME: Dummy tuple...
+ ['PARITY ERROR', rxtx, (0, 1)]) # FIXME: Dummy tuple...
self.put(self.samplenum, self.samplenum, self.out_ann,
[ANN_ASCII, ['Parity error', 'Parity err', 'PE']])
# TODO: Currently only supports 1 stop bit.
def get_stop_bits(self, rxtx, signal):
# Skip samples until we're in the middle of the stop bit(s).
- skip_parity = 0 if self.options['parity'] == PARITY_NONE else 1
+ skip_parity = 0 if self.options['parity_type'] == PARITY_NONE else 1
b = self.options['num_data_bits'] + 1 + skip_parity
if not self.reached_bit(rxtx, b):
return
# Stop bits must be 1. If not, we report an error.
if self.stopbit1[rxtx] != 1:
self.put(self.frame_start[rxtx], self.samplenum, self.out_proto,
- [T_INVALID_STOP, rxtx, self.stopbit1[rxtx]])
+ ['INVALID STOPBIT', rxtx, self.stopbit1[rxtx]])
# TODO: Abort? Ignore the frame? Other?
self.state[rxtx] = WAIT_FOR_START_BIT
# TODO: Fix range.
self.put(self.samplenum, self.samplenum, self.out_proto,
- [T_STOP, rxtx, self.stopbit1[rxtx]])
+ ['STOPBIT', rxtx, self.stopbit1[rxtx]])
self.put(self.samplenum, self.samplenum, self.out_ann,
[ANN_ASCII, ['Stop bit', 'Stop', 'P']])
- def decode(self, ss, es, data): # TODO
+ def decode(self, ss, es, data):
+ # TODO: Either RX or TX could be omitted (optional probe).
for (samplenum, (rx, tx)) in data:
# TODO: Start counting at 0 or 1? Increase before or after?
elif self.state[rxtx] == GET_STOP_BITS:
self.get_stop_bits(rxtx, signal)
else:
- raise Exception('Invalid state: %s' % self.state[rxtx])
+ raise Exception('Invalid state: %d' % self.state[rxtx])
# Save current RX/TX values for the next round.
self.oldbit[rxtx] = signal
projects / libsigrokdecode.git / blobdiff