def bcd2int(b):
return (b & 0x0f) + ((b >> 4) * 10)
+def reg_list():
+ l = []
+ for i in range(8 + 1):
+ l.append(('reg-0x%02x' % i, 'Register 0x%02x' % i))
+
+ return tuple(l)
+
class Decoder(srd.Decoder):
- api_version = 1
+ api_version = 2
id = 'rtc8564'
name = 'RTC-8564'
longname = 'Epson RTC-8564 JE/NB'
license = 'gplv2+'
inputs = ['i2c']
outputs = ['rtc8564']
- probes = []
- optional_probes = [
- {'id': 'clkout', 'name': 'CLKOUT', 'desc': 'Clock output'},
- {'id': 'clkoe', 'name': 'CLKOE', 'desc': 'Clock output enable'},
- {'id': 'int', 'name': 'INT#', 'desc': 'Interrupt'},
- ]
- options = {}
- annotations = [
- ['reg-0x00', 'Register 0x00'],
- ['reg-0x01', 'Register 0x01'],
- ['reg-0x02', 'Register 0x02'],
- ['reg-0x03', 'Register 0x03'],
- ['reg-0x04', 'Register 0x04'],
- ['reg-0x05', 'Register 0x05'],
- ['reg-0x06', 'Register 0x06'],
- ['reg-0x07', 'Register 0x07'],
- ['reg-0x08', 'Register 0x08'],
- ['read', 'Read date/time'],
- ['write', 'Write date/time'],
- ['bit-reserved', 'Reserved bit'],
- ['bit-vl', 'VL bit'],
- ['bit-century', 'Century bit'],
- ['reg-read', 'Register read'],
- ['reg-write', 'Register write'],
- ]
+ annotations = reg_list() + (
+ ('read', 'Read date/time'),
+ ('write', 'Write date/time'),
+ ('bit-reserved', 'Reserved bit'),
+ ('bit-vl', 'VL bit'),
+ ('bit-century', 'Century bit'),
+ ('reg-read', 'Register read'),
+ ('reg-write', 'Register write'),
+ )
annotation_rows = (
('bits', 'Bits', tuple(range(0, 8 + 1)) + (11, 12, 13)),
('regs', 'Register access', (14, 15)),
self.bits = []
def start(self):
- # self.out_python = self.register(srd.OUTPUT_PYTHON)
self.out_ann = self.register(srd.OUTPUT_ANN)
def putx(self, data):
self.state = 'IDLE'
else:
pass # TODO?
- else:
- raise Exception('Invalid state: %s' % self.state)
-