All PDs: More consistent OUTPUT_PYTHON format docs.

[libsigrokdecode.git] / decoders / jtag / pd.py

diff --git a/decoders/jtag/pd.py b/decoders/jtag/pd.py
index 024192422808cf14dd4c44aed6ae4a5c96bbfe92..25f26342183ba14bebc181fbeffeb85d4616ee58 100644 (file)
--- a/decoders/jtag/pd.py
+++ b/decoders/jtag/pd.py
@@ -21,13 +21,13 @@
 import sigrokdecode as srd
 
 '''
-Protocol output format:
+OUTPUT_PYTHON format:
 
-JTAG packet:
-[<packet-type>, <data>]
+Packet:
+[<ptype>, <pdata>]
 
-<packet-type> is one of:
- - 'NEW STATE': <data> is the new state of the JTAG state machine.
+<ptype>:
+ - 'NEW STATE': <pdata> is the new state of the JTAG state machine.
    Valid values: 'TEST-LOGIC-RESET', 'RUN-TEST/IDLE', 'SELECT-DR-SCAN',
    'CAPTURE-DR', 'SHIFT-DR', 'EXIT1-DR', 'PAUSE-DR', 'EXIT2-DR', 'UPDATE-DR',
    'SELECT-IR-SCAN', 'CAPTURE-IR', 'SHIFT-IR', 'EXIT1-IR', 'PAUSE-IR',
@@ -53,14 +53,8 @@ jtag_states = [
         'SHIFT-IR', 'EXIT1-IR', 'EXIT2-IR',
 ]
 
-def get_annotation_classes():
-    l = []
-    for s in jtag_states:
-        l.append([s.lower(), s])
-    return l
-
 class Decoder(srd.Decoder):
-    api_version = 1
+    api_version = 2
     id = 'jtag'
     name = 'JTAG'
     longname = 'Joint Test Action Group (IEEE 1149.1)'
@@ -68,19 +62,18 @@ class Decoder(srd.Decoder):
     license = 'gplv2+'
     inputs = ['logic']
     outputs = ['jtag']
-    probes = [
+    channels = (
         {'id': 'tdi',  'name': 'TDI',  'desc': 'Test data input'},
         {'id': 'tdo',  'name': 'TDO',  'desc': 'Test data output'},
         {'id': 'tck',  'name': 'TCK',  'desc': 'Test clock'},
         {'id': 'tms',  'name': 'TMS',  'desc': 'Test mode select'},
-    ]
-    optional_probes = [
+    )
+    optional_channels = (
         {'id': 'trst', 'name': 'TRST#', 'desc': 'Test reset'},
         {'id': 'srst', 'name': 'SRST#', 'desc': 'System reset'},
         {'id': 'rtck', 'name': 'RTCK',  'desc': 'Return clock signal'},
-    ]
-    options = {}
-    annotations = get_annotation_classes()
+    )
+    annotations = tuple([tuple([s.lower(), s]) for s in jtag_states])
 
     def __init__(self, **kwargs):
         # self.state = 'TEST-LOGIC-RESET'
@@ -96,14 +89,14 @@ class Decoder(srd.Decoder):
         self.first = True
 
     def start(self):
-        self.out_proto = self.register(srd.OUTPUT_PYTHON)
+        self.out_python = self.register(srd.OUTPUT_PYTHON)
         self.out_ann = self.register(srd.OUTPUT_ANN)
 
     def putx(self, data):
         self.put(self.ss_item, self.es_item, self.out_ann, data)
 
     def putp(self, data):
-        self.put(self.ss_item, self.es_item, self.out_proto, data)
+        self.put(self.ss_item, self.es_item, self.out_python, data)
 
     def advance_state_machine(self, tms):
         self.oldstate = self.state
@@ -207,7 +200,7 @@ class Decoder(srd.Decoder):
             self.oldpins = pins
 
             # Get individual pin values into local variables.
-            # Unused probes will have a value of > 1.
+            # Unused channels will have a value of > 1.
             (tdi, tdo, tck, tms, trst, srst, rtck) = pins
 
             # We only care about TCK edges (either rising or falling).