srd: Add MX25Lxx05D SPI chip decoder.

[libsigrokdecode.git] / decoders / i2c.py

diff --git a/decoders/i2c.py b/decoders/i2c.py
index 16e74913deb27a1799fd847f4d1c1efd54e2498a..659ea553b6c77949684c849ab1337749d303e45c 100644 (file)
--- a/decoders/i2c.py
+++ b/decoders/i2c.py
@@ -126,6 +126,8 @@
 #  'signals': [{'SCL': }]}
 #
 
+import sigrok
+
 # States
 FIND_START = 0
 FIND_ADDRESS = 1
@@ -142,7 +144,7 @@ def sampleiter(data, unitsize):
     for i in range(0, len(data), unitsize):
         yield(Sample(data[i:i+unitsize]))
 
-class Decoder():
+class Decoder(sigrok.Decoder):
     id = 'i2c'
     name = 'I2C'
     longname = 'Inter-Integrated Circuit (I2C) bus'
@@ -238,12 +240,12 @@ class Decoder():
         # We received 8 address/data bits and the ACK/NACK bit.
         self.databyte >>= 1 # Shift out unwanted ACK/NACK bit here.
 
-        ack = (sda == 1) and 'N' or 'A'
+        ack = 'N' if (sda == 1) else 'A'
 
         if self.state == FIND_ADDRESS:
             d = self.databyte & 0xfe
             # The READ/WRITE bit is only in address bytes, not data bytes.
-            self.wr = (self.databyte & 1) and 1 or 0
+            self.wr = 1 if (self.databyte & 1) else 0
         elif self.state == FIND_DATA:
             d = self.databyte
         else:
@@ -348,9 +350,5 @@ class Decoder():
             self.oldsda = sda
 
         if out != []:
-            sigrok.put(out)
-
-import sigrok
-
-sigrok.register(Decoder)
+            self.put(out)