srd: Decoders: Fix/simplify samplenum usage.

[libsigrokdecode.git] / decoders / dcf77 / dcf77.py

diff --git a/decoders/dcf77/dcf77.py b/decoders/dcf77/dcf77.py
index 53795926177345ffd9e22ad59586e12d9497e7c8..573888f15e88e91c20d7521d98d55df5fac3adaa 100644 (file)
--- a/decoders/dcf77/dcf77.py
+++ b/decoders/dcf77/dcf77.py
@@ -18,25 +18,11 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-#
 # DCF77 protocol decoder
-#
-# More information:
-# http://en.wikipedia.org/wiki/DCF77
-#
-
-#
-# Protocol output format:
-# TODO
-#
 
 import sigrokdecode as srd
 import calendar
 
-# States
-WAIT_FOR_RISING_EDGE = 0
-GET_BIT = 1
-
 # Annotation feed formats
 ANN_ASCII = 0
 
@@ -50,14 +36,13 @@ class Decoder(srd.Decoder):
     name = 'DCF77'
     longname = 'DCF77 time protocol'
     desc = 'TODO.'
-    longdesc = 'TODO.'
     license = 'gplv2+'
     inputs = ['logic']
     outputs = ['dcf77']
     probes = [
         {'id': 'data', 'name': 'DATA', 'desc': 'DATA line'},
     ]
-    extra_probes = [
+    optional_probes = [
         {'id': 'pon', 'name': 'PON', 'desc': 'TODO'},
     ]
     options = {}
@@ -67,7 +52,7 @@ class Decoder(srd.Decoder):
     ]
 
     def __init__(self, **kwargs):
-        self.state = WAIT_FOR_RISING_EDGE
+        self.state = 'WAIT FOR RISING EDGE'
         self.oldval = None
         self.samplenum = 0
         self.bit_start = 0
@@ -214,11 +199,9 @@ class Decoder(srd.Decoder):
             raise Exception('Invalid DCF77 bit: %d' % c)
 
     def decode(self, ss, es, data):
-        for samplenum, (val) in data: # TODO: Handle optional PON.
-
-            self.samplenum += 1 # FIXME. Use samplenum. Off-by-one?
+        for (self.samplenum, (val)) in data: # TODO: Handle optional PON.
 
-            if self.state == WAIT_FOR_RISING_EDGE:
+            if self.state == 'WAIT FOR RISING EDGE':
                 # Wait until the next rising edge occurs.
                 if not (self.oldval == 0 and val == 1):
                     self.oldval = val
@@ -272,7 +255,7 @@ class Decoder(srd.Decoder):
                     self.handle_dcf77_bit(bit)
                     self.bitcount += 1
 
-                self.state = WAIT_FOR_RISING_EDGE
+                self.state = 'WAIT FOR RISING EDGE'
 
             else:
                 raise Exception('Invalid state: %d' % self.state)