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uart: Define annotation rows.
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1/*
2 * This file is part of the libsigrokdecode project.
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "libsigrokdecode.h" /* First, so we avoid a _POSIX_C_SOURCE warning. */
21#include "config.h"
22#include <inttypes.h>
23#include <string.h>
24
25static PyObject *srd_logic_iter(PyObject *self)
26{
27 return self;
28}
29
30static PyObject *srd_logic_iternext(PyObject *self)
31{
32 srd_logic *logic;
33 PyObject *py_samplenum, *py_samples;
34 uint8_t *sample_pos, sample;
35 int byte_offset, bit_offset, i;
36
37 logic = (srd_logic *)self;
38 if (logic->itercnt >= logic->inbuflen / logic->di->data_unitsize) {
39 /* End iteration loop. */
40 return NULL;
41 }
42
43 /*
44 * Convert the bit-packed sample to an array of bytes, with only 0x01
45 * and 0x00 values, so the PD doesn't need to do any bitshifting.
46 */
47 sample_pos = logic->inbuf + logic->itercnt * logic->di->data_unitsize;
48 for (i = 0; i < logic->di->dec_num_probes; i++) {
49 /* A probemap value of -1 means "unused optional probe". */
50 if (logic->di->dec_probemap[i] == -1) {
51 /* Value of unused probe is 0xff, instead of 0 or 1. */
52 logic->di->probe_samples[i] = 0xff;
53 } else {
54 byte_offset = logic->di->dec_probemap[i] / 8;
55 bit_offset = logic->di->dec_probemap[i] % 8;
56 sample = *(sample_pos + byte_offset) & (1 << bit_offset) ? 1 : 0;
57 logic->di->probe_samples[i] = sample;
58 }
59 }
60
61 /* Prepare the next samplenum/sample list in this iteration. */
62 py_samplenum =
63 PyLong_FromUnsignedLongLong(logic->start_samplenum +
64 logic->itercnt);
65 PyList_SetItem(logic->sample, 0, py_samplenum);
66 py_samples = PyBytes_FromStringAndSize((const char *)logic->di->probe_samples,
67 logic->di->dec_num_probes);
68 PyList_SetItem(logic->sample, 1, py_samples);
69 Py_INCREF(logic->sample);
70 logic->itercnt++;
71
72 return logic->sample;
73}
74
75/** @cond PRIVATE */
76SRD_PRIV PyTypeObject srd_logic_type = {
77 PyVarObject_HEAD_INIT(NULL, 0)
78 .tp_name = "srd_logic",
79 .tp_basicsize = sizeof(srd_logic),
80 .tp_flags = Py_TPFLAGS_DEFAULT,
81 .tp_doc = "Sigrokdecode logic sample object",
82 .tp_iter = srd_logic_iter,
83 .tp_iternext = srd_logic_iternext,
84};
85/** @endcond */