]> sigrok.org Git - libsigrokdecode.git/blame_incremental - decoders/onewire_network/pd.py
Probes, optional probes and annotations now take a tuple.
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1##
2## This file is part of the libsigrokdecode project.
3##
4## Copyright (C) 2012 Iztok Jeras <iztok.jeras@gmail.com>
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; either version 2 of the License, or
9## (at your option) any later version.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
16## You should have received a copy of the GNU General Public License
17## along with this program; if not, write to the Free Software
18## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19##
20
21import sigrokdecode as srd
22
23# Dictionary of ROM commands and their names, next state.
24command = {
25 0x33: ['Read ROM' , 'GET ROM' ],
26 0x0f: ['Conditional read ROM' , 'GET ROM' ],
27 0xcc: ['Skip ROM' , 'TRANSPORT' ],
28 0x55: ['Match ROM' , 'GET ROM' ],
29 0xf0: ['Search ROM' , 'SEARCH ROM'],
30 0xec: ['Conditional search ROM', 'SEARCH ROM'],
31 0x3c: ['Overdrive skip ROM' , 'TRANSPORT' ],
32 0x69: ['Overdrive match ROM' , 'GET ROM' ],
33}
34
35class Decoder(srd.Decoder):
36 api_version = 1
37 id = 'onewire_network'
38 name = '1-Wire network layer'
39 longname = '1-Wire serial communication bus (network layer)'
40 desc = 'Bidirectional, half-duplex, asynchronous serial bus.'
41 license = 'gplv2+'
42 inputs = ['onewire_link']
43 outputs = ['onewire_network']
44 annotations = (
45 ('text', 'Human-readable text'),
46 )
47
48 def __init__(self, **kwargs):
49 self.beg = 0
50 self.end = 0
51 self.state = 'COMMAND'
52 self.bit_cnt = 0
53 self.search = 'P'
54 self.data_p = 0x0
55 self.data_n = 0x0
56 self.data = 0x0
57 self.rom = 0x0000000000000000
58
59 def start(self):
60 self.out_python = self.register(srd.OUTPUT_PYTHON)
61 self.out_ann = self.register(srd.OUTPUT_ANN)
62
63 def putx(self, data):
64 # Helper function for most annotations.
65 self.put(self.beg, self.end, self.out_ann, data)
66
67 def puty(self, data):
68 # Helper function for most protocol packets.
69 self.put(self.beg, self.end, self.out_python, data)
70
71 def decode(self, ss, es, data):
72 code, val = data
73
74 # State machine.
75 if code == 'RESET/PRESENCE':
76 self.search = 'P'
77 self.bit_cnt = 0
78 self.put(ss, es, self.out_ann,
79 [0, ['Reset/presence: %s' % ('true' if val else 'false')]])
80 self.put(ss, es, self.out_python, ['RESET/PRESENCE', val])
81 self.state = 'COMMAND'
82 return
83
84 # For now we're only interested in 'RESET/PRESENCE' and 'BIT' packets.
85 if code != 'BIT':
86 return
87
88 if self.state == 'COMMAND':
89 # Receiving and decoding a ROM command.
90 if self.onewire_collect(8, val, ss, es) == 0:
91 return
92 if self.data in command:
93 self.putx([0, ['ROM command: 0x%02x \'%s\''
94 % (self.data, command[self.data][0])]])
95 self.state = command[self.data][1]
96 else:
97 self.putx([0, ['ROM command: 0x%02x \'%s\''
98 % (self.data, 'unrecognized')]])
99 self.state = 'COMMAND ERROR'
100 elif self.state == 'GET ROM':
101 # A 64 bit device address is selected.
102 # Family code (1 byte) + serial number (6 bytes) + CRC (1 byte)
103 if self.onewire_collect(64, val, ss, es) == 0:
104 return
105 self.rom = self.data & 0xffffffffffffffff
106 self.putx([0, ['ROM: 0x%016x' % self.rom]])
107 self.puty(['ROM', self.rom])
108 self.state = 'TRANSPORT'
109 elif self.state == 'SEARCH ROM':
110 # A 64 bit device address is searched for.
111 # Family code (1 byte) + serial number (6 bytes) + CRC (1 byte)
112 if self.onewire_search(64, val, ss, es) == 0:
113 return
114 self.rom = self.data & 0xffffffffffffffff
115 self.putx([0, ['ROM: 0x%016x' % self.rom]])
116 self.puty(['ROM', self.rom])
117 self.state = 'TRANSPORT'
118 elif self.state == 'TRANSPORT':
119 # The transport layer is handled in byte sized units.
120 if self.onewire_collect(8, val, ss, es) == 0:
121 return
122 self.putx([0, ['Data: 0x%02x' % self.data]])
123 self.puty(['DATA', self.data])
124 elif self.state == 'COMMAND ERROR':
125 # Since the command is not recognized, print raw data.
126 if self.onewire_collect(8, val, ss, es) == 0:
127 return
128 self.putx([0, ['ROM error data: 0x%02x' % self.data]])
129 else:
130 raise Exception('Invalid state: %s' % self.state)
131
132 # Data collector.
133 def onewire_collect(self, length, val, ss, es):
134 # Storing the sample this sequence begins with.
135 if self.bit_cnt == 1:
136 self.beg = ss
137 self.data = self.data & ~(1 << self.bit_cnt) | (val << self.bit_cnt)
138 self.bit_cnt += 1
139 # Storing the sample this sequence ends with.
140 # In case the full length of the sequence is received, return 1.
141 if self.bit_cnt == length:
142 self.end = es
143 self.data = self.data & ((1 << length) - 1)
144 self.bit_cnt = 0
145 return 1
146 else:
147 return 0
148
149 # Search collector.
150 def onewire_search(self, length, val, ss, es):
151 # Storing the sample this sequence begins with.
152 if (self.bit_cnt == 0) and (self.search == 'P'):
153 self.beg = ss
154
155 if self.search == 'P':
156 # Master receives an original address bit.
157 self.data_p = self.data_p & ~(1 << self.bit_cnt) | \
158 (val << self.bit_cnt)
159 self.search = 'N'
160 elif self.search == 'N':
161 # Master receives a complemented address bit.
162 self.data_n = self.data_n & ~(1 << self.bit_cnt) | \
163 (val << self.bit_cnt)
164 self.search = 'D'
165 elif self.search == 'D':
166 # Master transmits an address bit.
167 self.data = self.data & ~(1 << self.bit_cnt) | (val << self.bit_cnt)
168 self.search = 'P'
169 self.bit_cnt += 1
170
171 # Storing the sample this sequence ends with.
172 # In case the full length of the sequence is received, return 1.
173 if self.bit_cnt == length:
174 self.end = es
175 self.data_p = self.data_p & ((1 << length) - 1)
176 self.data_n = self.data_n & ((1 << length) - 1)
177 self.data = self.data & ((1 << length) - 1)
178 self.search = 'P'
179 self.bit_cnt = 0
180 return 1
181 else:
182 return 0