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1 | ## | |
2 | ## This file is part of the libsigrokdecode project. | |
3 | ## | |
4 | ## Copyright (C) 2010-2014 Uwe Hermann <uwe@hermann-uwe.de> | |
5 | ## | |
6 | ## This program is free software; you can redistribute it and/or modify | |
7 | ## it under the terms of the GNU General Public License as published by | |
8 | ## the Free Software Foundation; either version 2 of the License, or | |
9 | ## (at your option) any later version. | |
10 | ## | |
11 | ## This program is distributed in the hope that it will be useful, | |
12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ## GNU General Public License for more details. | |
15 | ## | |
16 | ## You should have received a copy of the GNU General Public License | |
17 | ## along with this program; if not, write to the Free Software | |
18 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | ## | |
20 | ||
21 | import sigrokdecode as srd | |
22 | ||
23 | class Decoder(srd.Decoder): | |
24 | api_version = 1 | |
25 | id = 'nunchuk' | |
26 | name = 'Nunchuk' | |
27 | longname = 'Nintendo Wii Nunchuk' | |
28 | desc = 'Nintendo Wii Nunchuk controller protocol.' | |
29 | license = 'gplv2+' | |
30 | inputs = ['i2c'] | |
31 | outputs = ['nunchuck'] | |
32 | annotations = \ | |
33 | tuple(('reg-0x%02X' % i, 'Register 0x%02X' % i) for i in range(6)) + ( | |
34 | ('bit-bz', 'BZ bit'), | |
35 | ('bit-bc', 'BC bit'), | |
36 | ('bit-ax', 'AX bits'), | |
37 | ('bit-ay', 'AY bits'), | |
38 | ('bit-az', 'AZ bits'), | |
39 | ('nunchuk-write', 'Nunchuk write'), | |
40 | ('cmd-init', 'Init command'), | |
41 | ('summary', 'Summary'), | |
42 | ('warnings', 'Warnings'), | |
43 | ) | |
44 | annotation_rows = ( | |
45 | ('regs', 'Registers', tuple(range(13))), | |
46 | ('summary', 'Summary', (13,)), | |
47 | ('warnings', 'Warnings', (14,)), | |
48 | ) | |
49 | ||
50 | def __init__(self, **kwargs): | |
51 | self.state = 'IDLE' | |
52 | self.sx = self.sy = self.ax = self.ay = self.az = self.bz = self.bc = -1 | |
53 | self.databytecount = 0 | |
54 | self.reg = 0x00 | |
55 | self.ss = self.es = self.block_ss = self.block_es = 0 | |
56 | self.init_seq = [] | |
57 | ||
58 | def start(self): | |
59 | # self.out_python = self.register(srd.OUTPUT_PYTHON) | |
60 | self.out_ann = self.register(srd.OUTPUT_ANN) | |
61 | ||
62 | def putx(self, data): | |
63 | self.put(self.ss, self.es, self.out_ann, data) | |
64 | ||
65 | def putb(self, data): | |
66 | self.put(self.block_ss, self.block_es, self.out_ann, data) | |
67 | ||
68 | def putd(self, bit1, bit2, data): | |
69 | self.put(self.bits[bit1][1], self.bits[bit2][2], self.out_ann, data) | |
70 | ||
71 | def handle_reg_0x00(self, databyte): | |
72 | self.block_ss = self.ss | |
73 | self.sx = databyte | |
74 | self.putx([0, ['Analog stick X position: 0x%02X' % self.sx, | |
75 | 'SX: 0x%02X' % self.sx]]) | |
76 | ||
77 | def handle_reg_0x01(self, databyte): | |
78 | self.sy = databyte | |
79 | self.putx([1, ['Analog stick Y position: 0x%02X' % self.sy, | |
80 | 'SY: 0x%02X' % self.sy]]) | |
81 | ||
82 | def handle_reg_0x02(self, databyte): | |
83 | self.ax = databyte << 2 | |
84 | self.putx([2, ['Accelerometer X value bits[9:2]: 0x%03X' % self.ax, | |
85 | 'AX[9:2]: 0x%03X' % self.ax]]) | |
86 | ||
87 | def handle_reg_0x03(self, databyte): | |
88 | self.ay = databyte << 2 | |
89 | self.putx([3, ['Accelerometer Y value bits[9:2]: 0x%03X' % self.ay, | |
90 | 'AY[9:2]: 0x%03X' % self.ay]]) | |
91 | ||
92 | def handle_reg_0x04(self, databyte): | |
93 | self.az = databyte << 2 | |
94 | self.putx([4, ['Accelerometer Z value bits[9:2]: 0x%03X' % self.az, | |
95 | 'AZ[9:2]: 0x%03X' % self.az]]) | |
96 | ||
97 | def handle_reg_0x05(self, databyte): | |
98 | self.block_es = self.es | |
99 | self.bz = (databyte & (1 << 0)) >> 0 # Bits[0:0] | |
100 | self.bc = (databyte & (1 << 1)) >> 1 # Bits[1:1] | |
101 | ax_rest = (databyte & (3 << 2)) >> 2 # Bits[3:2] | |
102 | ay_rest = (databyte & (3 << 4)) >> 4 # Bits[5:4] | |
103 | az_rest = (databyte & (3 << 6)) >> 6 # Bits[7:6] | |
104 | self.ax |= ax_rest | |
105 | self.ay |= ay_rest | |
106 | self.az |= az_rest | |
107 | ||
108 | # self.putx([5, ['Register 5', 'Reg 5', 'R5']]) | |
109 | ||
110 | s = '' if (self.bz == 0) else 'not ' | |
111 | self.putd(0, 0, [6, ['Z: %spressed' % s, 'BZ: %d' % self.bz]]) | |
112 | ||
113 | s = '' if (self.bc == 0) else 'not ' | |
114 | self.putd(1, 1, [7, ['C: %spressed' % s, 'BC: %d' % self.bc]]) | |
115 | ||
116 | self.putd(3, 2, [8, ['Accelerometer X value bits[1:0]: 0x%X' % ax_rest, | |
117 | 'AX[1:0]: 0x%X' % ax_rest]]) | |
118 | ||
119 | self.putd(5, 4, [9, ['Accelerometer Y value bits[1:0]: 0x%X' % ay_rest, | |
120 | 'AY[1:0]: 0x%X' % ay_rest]]) | |
121 | ||
122 | self.putd(7, 6, [10, ['Accelerometer Z value bits[1:0]: 0x%X' % az_rest, | |
123 | 'AZ[1:0]: 0x%X' % az_rest]]) | |
124 | ||
125 | self.reg = 0x00 | |
126 | ||
127 | def output_full_block_if_possible(self): | |
128 | # For now, only output summary annotations if all values are available. | |
129 | t = (self.sx, self.sy, self.ax, self.ay, self.az, self.bz, self.bc) | |
130 | if -1 in t: | |
131 | return | |
132 | bz = 'pressed' if self.bz == 1 else 'not pressed' | |
133 | bc = 'pressed' if self.bc == 1 else 'not pressed' | |
134 | s = 'Analog stick: %d/%d, accelerometer: %d/%d/%d, Z: %s, C: %s' % \ | |
135 | (self.sx, self.sy, self.ax, self.ay, self.az, bz, bc) | |
136 | self.putb([13, [s]]) | |
137 | ||
138 | def handle_reg_write(self, databyte): | |
139 | self.putx([11, ['Nunchuk write: 0x%02X' % databyte]]) | |
140 | if len(self.init_seq) < 2: | |
141 | self.init_seq.append(databyte) | |
142 | ||
143 | def output_init_seq(self): | |
144 | if len(self.init_seq) != 2: | |
145 | self.putb([14, ['Init sequence was %d bytes long (2 expected)' % \ | |
146 | len(self.init_seq)]]) | |
147 | return | |
148 | ||
149 | if self.init_seq != [0x40, 0x00]: | |
150 | self.putb([14, ['Unknown init sequence (expected: 0x40 0x00)']]) | |
151 | return | |
152 | ||
153 | # TODO: Detect Nunchuk clones (they have different init sequences). | |
154 | ||
155 | self.putb([12, ['Initialize Nunchuk', 'Init Nunchuk', 'Init', 'I']]) | |
156 | ||
157 | def decode(self, ss, es, data): | |
158 | cmd, databyte = data | |
159 | ||
160 | # Collect the 'BITS' packet, then return. The next packet is | |
161 | # guaranteed to belong to these bits we just stored. | |
162 | if cmd == 'BITS': | |
163 | self.bits = databyte | |
164 | return | |
165 | ||
166 | self.ss, self.es = ss, es | |
167 | ||
168 | # State machine. | |
169 | if self.state == 'IDLE': | |
170 | # Wait for an I²C START condition. | |
171 | if cmd != 'START': | |
172 | return | |
173 | self.state = 'GET SLAVE ADDR' | |
174 | self.block_start_sample = ss | |
175 | elif self.state == 'GET SLAVE ADDR': | |
176 | # Wait for an address read/write operation. | |
177 | if cmd == 'ADDRESS READ': | |
178 | self.state = 'READ REGS' | |
179 | elif cmd == 'ADDRESS WRITE': | |
180 | self.state = 'WRITE REGS' | |
181 | elif self.state == 'READ REGS': | |
182 | if cmd == 'DATA READ': | |
183 | handle_reg = getattr(self, 'handle_reg_0x%02x' % self.reg) | |
184 | handle_reg(databyte) | |
185 | self.reg += 1 | |
186 | elif cmd == 'STOP': | |
187 | self.block_end_sample = es | |
188 | self.output_full_block_if_possible() | |
189 | self.sx = self.sy = self.ax = self.ay = self.az = -1 | |
190 | self.bz = self.bc = -1 | |
191 | self.state = 'IDLE' | |
192 | else: | |
193 | # self.putx([14, ['Ignoring: %s (data=%s)' % (cmd, databyte)]]) | |
194 | pass | |
195 | elif self.state == 'WRITE REGS': | |
196 | if cmd == 'DATA WRITE': | |
197 | self.handle_reg_write(databyte) | |
198 | elif cmd == 'STOP': | |
199 | self.block_end_sample = es | |
200 | self.output_init_seq() | |
201 | self.init_seq = [] | |
202 | self.state = 'IDLE' | |
203 | else: | |
204 | # self.putx([14, ['Ignoring: %s (data=%s)' % (cmd, databyte)]]) | |
205 | pass | |
206 | else: | |
207 | raise Exception('Invalid state: %s' % self.state) | |
208 |