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1 | ## | |
2 | ## This file is part of the libsigrokdecode project. | |
3 | ## | |
4 | ## Copyright (C) 2012-2013 Uwe Hermann <uwe@hermann-uwe.de> | |
5 | ## | |
6 | ## This program is free software; you can redistribute it and/or modify | |
7 | ## it under the terms of the GNU General Public License as published by | |
8 | ## the Free Software Foundation; either version 2 of the License, or | |
9 | ## (at your option) any later version. | |
10 | ## | |
11 | ## This program is distributed in the hope that it will be useful, | |
12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ## GNU General Public License for more details. | |
15 | ## | |
16 | ## You should have received a copy of the GNU General Public License | |
17 | ## along with this program; if not, write to the Free Software | |
18 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | ## | |
20 | ||
21 | import sigrokdecode as srd | |
22 | ||
23 | ''' | |
24 | Protocol output format: | |
25 | ||
26 | JTAG packet: | |
27 | [<packet-type>, <data>] | |
28 | ||
29 | <packet-type> is one of: | |
30 | - 'NEW STATE': <data> is the new state of the JTAG state machine. | |
31 | Valid values: 'TEST-LOGIC-RESET', 'RUN-TEST/IDLE', 'SELECT-DR-SCAN', | |
32 | 'CAPTURE-DR', 'SHIFT-DR', 'EXIT1-DR', 'PAUSE-DR', 'EXIT2-DR', 'UPDATE-DR', | |
33 | 'SELECT-IR-SCAN', 'CAPTURE-IR', 'SHIFT-IR', 'EXIT1-IR', 'PAUSE-IR', | |
34 | 'EXIT2-IR', 'UPDATE-IR'. | |
35 | - 'IR TDI': Bitstring that was clocked into the IR register. | |
36 | - 'IR TDO': Bitstring that was clocked out of the IR register. | |
37 | - 'DR TDI': Bitstring that was clocked into the DR register. | |
38 | - 'DR TDO': Bitstring that was clocked out of the DR register. | |
39 | - ... | |
40 | ||
41 | All bitstrings are a sequence of '1' and '0' characters. The right-most | |
42 | character in the bitstring is the LSB. Example: '01110001' (1 is LSB). | |
43 | ''' | |
44 | ||
45 | jtag_states = [ | |
46 | # Intro "tree" | |
47 | 'TEST-LOGIC-RESET', 'RUN-TEST/IDLE', | |
48 | # DR "tree" | |
49 | 'SELECT-DR-SCAN', 'CAPTURE-DR', 'UPDATE-DR', 'PAUSE-DR', | |
50 | 'SHIFT-DR', 'EXIT1-DR', 'EXIT2-DR', | |
51 | # IR "tree" | |
52 | 'SELECT-IR-SCAN', 'CAPTURE-IR', 'UPDATE-IR', 'PAUSE-IR', | |
53 | 'SHIFT-IR', 'EXIT1-IR', 'EXIT2-IR', | |
54 | ] | |
55 | ||
56 | def get_annotation_classes(): | |
57 | l = [] | |
58 | for s in jtag_states: | |
59 | l.append([s.lower(), s]) | |
60 | return l | |
61 | ||
62 | class Decoder(srd.Decoder): | |
63 | api_version = 1 | |
64 | id = 'jtag' | |
65 | name = 'JTAG' | |
66 | longname = 'Joint Test Action Group (IEEE 1149.1)' | |
67 | desc = 'Protocol for testing, debugging, and flashing ICs.' | |
68 | license = 'gplv2+' | |
69 | inputs = ['logic'] | |
70 | outputs = ['jtag'] | |
71 | probes = [ | |
72 | {'id': 'tdi', 'name': 'TDI', 'desc': 'Test data input'}, | |
73 | {'id': 'tdo', 'name': 'TDO', 'desc': 'Test data output'}, | |
74 | {'id': 'tck', 'name': 'TCK', 'desc': 'Test clock'}, | |
75 | {'id': 'tms', 'name': 'TMS', 'desc': 'Test mode select'}, | |
76 | ] | |
77 | optional_probes = [ | |
78 | {'id': 'trst', 'name': 'TRST#', 'desc': 'Test reset'}, | |
79 | {'id': 'srst', 'name': 'SRST#', 'desc': 'System reset'}, | |
80 | {'id': 'rtck', 'name': 'RTCK', 'desc': 'Return clock signal'}, | |
81 | ] | |
82 | options = {} | |
83 | annotations = get_annotation_classes() | |
84 | ||
85 | def __init__(self, **kwargs): | |
86 | # self.state = 'TEST-LOGIC-RESET' | |
87 | self.state = 'RUN-TEST/IDLE' | |
88 | self.oldstate = None | |
89 | self.oldpins = (-1, -1, -1, -1) | |
90 | self.oldtck = -1 | |
91 | self.bits_tdi = [] | |
92 | self.bits_tdo = [] | |
93 | self.samplenum = 0 | |
94 | self.ss_item = self.es_item = None | |
95 | self.saved_item = None | |
96 | self.first = True | |
97 | ||
98 | def start(self): | |
99 | self.out_proto = self.register(srd.OUTPUT_PYTHON) | |
100 | self.out_ann = self.register(srd.OUTPUT_ANN) | |
101 | ||
102 | def putx(self, data): | |
103 | self.put(self.ss_item, self.es_item, self.out_ann, data) | |
104 | ||
105 | def putp(self, data): | |
106 | self.put(self.ss_item, self.es_item, self.out_proto, data) | |
107 | ||
108 | def advance_state_machine(self, tms): | |
109 | self.oldstate = self.state | |
110 | ||
111 | # Intro "tree" | |
112 | if self.state == 'TEST-LOGIC-RESET': | |
113 | self.state = 'TEST-LOGIC-RESET' if (tms) else 'RUN-TEST/IDLE' | |
114 | elif self.state == 'RUN-TEST/IDLE': | |
115 | self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE' | |
116 | ||
117 | # DR "tree" | |
118 | elif self.state == 'SELECT-DR-SCAN': | |
119 | self.state = 'SELECT-IR-SCAN' if (tms) else 'CAPTURE-DR' | |
120 | elif self.state == 'CAPTURE-DR': | |
121 | self.state = 'EXIT1-DR' if (tms) else 'SHIFT-DR' | |
122 | elif self.state == 'SHIFT-DR': | |
123 | self.state = 'EXIT1-DR' if (tms) else 'SHIFT-DR' | |
124 | elif self.state == 'EXIT1-DR': | |
125 | self.state = 'UPDATE-DR' if (tms) else 'PAUSE-DR' | |
126 | elif self.state == 'PAUSE-DR': | |
127 | self.state = 'EXIT2-DR' if (tms) else 'PAUSE-DR' | |
128 | elif self.state == 'EXIT2-DR': | |
129 | self.state = 'UPDATE-DR' if (tms) else 'SHIFT-DR' | |
130 | elif self.state == 'UPDATE-DR': | |
131 | self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE' | |
132 | ||
133 | # IR "tree" | |
134 | elif self.state == 'SELECT-IR-SCAN': | |
135 | self.state = 'TEST-LOGIC-RESET' if (tms) else 'CAPTURE-IR' | |
136 | elif self.state == 'CAPTURE-IR': | |
137 | self.state = 'EXIT1-IR' if (tms) else 'SHIFT-IR' | |
138 | elif self.state == 'SHIFT-IR': | |
139 | self.state = 'EXIT1-IR' if (tms) else 'SHIFT-IR' | |
140 | elif self.state == 'EXIT1-IR': | |
141 | self.state = 'UPDATE-IR' if (tms) else 'PAUSE-IR' | |
142 | elif self.state == 'PAUSE-IR': | |
143 | self.state = 'EXIT2-IR' if (tms) else 'PAUSE-IR' | |
144 | elif self.state == 'EXIT2-IR': | |
145 | self.state = 'UPDATE-IR' if (tms) else 'SHIFT-IR' | |
146 | elif self.state == 'UPDATE-IR': | |
147 | self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE' | |
148 | ||
149 | else: | |
150 | raise Exception('Invalid state: %s' % self.state) | |
151 | ||
152 | def handle_rising_tck_edge(self, tdi, tdo, tck, tms): | |
153 | # Rising TCK edges always advance the state machine. | |
154 | self.advance_state_machine(tms) | |
155 | ||
156 | if self.first == True: | |
157 | # Save the start sample and item for later (no output yet). | |
158 | self.ss_item = self.samplenum | |
159 | self.first = False | |
160 | self.saved_item = self.state | |
161 | else: | |
162 | # Output the saved item (from the last CLK edge to the current). | |
163 | self.es_item = self.samplenum | |
164 | # Output the state we just switched to. | |
165 | self.putx([jtag_states.index(self.state), [self.state]]) | |
166 | self.putp(['NEW STATE', self.state]) | |
167 | self.ss_item = self.samplenum | |
168 | self.saved_item = self.state | |
169 | ||
170 | # If we went from SHIFT-IR to SHIFT-IR, or SHIFT-DR to SHIFT-DR, | |
171 | # collect the current TDI/TDO values (upon rising TCK edge). | |
172 | if self.state.startswith('SHIFT-') and self.oldstate == self.state: | |
173 | self.bits_tdi.insert(0, tdi) | |
174 | self.bits_tdo.insert(0, tdo) | |
175 | # TODO: ANN/PROTO output. | |
176 | # self.putx([0, ['TDI add: ' + str(tdi)]]) | |
177 | # self.putp([0, ['TDO add: ' + str(tdo)]]) | |
178 | ||
179 | # Output all TDI/TDO bits if we just switched from SHIFT-* to EXIT1-*. | |
180 | if self.oldstate.startswith('SHIFT-') and \ | |
181 | self.state.startswith('EXIT1-'): | |
182 | ||
183 | t = self.state[-2:] + ' TDI' | |
184 | b = ''.join(map(str, self.bits_tdi)) | |
185 | h = ' (0x%x' % int('0b' + b, 2) + ')' | |
186 | s = t + ': ' + b + h + ', ' + str(len(self.bits_tdi)) + ' bits' | |
187 | # self.putx([0, [s]]) | |
188 | # self.putp([t, b]) | |
189 | self.bits_tdi = [] | |
190 | ||
191 | t = self.state[-2:] + ' TDO' | |
192 | b = ''.join(map(str, self.bits_tdo)) | |
193 | h = ' (0x%x' % int('0b' + b, 2) + ')' | |
194 | s = t + ': ' + b + h + ', ' + str(len(self.bits_tdo)) + ' bits' | |
195 | # self.putx([0, [s]]) | |
196 | # self.putp([t, b]) | |
197 | self.bits_tdo = [] | |
198 | ||
199 | def decode(self, ss, es, data): | |
200 | for (self.samplenum, pins) in data: | |
201 | ||
202 | # If none of the pins changed, there's nothing to do. | |
203 | if self.oldpins == pins: | |
204 | continue | |
205 | ||
206 | # Store current pin values for the next round. | |
207 | self.oldpins = pins | |
208 | ||
209 | # Get individual pin values into local variables. | |
210 | # Unused probes will have a value of > 1. | |
211 | (tdi, tdo, tck, tms, trst, srst, rtck) = pins | |
212 | ||
213 | # We only care about TCK edges (either rising or falling). | |
214 | if (self.oldtck == tck): | |
215 | continue | |
216 | ||
217 | # Store start/end sample for later usage. | |
218 | self.ss, self.es = ss, es | |
219 | ||
220 | # self.putx([0, ['tdi:%s, tdo:%s, tck:%s, tms:%s' \ | |
221 | # % (tdi, tdo, tck, tms)]]) | |
222 | ||
223 | if (self.oldtck == 0 and tck == 1): | |
224 | self.handle_rising_tck_edge(tdi, tdo, tck, tms) | |
225 | ||
226 | self.oldtck = tck | |
227 |