[libsigrokdecode.git] / decoders / i2c / pd.py

##
## This file is part of the libsigrokdecode project.
##
## Copyright (C) 2010-2013 Uwe Hermann <uwe@hermann-uwe.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
##

# I2C protocol decoder

# TODO: Look into arbitration, collision detection, clock synchronisation, etc.
# TODO: Handle clock stretching.
# TODO: Handle combined messages / repeated START.
# TODO: Implement support for 7bit and 10bit slave addresses.
# TODO: Implement support for inverting SDA/SCL levels (0->1 and 1->0).
# TODO: Implement support for detecting various bus errors.
# TODO: I2C address of slaves.
# TODO: Handle multiple different I2C devices on same bus
#       -> we need to decode multiple protocols at the same time.

import sigrokdecode as srd

# CMD: [annotation-type-index, long annotation, short annotation]
proto = {
    'START':           [0, 'Start',         'S'],
    'START REPEAT':    [1, 'Start repeat',  'Sr'],
    'STOP':            [2, 'Stop',          'P'],
    'ACK':             [3, 'ACK',           'A'],
    'NACK':            [4, 'NACK',          'N'],
    'ADDRESS READ':    [5, 'Address read',  'AR'],
    'ADDRESS WRITE':   [6, 'Address write', 'AW'],
    'DATA READ':       [7, 'Data read',     'DR'],
    'DATA WRITE':      [8, 'Data write',    'DW'],
}

class Decoder(srd.Decoder):
    api_version = 1
    id = 'i2c'
    name = 'I2C'
    longname = 'Inter-Integrated Circuit'
    desc = 'Two-wire, multi-master, serial bus.'
    license = 'gplv2+'
    inputs = ['logic']
    outputs = ['i2c']
    probes = [
        {'id': 'scl', 'name': 'SCL', 'desc': 'Serial clock line'},
        {'id': 'sda', 'name': 'SDA', 'desc': 'Serial data line'},
    ]
    optional_probes = []
    options = {
        'addressing': ['Slave addressing (in bits)', 7], # 7 or 10
        'address_format': ['Displayed slave address format', 'shifted'],
    }
    annotations = [
        ['Start', 'Start condition'],
        ['Repeat start', 'Repeat start condition'],
        ['Stop', 'Stop condition'],
        ['ACK', 'ACK'],
        ['NACK', 'NACK'],
        ['Address read', 'Address read'],
        ['Address write', 'Address write'],
        ['Data read', 'Data read'],
        ['Data write', 'Data write'],
        ['Warnings', 'Human-readable warnings'],
    ]

    def __init__(self, **kwargs):
        self.startsample = -1
        self.samplenum = None
        self.bitcount = 0
        self.databyte = 0
        self.wr = -1
        self.is_repeat_start = 0
        self.state = 'FIND START'
        self.oldscl = 1
        self.oldsda = 1
        self.oldpins = [1, 1]

    def start(self, metadata):
        self.out_proto = self.add(srd.OUTPUT_PROTO, 'i2c')
        self.out_ann = self.add(srd.OUTPUT_ANN, 'i2c')

    def report(self):
        pass

    def putx(self, data):
        self.put(self.startsample, self.samplenum, self.out_ann, data)

    def putp(self, data):
        self.put(self.startsample, self.samplenum, self.out_proto, data)

    def is_start_condition(self, scl, sda):
        # START condition (S): SDA = falling, SCL = high
        if (self.oldsda == 1 and sda == 0) and scl == 1:
            return True
        return False

    def is_data_bit(self, scl, sda):
        # Data sampling of receiver: SCL = rising
        if self.oldscl == 0 and scl == 1:
            return True
        return False

    def is_stop_condition(self, scl, sda):
        # STOP condition (P): SDA = rising, SCL = high
        if (self.oldsda == 0 and sda == 1) and scl == 1:
            return True
        return False

    def found_start(self, scl, sda):
        self.startsample = self.samplenum
        cmd = 'START REPEAT' if (self.is_repeat_start == 1) else 'START'
        self.putp([cmd, None])
        self.putx([proto[cmd][0], proto[cmd][1:]])
        self.state = 'FIND ADDRESS'
        self.bitcount = self.databyte = 0
        self.is_repeat_start = 1
        self.wr = -1

    # Gather 8 bits of data plus the ACK/NACK bit.
    def found_address_or_data(self, scl, sda):
        # Address and data are transmitted MSB-first.
        self.databyte <<= 1
        self.databyte |= sda

        if self.bitcount == 0:
            self.startsample = self.samplenum

        # Return if we haven't collected all 8 + 1 bits, yet.
        self.bitcount += 1
        if self.bitcount != 8:
            return

        # We triggered on the ACK/NACK bit, but won't report that until later.
        self.startsample -= 1

        d = self.databyte
        if self.state == 'FIND ADDRESS':
            # The READ/WRITE bit is only in address bytes, not data bytes.
            self.wr = 0 if (self.databyte & 1) else 1
            if self.options['address_format'] == 'shifted':
                d = d >> 1

        if self.state == 'FIND ADDRESS' and self.wr == 1:
            cmd = 'ADDRESS WRITE'
        elif self.state == 'FIND ADDRESS' and self.wr == 0:
            cmd = 'ADDRESS READ'
        elif self.state == 'FIND DATA' and self.wr == 1:
            cmd = 'DATA WRITE'
        elif self.state == 'FIND DATA' and self.wr == 0:
            cmd = 'DATA READ'

        self.putp([cmd, d])
        self.putx([proto[cmd][0], ['%s: %02X' % (proto[cmd][1], d),
                  '%s: %02X' % (proto[cmd][2], d), '%02X' % d]])

        # Done with this packet.
        self.startsample = -1
        self.bitcount = self.databyte = 0
        self.state = 'FIND ACK'

    def get_ack(self, scl, sda):
        self.startsample = self.samplenum
        cmd = 'NACK' if (sda == 1) else 'ACK'
        self.putp([cmd, None])
        self.putx([proto[cmd][0], proto[cmd][1:]])
        # There could be multiple data bytes in a row, so either find
        # another data byte or a STOP condition next.
        self.state = 'FIND DATA'

    def found_stop(self, scl, sda):
        self.startsample = self.samplenum
        cmd = 'STOP'
        self.putp([cmd, None])
        self.putx([proto[cmd][0], proto[cmd][1:]])
        self.state = 'FIND START'
        self.is_repeat_start = 0
        self.wr = -1

    def decode(self, ss, es, data):
        for (self.samplenum, pins) in data:

            # Ignore identical samples early on (for performance reasons).
            if self.oldpins == pins:
                continue
            self.oldpins, (scl, sda) = pins, pins

            # TODO: Wait until the bus is idle (SDA = SCL = 1) first?

            # State machine.
            if self.state == 'FIND START':
                if self.is_start_condition(scl, sda):
                    self.found_start(scl, sda)
            elif self.state == 'FIND ADDRESS':
                if self.is_data_bit(scl, sda):
                    self.found_address_or_data(scl, sda)
            elif self.state == 'FIND DATA':
                if self.is_data_bit(scl, sda):
                    self.found_address_or_data(scl, sda)
                elif self.is_start_condition(scl, sda):
                    self.found_start(scl, sda)
                elif self.is_stop_condition(scl, sda):
                    self.found_stop(scl, sda)
            elif self.state == 'FIND ACK':
                if self.is_data_bit(scl, sda):
                    self.get_ack(scl, sda)
            else:
                raise Exception('Invalid state: %s' % self.state)

            # Save current SDA/SCL values for the next round.
            self.oldscl = scl
            self.oldsda = sda
Commit	Line	Data
	1	##
	2	## This file is part of the libsigrokdecode project.
	3	##
	4	## Copyright (C) 2010-2013 Uwe Hermann <uwe@hermann-uwe.de>
	5	##
	6	## This program is free software; you can redistribute it and/or modify
	7	## it under the terms of the GNU General Public License as published by
	8	## the Free Software Foundation; either version 2 of the License, or
	9	## (at your option) any later version.
	10	##
	11	## This program is distributed in the hope that it will be useful,
	12	## but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	## GNU General Public License for more details.
	15	##
	16	## You should have received a copy of the GNU General Public License
	17	## along with this program; if not, write to the Free Software
	18	## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	19	##
	20
	21	# I2C protocol decoder
	22
	23	# TODO: Look into arbitration, collision detection, clock synchronisation, etc.
	24	# TODO: Handle clock stretching.
	25	# TODO: Handle combined messages / repeated START.
	26	# TODO: Implement support for 7bit and 10bit slave addresses.
	27	# TODO: Implement support for inverting SDA/SCL levels (0->1 and 1->0).
	28	# TODO: Implement support for detecting various bus errors.
	29	# TODO: I2C address of slaves.
	30	# TODO: Handle multiple different I2C devices on same bus
	31	# -> we need to decode multiple protocols at the same time.
	32
	33	import sigrokdecode as srd
	34
	35	# CMD: [annotation-type-index, long annotation, short annotation]
	36	proto = {
	37	'START': [0, 'Start', 'S'],
	38	'START REPEAT': [1, 'Start repeat', 'Sr'],
	39	'STOP': [2, 'Stop', 'P'],
	40	'ACK': [3, 'ACK', 'A'],
	41	'NACK': [4, 'NACK', 'N'],
	42	'ADDRESS READ': [5, 'Address read', 'AR'],
	43	'ADDRESS WRITE': [6, 'Address write', 'AW'],
	44	'DATA READ': [7, 'Data read', 'DR'],
	45	'DATA WRITE': [8, 'Data write', 'DW'],
	46	}
	47
	48	class Decoder(srd.Decoder):
	49	api_version = 1
	50	id = 'i2c'
	51	name = 'I2C'
	52	longname = 'Inter-Integrated Circuit'
	53	desc = 'Two-wire, multi-master, serial bus.'
	54	license = 'gplv2+'
	55	inputs = ['logic']
	56	outputs = ['i2c']
	57	probes = [
	58	{'id': 'scl', 'name': 'SCL', 'desc': 'Serial clock line'},
	59	{'id': 'sda', 'name': 'SDA', 'desc': 'Serial data line'},
	60	]
	61	optional_probes = []
	62	options = {
	63	'addressing': ['Slave addressing (in bits)', 7], # 7 or 10
	64	'address_format': ['Displayed slave address format', 'shifted'],
	65	}
	66	annotations = [
	67	['Start', 'Start condition'],
	68	['Repeat start', 'Repeat start condition'],
	69	['Stop', 'Stop condition'],
	70	['ACK', 'ACK'],
	71	['NACK', 'NACK'],
	72	['Address read', 'Address read'],
	73	['Address write', 'Address write'],
	74	['Data read', 'Data read'],
	75	['Data write', 'Data write'],
	76	['Warnings', 'Human-readable warnings'],
	77	]
	78
	79	def __init__(self, **kwargs):
	80	self.startsample = -1
	81	self.samplenum = None
	82	self.bitcount = 0
	83	self.databyte = 0
	84	self.wr = -1
	85	self.is_repeat_start = 0
	86	self.state = 'FIND START'
	87	self.oldscl = 1
	88	self.oldsda = 1
	89	self.oldpins = [1, 1]
	90
	91	def start(self, metadata):
	92	self.out_proto = self.add(srd.OUTPUT_PROTO, 'i2c')
	93	self.out_ann = self.add(srd.OUTPUT_ANN, 'i2c')
	94
	95	def report(self):
	96	pass
	97
	98	def putx(self, data):
	99	self.put(self.startsample, self.samplenum, self.out_ann, data)
	100
	101	def putp(self, data):
	102	self.put(self.startsample, self.samplenum, self.out_proto, data)
	103
	104	def is_start_condition(self, scl, sda):
	105	# START condition (S): SDA = falling, SCL = high
	106	if (self.oldsda == 1 and sda == 0) and scl == 1:
	107	return True
	108	return False
	109
	110	def is_data_bit(self, scl, sda):
	111	# Data sampling of receiver: SCL = rising
	112	if self.oldscl == 0 and scl == 1:
	113	return True
	114	return False
	115
	116	def is_stop_condition(self, scl, sda):
	117	# STOP condition (P): SDA = rising, SCL = high
	118	if (self.oldsda == 0 and sda == 1) and scl == 1:
	119	return True
	120	return False
	121
	122	def found_start(self, scl, sda):
	123	self.startsample = self.samplenum
	124	cmd = 'START REPEAT' if (self.is_repeat_start == 1) else 'START'
	125	self.putp([cmd, None])
	126	self.putx([proto[cmd][0], proto[cmd][1:]])
	127	self.state = 'FIND ADDRESS'
	128	self.bitcount = self.databyte = 0
	129	self.is_repeat_start = 1
	130	self.wr = -1
	131
	132	# Gather 8 bits of data plus the ACK/NACK bit.
	133	def found_address_or_data(self, scl, sda):
	134	# Address and data are transmitted MSB-first.
	135	self.databyte <<= 1
	136	self.databyte \|= sda
	137
	138	if self.bitcount == 0:
	139	self.startsample = self.samplenum
	140
	141	# Return if we haven't collected all 8 + 1 bits, yet.
	142	self.bitcount += 1
	143	if self.bitcount != 8:
	144	return
	145
	146	# We triggered on the ACK/NACK bit, but won't report that until later.
	147	self.startsample -= 1
	148
	149	d = self.databyte
	150	if self.state == 'FIND ADDRESS':
	151	# The READ/WRITE bit is only in address bytes, not data bytes.
	152	self.wr = 0 if (self.databyte & 1) else 1
	153	if self.options['address_format'] == 'shifted':
	154	d = d >> 1
	155
	156	if self.state == 'FIND ADDRESS' and self.wr == 1:
	157	cmd = 'ADDRESS WRITE'
	158	elif self.state == 'FIND ADDRESS' and self.wr == 0:
	159	cmd = 'ADDRESS READ'
	160	elif self.state == 'FIND DATA' and self.wr == 1:
	161	cmd = 'DATA WRITE'
	162	elif self.state == 'FIND DATA' and self.wr == 0:
	163	cmd = 'DATA READ'
	164
	165	self.putp([cmd, d])
	166	self.putx([proto[cmd][0], ['%s: %02X' % (proto[cmd][1], d),
	167	'%s: %02X' % (proto[cmd][2], d), '%02X' % d]])
	168
	169	# Done with this packet.
	170	self.startsample = -1
	171	self.bitcount = self.databyte = 0
	172	self.state = 'FIND ACK'
	173
	174	def get_ack(self, scl, sda):
	175	self.startsample = self.samplenum
	176	cmd = 'NACK' if (sda == 1) else 'ACK'
	177	self.putp([cmd, None])
	178	self.putx([proto[cmd][0], proto[cmd][1:]])
	179	# There could be multiple data bytes in a row, so either find
	180	# another data byte or a STOP condition next.
	181	self.state = 'FIND DATA'
	182
	183	def found_stop(self, scl, sda):
	184	self.startsample = self.samplenum
	185	cmd = 'STOP'
	186	self.putp([cmd, None])
	187	self.putx([proto[cmd][0], proto[cmd][1:]])
	188	self.state = 'FIND START'
	189	self.is_repeat_start = 0
	190	self.wr = -1
	191
	192	def decode(self, ss, es, data):
	193	for (self.samplenum, pins) in data:
	194
	195	# Ignore identical samples early on (for performance reasons).
	196	if self.oldpins == pins:
	197	continue
	198	self.oldpins, (scl, sda) = pins, pins
	199
	200	# TODO: Wait until the bus is idle (SDA = SCL = 1) first?
	201
	202	# State machine.
	203	if self.state == 'FIND START':
	204	if self.is_start_condition(scl, sda):
	205	self.found_start(scl, sda)
	206	elif self.state == 'FIND ADDRESS':
	207	if self.is_data_bit(scl, sda):
	208	self.found_address_or_data(scl, sda)
	209	elif self.state == 'FIND DATA':
	210	if self.is_data_bit(scl, sda):
	211	self.found_address_or_data(scl, sda)
	212	elif self.is_start_condition(scl, sda):
	213	self.found_start(scl, sda)
	214	elif self.is_stop_condition(scl, sda):
	215	self.found_stop(scl, sda)
	216	elif self.state == 'FIND ACK':
	217	if self.is_data_bit(scl, sda):
	218	self.get_ack(scl, sda)
	219	else:
	220	raise Exception('Invalid state: %s' % self.state)
	221
	222	# Save current SDA/SCL values for the next round.
	223	self.oldscl = scl
	224	self.oldsda = sda
	225