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1 | ## | |
2 | ## This file is part of the libsigrokdecode project. | |
3 | ## | |
4 | ## Copyright (C) 2012-2013 Uwe Hermann <uwe@hermann-uwe.de> | |
5 | ## | |
6 | ## This program is free software; you can redistribute it and/or modify | |
7 | ## it under the terms of the GNU General Public License as published by | |
8 | ## the Free Software Foundation; either version 2 of the License, or | |
9 | ## (at your option) any later version. | |
10 | ## | |
11 | ## This program is distributed in the hope that it will be useful, | |
12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ## GNU General Public License for more details. | |
15 | ## | |
16 | ## You should have received a copy of the GNU General Public License | |
17 | ## along with this program; if not, write to the Free Software | |
18 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | ## | |
20 | ||
21 | # CAN protocol decoder | |
22 | ||
23 | import sigrokdecode as srd | |
24 | ||
25 | class Decoder(srd.Decoder): | |
26 | api_version = 1 | |
27 | id = 'can' | |
28 | name = 'CAN' | |
29 | longname = 'Controller Area Network' | |
30 | desc = 'Field bus protocol for distributed realtime control.' | |
31 | license = 'gplv2+' | |
32 | inputs = ['logic'] | |
33 | outputs = ['can'] | |
34 | probes = [ | |
35 | {'id': 'can_rx', 'name': 'CAN RX', 'desc': 'CAN bus line'}, | |
36 | ] | |
37 | optional_probes = [] | |
38 | options = { | |
39 | 'bitrate': ['Bitrate', 1000000], # 1Mbit/s | |
40 | 'sample_point': ['Sample point', 70], # 70% | |
41 | } | |
42 | annotations = [ | |
43 | ['Data', 'CAN payload data'], | |
44 | ['SOF', 'Start of frame'], | |
45 | ['EOF', 'End of frame'], | |
46 | ['ID', 'Identifier'], | |
47 | ['Ext. ID', 'Extended identifier'], | |
48 | ['Full ID', 'Full identifier'], | |
49 | ['IDE', 'Identifier extension bit'], | |
50 | ['Reserved bit', 'Reserved bit 0 and 1'], | |
51 | ['RTR', 'Remote transmission request'], | |
52 | ['SRR', 'Substitute remote request'], | |
53 | ['DLC', 'Data length count'], | |
54 | ['CRC sequence', 'CRC sequence'], | |
55 | ['CRC delimiter', 'CRC delimiter'], | |
56 | ['ACK slot', 'ACK slot'], | |
57 | ['ACK delimiter', 'ACK delimiter'], | |
58 | ['Stuff bit', 'Stuff bit'], | |
59 | ['Warnings', 'Human-readable warnings'], | |
60 | ] | |
61 | ||
62 | def __init__(self, **kwargs): | |
63 | self.samplerate = None | |
64 | self.reset_variables() | |
65 | ||
66 | def start(self): | |
67 | # self.out_proto = self.register(srd.OUTPUT_PYTHON) | |
68 | self.out_ann = self.register(srd.OUTPUT_ANN) | |
69 | ||
70 | def metadata(self, key, value): | |
71 | if key == srd.SRD_CONF_SAMPLERATE: | |
72 | self.samplerate = value | |
73 | self.bit_width = float(self.samplerate) / float(self.options['bitrate']) | |
74 | self.bitpos = (self.bit_width / 100.0) * self.options['sample_point'] | |
75 | ||
76 | def report(self): | |
77 | pass | |
78 | ||
79 | # Generic helper for CAN bit annotations. | |
80 | def putg(self, ss, es, data): | |
81 | left, right = int(self.bitpos), int(self.bit_width - self.bitpos) | |
82 | self.put(ss - left, es + right, self.out_ann, data) | |
83 | ||
84 | # Single-CAN-bit annotation using the current samplenum. | |
85 | def putx(self, data): | |
86 | self.putg(self.samplenum, self.samplenum, data) | |
87 | ||
88 | # Single-CAN-bit annotation using the samplenum of CAN bit 12. | |
89 | def put12(self, data): | |
90 | self.putg(self.ss_bit12, self.ss_bit12, data) | |
91 | ||
92 | # Multi-CAN-bit annotation from self.ss_block to current samplenum. | |
93 | def putb(self, data): | |
94 | self.putg(self.ss_block, self.samplenum, data) | |
95 | ||
96 | def reset_variables(self): | |
97 | self.state = 'IDLE' | |
98 | self.sof = self.frame_type = self.dlc = None | |
99 | self.rawbits = [] # All bits, including stuff bits | |
100 | self.bits = [] # Only actual CAN frame bits (no stuff bits) | |
101 | self.curbit = 0 # Current bit of CAN frame (bit 0 == SOF) | |
102 | self.last_databit = 999 # Positive value that bitnum+x will never match | |
103 | self.ss_block = None | |
104 | self.ss_bit12 = None | |
105 | self.ss_databytebits = [] | |
106 | ||
107 | # Return True if we reached the desired bit position, False otherwise. | |
108 | def reached_bit(self, bitnum): | |
109 | bitpos = int(self.sof + (self.bit_width * bitnum) + self.bitpos) | |
110 | if self.samplenum >= bitpos: | |
111 | return True | |
112 | return False | |
113 | ||
114 | def is_stuff_bit(self): | |
115 | # CAN uses NRZ encoding and bit stuffing. | |
116 | # After 5 identical bits, a stuff bit of opposite value is added. | |
117 | last_6_bits = self.rawbits[-6:] | |
118 | if last_6_bits not in ([0, 0, 0, 0, 0, 1], [1, 1, 1, 1, 1, 0]): | |
119 | return False | |
120 | ||
121 | # Stuff bit. Keep it in self.rawbits, but drop it from self.bits. | |
122 | self.putx([15, ['Stuff bit: %d' % self.rawbits[-1], | |
123 | 'SB: %d' % self.rawbits[-1], 'SB']]) | |
124 | self.bits.pop() # Drop last bit. | |
125 | return True | |
126 | ||
127 | def is_valid_crc(self, crc_bits): | |
128 | return True # TODO | |
129 | ||
130 | def decode_error_frame(self, bits): | |
131 | pass # TODO | |
132 | ||
133 | def decode_overload_frame(self, bits): | |
134 | pass # TODO | |
135 | ||
136 | # Both standard and extended frames end with CRC, CRC delimiter, ACK, | |
137 | # ACK delimiter, and EOF fields. Handle them in a common function. | |
138 | # Returns True if the frame ended (EOF), False otherwise. | |
139 | def decode_frame_end(self, can_rx, bitnum): | |
140 | ||
141 | # Remember start of CRC sequence (see below). | |
142 | if bitnum == (self.last_databit + 1): | |
143 | self.ss_block = self.samplenum | |
144 | ||
145 | # CRC sequence (15 bits) | |
146 | elif bitnum == (self.last_databit + 15): | |
147 | x = self.last_databit + 1 | |
148 | crc_bits = self.bits[x:x + 15 + 1] | |
149 | self.crc = int(''.join(str(d) for d in crc_bits), 2) | |
150 | self.putb([11, ['CRC sequence: 0x%04x' % self.crc, | |
151 | 'CRC: 0x%04x' % self.crc, 'CRC']]) | |
152 | if not self.is_valid_crc(crc_bits): | |
153 | self.putb([16, ['CRC is invalid']]) | |
154 | ||
155 | # CRC delimiter bit (recessive) | |
156 | elif bitnum == (self.last_databit + 16): | |
157 | self.putx([12, ['CRC delimiter: %d' % can_rx, | |
158 | 'CRC d: %d' % can_rx, 'CRC d']]) | |
159 | ||
160 | # ACK slot bit (dominant: ACK, recessive: NACK) | |
161 | elif bitnum == (self.last_databit + 17): | |
162 | ack = 'ACK' if can_rx == 0 else 'NACK' | |
163 | self.putx([13, ['ACK slot: %s' % ack, 'ACK s: %s' % ack, 'ACK s']]) | |
164 | ||
165 | # ACK delimiter bit (recessive) | |
166 | elif bitnum == (self.last_databit + 18): | |
167 | self.putx([14, ['ACK delimiter: %d' % can_rx, | |
168 | 'ACK d: %d' % can_rx, 'ACK d']]) | |
169 | ||
170 | # Remember start of EOF (see below). | |
171 | elif bitnum == (self.last_databit + 19): | |
172 | self.ss_block = self.samplenum | |
173 | ||
174 | # End of frame (EOF), 7 recessive bits | |
175 | elif bitnum == (self.last_databit + 25): | |
176 | self.putb([2, ['End of frame', 'EOF', 'E']]) | |
177 | self.reset_variables() | |
178 | return True | |
179 | ||
180 | return False | |
181 | ||
182 | # Returns True if the frame ended (EOF), False otherwise. | |
183 | def decode_standard_frame(self, can_rx, bitnum): | |
184 | ||
185 | # Bit 14: RB0 (reserved bit) | |
186 | # Has to be sent dominant, but receivers should accept recessive too. | |
187 | if bitnum == 14: | |
188 | self.putx([7, ['Reserved bit 0: %d' % can_rx, | |
189 | 'RB0: %d' % can_rx, 'RB0']]) | |
190 | ||
191 | # Bit 12: Remote transmission request (RTR) bit | |
192 | # Data frame: dominant, remote frame: recessive | |
193 | # Remote frames do not contain a data field. | |
194 | rtr = 'remote' if self.bits[12] == 1 else 'data' | |
195 | self.put12([8, ['Remote transmission request: %s frame' % rtr, | |
196 | 'RTR: %s frame' % rtr, 'RTR']]) | |
197 | ||
198 | # Remember start of DLC (see below). | |
199 | elif bitnum == 15: | |
200 | self.ss_block = self.samplenum | |
201 | ||
202 | # Bits 15-18: Data length code (DLC), in number of bytes (0-8). | |
203 | elif bitnum == 18: | |
204 | self.dlc = int(''.join(str(d) for d in self.bits[15:18 + 1]), 2) | |
205 | self.putb([10, ['Data length code: %d' % self.dlc, | |
206 | 'DLC: %d' % self.dlc, 'DLC']]) | |
207 | self.last_databit = 18 + (self.dlc * 8) | |
208 | ||
209 | # Remember all databyte bits, except the very last one. | |
210 | elif bitnum in range(19, self.last_databit): | |
211 | self.ss_databytebits.append(self.samplenum) | |
212 | ||
213 | # Bits 19-X: Data field (0-8 bytes, depending on DLC) | |
214 | # The bits within a data byte are transferred MSB-first. | |
215 | elif bitnum == self.last_databit: | |
216 | self.ss_databytebits.append(self.samplenum) # Last databyte bit. | |
217 | for i in range(self.dlc): | |
218 | x = 18 + (8 * i) + 1 | |
219 | b = int(''.join(str(d) for d in self.bits[x:x + 8]), 2) | |
220 | ss = self.ss_databytebits[i * 8] | |
221 | es = self.ss_databytebits[((i + 1) * 8) - 1] | |
222 | self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b), | |
223 | 'DB %d: 0x%02x' % (i, b), 'DB']]) | |
224 | self.ss_databytebits = [] | |
225 | ||
226 | elif bitnum > self.last_databit: | |
227 | return self.decode_frame_end(can_rx, bitnum) | |
228 | ||
229 | return False | |
230 | ||
231 | # Returns True if the frame ended (EOF), False otherwise. | |
232 | def decode_extended_frame(self, can_rx, bitnum): | |
233 | ||
234 | # Remember start of EID (see below). | |
235 | if bitnum == 14: | |
236 | self.ss_block = self.samplenum | |
237 | ||
238 | # Bits 14-31: Extended identifier (EID[17..0]) | |
239 | elif bitnum == 31: | |
240 | self.eid = int(''.join(str(d) for d in self.bits[14:]), 2) | |
241 | s = '%d (0x%x)' % (self.eid, self.eid) | |
242 | self.putb([4, ['Extended Identifier: %s' % s, | |
243 | 'Extended ID: %s' % s, 'Extended ID', 'EID']]) | |
244 | ||
245 | self.fullid = self.id << 18 | self.eid | |
246 | s = '%d (0x%x)' % (self.fullid, self.fullid) | |
247 | self.putb([5, ['Full Identifier: %s' % s, 'Full ID: %s' % s, | |
248 | 'Full ID', 'FID']]) | |
249 | ||
250 | # Bit 12: Substitute remote request (SRR) bit | |
251 | self.put12([9, ['Substitute remote request: %d' % self.bits[12], | |
252 | 'SRR: %d' % self.bits[12], 'SRR']]) | |
253 | ||
254 | # Bit 32: Remote transmission request (RTR) bit | |
255 | # Data frame: dominant, remote frame: recessive | |
256 | # Remote frames do not contain a data field. | |
257 | if bitnum == 32: | |
258 | rtr = 'remote' if can_rx == 1 else 'data' | |
259 | self.putx([8, ['Remote transmission request: %s frame' % rtr, | |
260 | 'RTR: %s frame' % rtr, 'RTR']]) | |
261 | ||
262 | # Bit 33: RB1 (reserved bit) | |
263 | elif bitnum == 33: | |
264 | self.putx([7, ['Reserved bit 1: %d' % can_rx, | |
265 | 'RB1: %d' % can_rx, 'RB1']]) | |
266 | ||
267 | # Bit 34: RB0 (reserved bit) | |
268 | elif bitnum == 34: | |
269 | self.putx([7, ['Reserved bit 0: %d' % can_rx, | |
270 | 'RB0: %d' % can_rx, 'RB0']]) | |
271 | ||
272 | # Remember start of DLC (see below). | |
273 | elif bitnum == 35: | |
274 | self.ss_block = self.samplenum | |
275 | ||
276 | # Bits 35-38: Data length code (DLC), in number of bytes (0-8). | |
277 | elif bitnum == 38: | |
278 | self.dlc = int(''.join(str(d) for d in self.bits[35:38 + 1]), 2) | |
279 | self.putb([10, ['Data length code: %d' % self.dlc, | |
280 | 'DLC: %d' % self.dlc, 'DLC']]) | |
281 | self.last_databit = 38 + (self.dlc * 8) | |
282 | ||
283 | # Remember all databyte bits, except the very last one. | |
284 | elif bitnum in range(39, self.last_databit): | |
285 | self.ss_databytebits.append(self.samplenum) | |
286 | ||
287 | # Bits 39-X: Data field (0-8 bytes, depending on DLC) | |
288 | # The bits within a data byte are transferred MSB-first. | |
289 | elif bitnum == self.last_databit: | |
290 | self.ss_databytebits.append(self.samplenum) # Last databyte bit. | |
291 | for i in range(self.dlc): | |
292 | x = 38 + (8 * i) + 1 | |
293 | b = int(''.join(str(d) for d in self.bits[x:x + 8]), 2) | |
294 | ss = self.ss_databytebits[i * 8] | |
295 | es = self.ss_databytebits[((i + 1) * 8) - 1] | |
296 | self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b), | |
297 | 'DB %d: 0x%02x' % (i, b), 'DB']]) | |
298 | self.ss_databytebits = [] | |
299 | ||
300 | elif bitnum > self.last_databit: | |
301 | return self.decode_frame_end(can_rx, bitnum) | |
302 | ||
303 | return False | |
304 | ||
305 | def handle_bit(self, can_rx): | |
306 | self.rawbits.append(can_rx) | |
307 | self.bits.append(can_rx) | |
308 | ||
309 | # Get the index of the current CAN frame bit (without stuff bits). | |
310 | bitnum = len(self.bits) - 1 | |
311 | ||
312 | # For debugging. | |
313 | # self.putx([0, ['Bit %d (CAN bit %d): %d' % \ | |
314 | # (self.curbit, bitnum, can_rx)]]) | |
315 | ||
316 | # If this is a stuff bit, remove it from self.bits and ignore it. | |
317 | if self.is_stuff_bit(): | |
318 | self.curbit += 1 # Increase self.curbit (bitnum is not affected). | |
319 | return | |
320 | ||
321 | # Bit 0: Start of frame (SOF) bit | |
322 | if bitnum == 0: | |
323 | if can_rx == 0: | |
324 | self.putx([1, ['Start of frame', 'SOF', 'S']]) | |
325 | else: | |
326 | self.putx([16, ['Start of frame (SOF) must be a dominant bit']]) | |
327 | ||
328 | # Remember start of ID (see below). | |
329 | elif bitnum == 1: | |
330 | self.ss_block = self.samplenum | |
331 | ||
332 | # Bits 1-11: Identifier (ID[10..0]) | |
333 | # The bits ID[10..4] must NOT be all recessive. | |
334 | elif bitnum == 11: | |
335 | self.id = int(''.join(str(d) for d in self.bits[1:]), 2) | |
336 | s = '%d (0x%x)' % (self.id, self.id), | |
337 | self.putb([3, ['Identifier: %s' % s, 'ID: %s' % s, 'ID']]) | |
338 | ||
339 | # RTR or SRR bit, depending on frame type (gets handled later). | |
340 | elif bitnum == 12: | |
341 | # self.putx([0, ['RTR/SRR: %d' % can_rx]]) # Debug only. | |
342 | self.ss_bit12 = self.samplenum | |
343 | ||
344 | # Bit 13: Identifier extension (IDE) bit | |
345 | # Standard frame: dominant, extended frame: recessive | |
346 | elif bitnum == 13: | |
347 | ide = self.frame_type = 'standard' if can_rx == 0 else 'extended' | |
348 | self.putx([6, ['Identifier extension bit: %s frame' % ide, | |
349 | 'IDE: %s frame' % ide, 'IDE']]) | |
350 | ||
351 | # Bits 14-X: Frame-type dependent, passed to the resp. handlers. | |
352 | elif bitnum >= 14: | |
353 | if self.frame_type == 'standard': | |
354 | done = self.decode_standard_frame(can_rx, bitnum) | |
355 | else: | |
356 | done = self.decode_extended_frame(can_rx, bitnum) | |
357 | ||
358 | # The handlers return True if a frame ended (EOF). | |
359 | if done: | |
360 | return | |
361 | ||
362 | # After a frame there are 3 intermission bits (recessive). | |
363 | # After these bits, the bus is considered free. | |
364 | ||
365 | self.curbit += 1 | |
366 | ||
367 | def decode(self, ss, es, data): | |
368 | if self.samplerate is None: | |
369 | raise Exception("Cannot decode without samplerate.") | |
370 | for (self.samplenum, pins) in data: | |
371 | ||
372 | (can_rx,) = pins | |
373 | ||
374 | # State machine. | |
375 | if self.state == 'IDLE': | |
376 | # Wait for a dominant state (logic 0) on the bus. | |
377 | if can_rx == 1: | |
378 | continue | |
379 | self.sof = self.samplenum | |
380 | self.state = 'GET BITS' | |
381 | elif self.state == 'GET BITS': | |
382 | # Wait until we're in the correct bit/sampling position. | |
383 | if not self.reached_bit(self.curbit): | |
384 | continue | |
385 | self.handle_bit(can_rx) | |
386 | else: | |
387 | raise Exception("Invalid state: %s" % self.state) | |
388 |