[libsigrokdecode.git] / decoders / st7735 / pd.py

##
## This file is part of the libsigrokdecode project.
##
## Copyright (C) 2018 Aleksander Alekseev <afiskon@gmail.com>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, see <http://www.gnu.org/licenses/>.

import sigrokdecode as srd

MAX_DATA_LEN = 128

# Command ID -> name, short description
META = {
    0x00: {'name': 'NOP    ', 'desc': 'No operation'},
    0x01: {'name': 'SWRESET', 'desc': 'Software reset'},
    0x04: {'name': 'RDDID  ', 'desc': 'Read display ID'},
    0x09: {'name': 'RDDST  ', 'desc': 'Read display status'},
    0x10: {'name': 'SLPIN  ', 'desc': 'Sleep in & booster off'},
    0x11: {'name': 'SLPOUT ', 'desc': 'Sleep out & booster on'},
    0x12: {'name': 'PTLON  ', 'desc': 'Partial mode on'},
    0x13: {'name': 'NORON  ', 'desc': 'Partial off (normal)'},
    0x20: {'name': 'INVOFF ', 'desc': 'Display inversion off'},
    0x21: {'name': 'INVON  ', 'desc': 'Display inversion on'},
    0x28: {'name': 'DISPOFF', 'desc': 'Display off'},
    0x29: {'name': 'DISPON ', 'desc': 'Display on'},
    0x2A: {'name': 'CASET  ', 'desc': 'Column address set'},
    0x2B: {'name': 'RASET  ', 'desc': 'Row address set'},
    0x2C: {'name': 'RAMWR  ', 'desc': 'Memory write'},
    0x2E: {'name': 'RAMRD  ', 'desc': 'Memory read'},
    0x30: {'name': 'PTLAR  ', 'desc': 'Partial start/end address set'},
    0x36: {'name': 'MADCTL ', 'desc': 'Memory data address control'},
    0x3A: {'name': 'COLMOD ', 'desc': 'Interface pixel format'},
    0xB1: {'name': 'FRMCTR1', 'desc': 'Frame rate control (in normal mode / full colors)'},
    0xB2: {'name': 'FRMCTR2', 'desc': 'Frame rate control (in idle mode / 8-colors)'},
    0xB3: {'name': 'FRMCTR3', 'desc': 'Frame rate control (in partial mode / full colors) '},
    0xB4: {'name': 'INVCTR ', 'desc': 'Display inversion control'},
    0xB6: {'name': 'DISSET5', 'desc': 'Display function set 5'},
    0xC0: {'name': 'PWCTR1 ', 'desc': 'Power control 1'},
    0xC1: {'name': 'PWCTR2 ', 'desc': 'Power control 2'},
    0xC2: {'name': 'PWCTR3 ', 'desc': 'Power control 3'},
    0xC3: {'name': 'PWCTR4 ', 'desc': 'Power control 4'},
    0xC4: {'name': 'PWCTR5 ', 'desc': 'Power control 5'},
    0xC5: {'name': 'VMCTR1 ', 'desc': 'VCOM control 1'},
    0xDA: {'name': 'RDID1  ', 'desc': 'Read ID1'},
    0xDB: {'name': 'RDID2  ', 'desc': 'Read ID2'},
    0xDC: {'name': 'RDID3  ', 'desc': 'Read ID3'},
    0xDD: {'name': 'RDID4  ', 'desc': 'Read ID4'},
    0xFC: {'name': 'PWCTR6 ', 'desc': 'Power control 6'},
    0xE0: {'name': 'GMCTRP1', 'desc': 'Gamma \'+\'polarity correction characteristics setting'},
    0xE1: {'name': 'GMCTRN1', 'desc': 'Gamma \'-\'polarity correction characteristics setting'},
}

class Ann:
    BITS, CMD, DATA, DESC = range(4)

class Decoder(srd.Decoder):
    api_version = 3
    id = 'st7735'
    name = 'ST7735'
    longname = 'Sitronix ST7735'
    desc = 'Sitronix ST7735 TFT controller protocol.'
    license = 'gplv2+'
    inputs = ['logic']
    outputs = ['st7735']
    tags = ['Display', 'IC']
    channels = (
        {'id': 'cs', 'name': 'CS#', 'desc': 'Chip-select'},
        {'id': 'clk', 'name': 'CLK', 'desc': 'Clock'},
        {'id': 'mosi', 'name': 'MOSI', 'desc': 'Master out, slave in'},
        {'id': 'dc', 'name': 'DC', 'desc': 'Data or command'}
    )
    annotations = (
        ('bit', 'Bit'),
        ('command', 'Command'),
        ('data', 'Data'),
        ('description', 'Description'),
    )
    annotation_rows = (
        ('bits', 'Bits', (Ann.BITS,)),
        ('fields', 'Fields', (Ann.CMD, Ann.DATA)),
        ('description', 'Description', (Ann.DESC,)),
    )

    def __init__(self):
        self.reset()

    def reset(self):
        self.accum_byte = 0
        self.accum_bits_num = 0
        self.bit_ss = -1
        self.byte_ss = -1
        self.current_bit = -1

    def start(self):
        self.out_ann = self.register(srd.OUTPUT_ANN)

    def put_desc(self, ss, es, cmd, data):
        if cmd == -1:
            return
        if META[cmd]:
            self.put(ss, es, self.out_ann, [Ann.DESC,
                ['%s: %s' % (META[cmd]['name'].strip(), META[cmd]['desc'])]])
        else:
            # Default description:
            dots = ''
            if len(data) == MAX_DATA_LEN:
                data = data[:-1]
                dots = '...'
            data_str = '(none)'
            if len(data) > 0:
                data_str = ' '.join(['%02X' % b for b in data])
            self.put(ss, es, self.out_ann, [Ann.DESC,
                ['Unknown command: %02X. Data: %s%s' % (cmd, data_str, dots)]])

    def decode(self):
        current_cmd = -1
        current_data = []
        desc_ss = -1
        desc_es = -1
        self.reset()
        while True:
            # Check data on both CLK edges.
            (cs, clk, mosi, dc) = self.wait({1: 'e'})

            if cs == 1: # Wait for CS = low, ignore the rest.
                self.reset()
                continue

            if clk == 1:
                # Read one bit.
                self.bit_ss = self.samplenum
                if self.accum_bits_num == 0:
                    self.byte_ss = self.samplenum
                self.current_bit = mosi

            if (clk == 0) and (self.current_bit >= 0):
                # Process one bit.
                self.put(self.bit_ss, self.samplenum, self.out_ann,
                         [Ann.BITS, [str(self.current_bit)]])
                self.accum_byte = (self.accum_byte << 1) | self.current_bit # MSB-first.
                self.accum_bits_num += 1
                if self.accum_bits_num == 8:
                    # Process one byte.
                    ann = Ann.DATA if dc else Ann.CMD # DC = low for commands.
                    self.put(self.byte_ss, self.samplenum, self.out_ann,
                             [ann, ['%02X' % self.accum_byte]])
                    if ann == Ann.CMD:
                        self.put_desc(desc_ss, desc_es, current_cmd, current_data)
                        desc_ss = self.byte_ss
                        desc_es = self.samplenum # For cmds without data.
                        current_cmd = self.accum_byte
                        current_data = []
                    else:
                        if len(current_data) < MAX_DATA_LEN:
                            current_data += [self.accum_byte]
                        desc_es = self.samplenum

                    self.accum_bits_num = 0
                    self.accum_byte = 0
                    self.byte_ss = -1
                self.current_bit = -1
                self.bit_ss = -1
Commit	Line	Data
f62e32bc AA	1	##
	2	## This file is part of the libsigrokdecode project.
	3	##
	4	## Copyright (C) 2018 Aleksander Alekseev <afiskon@gmail.com>
	5	##
	6	## This program is free software; you can redistribute it and/or modify
	7	## it under the terms of the GNU General Public License as published by
	8	## the Free Software Foundation; either version 2 of the License, or
	9	## (at your option) any later version.
	10	##
	11	## This program is distributed in the hope that it will be useful,
	12	## but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	## GNU General Public License for more details.
	15	##
	16	## You should have received a copy of the GNU General Public License
	17	## along with this program; if not, see <http://www.gnu.org/licenses/>.
	18
	19	import sigrokdecode as srd
	20
	21	MAX_DATA_LEN = 128
	22
	23	# Command ID -> name, short description
	24	META = {
	25	0x00: {'name': 'NOP ', 'desc': 'No operation'},
	26	0x01: {'name': 'SWRESET', 'desc': 'Software reset'},
	27	0x04: {'name': 'RDDID ', 'desc': 'Read display ID'},
	28	0x09: {'name': 'RDDST ', 'desc': 'Read display status'},
	29	0x10: {'name': 'SLPIN ', 'desc': 'Sleep in & booster off'},
	30	0x11: {'name': 'SLPOUT ', 'desc': 'Sleep out & booster on'},
	31	0x12: {'name': 'PTLON ', 'desc': 'Partial mode on'},
	32	0x13: {'name': 'NORON ', 'desc': 'Partial off (normal)'},
	33	0x20: {'name': 'INVOFF ', 'desc': 'Display inversion off'},
	34	0x21: {'name': 'INVON ', 'desc': 'Display inversion on'},
	35	0x28: {'name': 'DISPOFF', 'desc': 'Display off'},
	36	0x29: {'name': 'DISPON ', 'desc': 'Display on'},
	37	0x2A: {'name': 'CASET ', 'desc': 'Column address set'},
	38	0x2B: {'name': 'RASET ', 'desc': 'Row address set'},
	39	0x2C: {'name': 'RAMWR ', 'desc': 'Memory write'},
	40	0x2E: {'name': 'RAMRD ', 'desc': 'Memory read'},
	41	0x30: {'name': 'PTLAR ', 'desc': 'Partial start/end address set'},
	42	0x36: {'name': 'MADCTL ', 'desc': 'Memory data address control'},
	43	0x3A: {'name': 'COLMOD ', 'desc': 'Interface pixel format'},
	44	0xB1: {'name': 'FRMCTR1', 'desc': 'Frame rate control (in normal mode / full colors)'},
	45	0xB2: {'name': 'FRMCTR2', 'desc': 'Frame rate control (in idle mode / 8-colors)'},
	46	0xB3: {'name': 'FRMCTR3', 'desc': 'Frame rate control (in partial mode / full colors) '},
	47	0xB4: {'name': 'INVCTR ', 'desc': 'Display inversion control'},
	48	0xB6: {'name': 'DISSET5', 'desc': 'Display function set 5'},
	49	0xC0: {'name': 'PWCTR1 ', 'desc': 'Power control 1'},
	50	0xC1: {'name': 'PWCTR2 ', 'desc': 'Power control 2'},
	51	0xC2: {'name': 'PWCTR3 ', 'desc': 'Power control 3'},
	52	0xC3: {'name': 'PWCTR4 ', 'desc': 'Power control 4'},
	53	0xC4: {'name': 'PWCTR5 ', 'desc': 'Power control 5'},
	54	0xC5: {'name': 'VMCTR1 ', 'desc': 'VCOM control 1'},
	55	0xDA: {'name': 'RDID1 ', 'desc': 'Read ID1'},
	56	0xDB: {'name': 'RDID2 ', 'desc': 'Read ID2'},
	57	0xDC: {'name': 'RDID3 ', 'desc': 'Read ID3'},
	58	0xDD: {'name': 'RDID4 ', 'desc': 'Read ID4'},
	59	0xFC: {'name': 'PWCTR6 ', 'desc': 'Power control 6'},
	60	0xE0: {'name': 'GMCTRP1', 'desc': 'Gamma \'+\'polarity correction characteristics setting'},
	61	0xE1: {'name': 'GMCTRN1', 'desc': 'Gamma \'-\'polarity correction characteristics setting'},
	62	}
	63
	64	class Ann:
65	BITS, CMD, DATA, DESC = range(4)
66
67	class Decoder(srd.Decoder):
68	api_version = 3
69	id = 'st7735'
70	name = 'ST7735'
71	longname = 'Sitronix ST7735'
72	desc = 'Sitronix ST7735 TFT controller protocol.'
73	license = 'gplv2+'
74	inputs = ['logic']
75	outputs = ['st7735']
d6d8a8a4	76	tags = ['Display', 'IC']
f62e32bc AA	77	channels = (
	78	{'id': 'cs', 'name': 'CS#', 'desc': 'Chip-select'},
	79	{'id': 'clk', 'name': 'CLK', 'desc': 'Clock'},
	80	{'id': 'mosi', 'name': 'MOSI', 'desc': 'Master out, slave in'},
	81	{'id': 'dc', 'name': 'DC', 'desc': 'Data or command'}
	82	)
	83	annotations = (
	84	('bit', 'Bit'),
	85	('command', 'Command'),
	86	('data', 'Data'),
	87	('description', 'Description'),
	88	)
	89	annotation_rows = (
	90	('bits', 'Bits', (Ann.BITS,)),
	91	('fields', 'Fields', (Ann.CMD, Ann.DATA)),
	92	('description', 'Description', (Ann.DESC,)),
	93	)
	94
	95	def __init__(self):
	96	self.reset()
	97
	98	def reset(self):
f62e32bc AA	99	self.accum_byte = 0
	100	self.accum_bits_num = 0
	101	self.bit_ss = -1
	102	self.byte_ss = -1
	103	self.current_bit = -1
	104
ef10cea7 UH	105	def start(self):
	106	self.out_ann = self.register(srd.OUTPUT_ANN)
	107
f62e32bc AA	108	def put_desc(self, ss, es, cmd, data):
	109	if cmd == -1:
	110	return
	111	if META[cmd]:
	112	self.put(ss, es, self.out_ann, [Ann.DESC,
	113	['%s: %s' % (META[cmd]['name'].strip(), META[cmd]['desc'])]])
	114	else:
	115	# Default description:
	116	dots = ''
	117	if len(data) == MAX_DATA_LEN:
	118	data = data[:-1]
	119	dots = '...'
	120	data_str = '(none)'
	121	if len(data) > 0:
	122	data_str = ' '.join(['%02X' % b for b in data])
	123	self.put(ss, es, self.out_ann, [Ann.DESC,
	124	['Unknown command: %02X. Data: %s%s' % (cmd, data_str, dots)]])
	125
	126	def decode(self):
	127	current_cmd = -1
	128	current_data = []
	129	desc_ss = -1
	130	desc_es = -1
ef10cea7	131	self.reset()
f62e32bc AA	132	while True:
	133	# Check data on both CLK edges.
	134	(cs, clk, mosi, dc) = self.wait({1: 'e'})
	135
	136	if cs == 1: # Wait for CS = low, ignore the rest.
ef10cea7	137	self.reset()
f62e32bc AA	138	continue
	139
	140	if clk == 1:
	141	# Read one bit.
	142	self.bit_ss = self.samplenum
	143	if self.accum_bits_num == 0:
	144	self.byte_ss = self.samplenum
	145	self.current_bit = mosi
	146
	147	if (clk == 0) and (self.current_bit >= 0):
	148	# Process one bit.
	149	self.put(self.bit_ss, self.samplenum, self.out_ann,
	150	[Ann.BITS, [str(self.current_bit)]])
	151	self.accum_byte = (self.accum_byte << 1) \| self.current_bit # MSB-first.
	152	self.accum_bits_num += 1
	153	if self.accum_bits_num == 8:
	154	# Process one byte.
	155	ann = Ann.DATA if dc else Ann.CMD # DC = low for commands.
	156	self.put(self.byte_ss, self.samplenum, self.out_ann,
	157	[ann, ['%02X' % self.accum_byte]])
	158	if ann == Ann.CMD:
	159	self.put_desc(desc_ss, desc_es, current_cmd, current_data)
	160	desc_ss = self.byte_ss
	161	desc_es = self.samplenum # For cmds without data.
	162	current_cmd = self.accum_byte
	163	current_data = []
	164	else:
	165	if len(current_data) < MAX_DATA_LEN:
	166	current_data += [self.accum_byte]
	167	desc_es = self.samplenum
	168
	169	self.accum_bits_num = 0
	170	self.accum_byte = 0
	171	self.byte_ss = -1
	172	self.current_bit = -1
	173	self.bit_ss = -1