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1 | ## |
2 | ## This file is part of the libsigrokdecode project. | |
3 | ## | |
4 | ## Copyright (C) 2019 Federico Cerutti <federico@ceres-c.it> | |
5 | ## | |
6 | ## This program is free software; you can redistribute it and/or modify | |
7 | ## it under the terms of the GNU General Public License as published by | |
8 | ## the Free Software Foundation; either version 2 of the License, or | |
9 | ## (at your option) any later version. | |
10 | ## | |
11 | ## This program is distributed in the hope that it will be useful, | |
12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ## GNU General Public License for more details. | |
15 | ## | |
16 | ## You should have received a copy of the GNU General Public License | |
17 | ## along with this program; if not, see <http://www.gnu.org/licenses/>. | |
18 | ## | |
19 | ||
20 | import sigrokdecode as srd | |
21 | ||
5c47b179 GS |
22 | class Pin: |
23 | RST, CLK, IO, = range(3) | |
24 | ||
52f08e6d GS |
25 | class Ann: |
26 | BIT, ATR, CMD, DATA, RESET, = range(5) | |
27 | ||
28 | class Bin: | |
29 | SEND_DATA, = range(1) | |
30 | ||
31 | # CMD: [annotation class index, long annotation, short annotation] | |
7e87b2f7 | 32 | proto = { |
52f08e6d GS |
33 | 'ATR': [Ann.ATR, 'ATR', 'ATR'], |
34 | 'CMD': [Ann.CMD, 'Command', 'C'], | |
35 | 'DATA': [Ann.DATA, 'Data', 'D'], | |
36 | 'RESET': [Ann.RESET, 'Reset', 'R'], | |
7e87b2f7 FC |
37 | } |
38 | ||
39 | class Decoder(srd.Decoder): | |
40 | api_version = 3 | |
41 | id = 'sle44xx' | |
42 | name = 'SLE 44xx' | |
b46b88f3 | 43 | longname = 'SLE44xx memory card' |
7e87b2f7 FC |
44 | desc = 'SLE 4418/28/32/42 memory card serial protocol' |
45 | license = 'gplv2+' | |
46 | inputs = ['logic'] | |
0411c41c | 47 | outputs = [] |
ead00318 | 48 | tags = ['Memory'] |
7e87b2f7 FC |
49 | channels = ( |
50 | {'id': 'rst', 'name': 'RST', 'desc': 'Reset line'}, | |
51 | {'id': 'clk', 'name': 'CLK', 'desc': 'Clock line'}, | |
52 | {'id': 'io', 'name': 'I/O', 'desc': 'I/O data line'}, | |
53 | ) | |
54 | annotations = ( | |
52f08e6d | 55 | ('bit', 'Bit'), |
7e87b2f7 FC |
56 | ('atr', 'ATR'), |
57 | ('cmd', 'Command'), | |
58 | ('data', 'Data exchange'), | |
52f08e6d | 59 | ('reset', 'Reset'), |
7e87b2f7 FC |
60 | ) |
61 | annotation_rows = ( | |
52f08e6d GS |
62 | ('bits', 'Bits', (Ann.BIT,)), |
63 | ('fields', 'Fields', (Ann.ATR, Ann.CMD, Ann.DATA)), | |
64 | ('interrupts', 'Interrupts', (Ann.RESET,)), | |
7e87b2f7 FC |
65 | ) |
66 | binary = ( | |
67 | ('send-data', 'Send data'), | |
68 | ) | |
69 | ||
70 | def __init__(self): | |
71 | self.reset() | |
72 | ||
73 | def reset(self): | |
74 | self.ss = self.es = self.ss_byte = -1 | |
75 | self.bitcount = 0 | |
76 | self.databyte = 0 | |
77 | self.bits = [] | |
78 | self.cmd = 'RESET' | |
79 | ||
80 | def metadata(self, key, value): | |
81 | if key == srd.SRD_CONF_SAMPLERATE: | |
82 | self.samplerate = value | |
83 | ||
84 | def start(self): | |
7e87b2f7 FC |
85 | self.out_ann = self.register(srd.OUTPUT_ANN) |
86 | self.out_binary = self.register(srd.OUTPUT_BINARY) | |
87 | ||
88 | def putx(self, data): | |
89 | self.put(self.ss, self.es, self.out_ann, data) | |
90 | ||
7e87b2f7 FC |
91 | def putb(self, data): |
92 | self.put(self.ss, self.es, self.out_binary, data) | |
93 | ||
94 | def handle_reset(self, pins): | |
95 | self.ss, self.es = self.samplenum, self.samplenum | |
96 | cmd = 'RESET' # No need to set the global self.cmd as this command is atomic | |
7e87b2f7 FC |
97 | self.putx([proto[cmd][0], proto[cmd][1:]]) |
98 | self.bitcount = self.databyte = 0 | |
99 | self.bits = [] | |
100 | self.cmd = 'ATR' # Next data bytes will be ATR | |
101 | ||
102 | def handle_command(self, pins): | |
103 | rst, clk, io = pins | |
104 | self.ss, self.es = self.samplenum, self.samplenum | |
105 | # If I/O is rising -> command START | |
106 | # if I/O is falling -> command STOP and response data incoming | |
107 | self.cmd = 'CMD' if (io == 0) else 'DATA' | |
108 | self.bitcount = self.databyte = 0 | |
109 | self.bits = [] | |
110 | ||
111 | # Gather 8 bits of data | |
112 | def handle_data(self, pins): | |
113 | rst, clk, io = pins | |
114 | ||
115 | # Data is transmitted LSB-first. | |
116 | self.databyte |= (io << self.bitcount) | |
117 | ||
118 | # Remember the start of the first data/address bit. | |
119 | if self.bitcount == 0: | |
120 | self.ss_byte = self.samplenum | |
121 | ||
122 | # Store individual bits and their start/end samplenumbers. | |
123 | # In the list, index 0 represents the LSB (SLE44xx transmits LSB-first). | |
124 | self.bits.insert(0, [io, self.samplenum, self.samplenum]) | |
125 | if self.bitcount > 0: | |
126 | self.bits[1][2] = self.samplenum | |
127 | if self.bitcount == 7: | |
128 | self.bitwidth = self.bits[1][2] - self.bits[2][2] | |
129 | self.bits[0][2] += self.bitwidth | |
130 | ||
131 | # Return if we haven't collected all 8 bits, yet. | |
132 | if self.bitcount < 7: | |
133 | self.bitcount += 1 | |
134 | return | |
135 | ||
136 | self.ss, self.es = self.ss_byte, self.samplenum + self.bitwidth | |
137 | ||
52f08e6d | 138 | self.putb([Bin.SEND_DATA, bytes([self.databyte])]) |
7e87b2f7 FC |
139 | |
140 | for bit in self.bits: | |
52f08e6d | 141 | self.put(bit[1], bit[2], self.out_ann, [Ann.BIT, ['%d' % bit[0]]]) |
7e87b2f7 FC |
142 | |
143 | self.putx([proto[self.cmd][0], ['%s: %02X' % (proto[self.cmd][1], self.databyte), | |
144 | '%s: %02X' % (proto[self.cmd][2], self.databyte), '%02X' % self.databyte]]) | |
145 | ||
146 | # Done with this packet. | |
147 | self.bitcount = self.databyte = 0 | |
148 | self.bits = [] | |
149 | ||
150 | def decode(self): | |
151 | while True: | |
5c47b179 GS |
152 | # Signal conditions tracked by the protocol decoder: |
153 | # - RESET condition (R): RST = rising | |
154 | # - Incoming data (D): RST = low, CLK = rising. | |
155 | # - Command mode START: CLK = high, I/O = falling. | |
156 | # - Command mode STOP: CLK = high, I/O = rising. | |
157 | (COND_RESET, COND_DATA, COND_CMD_START, COND_CMD_STOP,) = range(4) | |
158 | conditions = [ | |
159 | {Pin.RST: 'r'}, | |
160 | {Pin.RST: 'l', Pin.CLK: 'r'}, | |
161 | {Pin.CLK: 'h', Pin.IO: 'f'}, | |
162 | {Pin.CLK: 'h', Pin.IO: 'r'}, | |
163 | ] | |
164 | pins = self.wait(conditions) | |
165 | if self.matched[COND_RESET]: | |
7e87b2f7 | 166 | self.handle_reset(pins) |
5c47b179 | 167 | elif self.matched[COND_DATA]: |
7e87b2f7 | 168 | self.handle_data(pins) |
5c47b179 | 169 | elif self.matched[COND_CMD_START]: |
7e87b2f7 | 170 | self.handle_command(pins) |
5c47b179 | 171 | elif self.matched[COND_CMD_STOP]: |
ead00318 | 172 | self.handle_command(pins) |