]> sigrok.org Git - libsigrokdecode.git/blame - decoders/nunchuk/pd.py
decoders: Add/update tags for each PD.
[libsigrokdecode.git] / decoders / nunchuk / pd.py
CommitLineData
cd0fc8c5 1##
50bd5d25 2## This file is part of the libsigrokdecode project.
cd0fc8c5 3##
803cf705 4## Copyright (C) 2010-2014 Uwe Hermann <uwe@hermann-uwe.de>
cd0fc8c5
UH
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; either version 2 of the License, or
9## (at your option) any later version.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
16## You should have received a copy of the GNU General Public License
4539e9ca 17## along with this program; if not, see <http://www.gnu.org/licenses/>.
cd0fc8c5
UH
18##
19
677d597b 20import sigrokdecode as srd
1c8ac5bf 21
677d597b 22class Decoder(srd.Decoder):
b197383c 23 api_version = 3
2b7d0e2b 24 id = 'nunchuk'
012cfd0d 25 name = 'Nunchuk'
3d3da57d 26 longname = 'Nintendo Wii Nunchuk'
a465436e 27 desc = 'Nintendo Wii Nunchuk controller protocol.'
012cfd0d
UH
28 license = 'gplv2+'
29 inputs = ['i2c']
30 outputs = ['nunchuck']
d6d8a8a4 31 tags = ['Sensor']
803cf705
UH
32 annotations = \
33 tuple(('reg-0x%02X' % i, 'Register 0x%02X' % i) for i in range(6)) + (
34 ('bit-bz', 'BZ bit'),
35 ('bit-bc', 'BC bit'),
36 ('bit-ax', 'AX bits'),
37 ('bit-ay', 'AY bits'),
38 ('bit-az', 'AZ bits'),
39 ('nunchuk-write', 'Nunchuk write'),
40 ('cmd-init', 'Init command'),
41 ('summary', 'Summary'),
42 ('warnings', 'Warnings'),
43 )
44 annotation_rows = (
45 ('regs', 'Registers', tuple(range(13))),
46 ('summary', 'Summary', (13,)),
47 ('warnings', 'Warnings', (14,)),
da9bcbd9 48 )
012cfd0d 49
92b7b49f 50 def __init__(self):
10aeb8ea
GS
51 self.reset()
52
53 def reset(self):
5ea8b024 54 self.state = 'IDLE'
11860e5a 55 self.sx = self.sy = self.ax = self.ay = self.az = self.bz = self.bc = -1
012cfd0d 56 self.databytecount = 0
5ea8b024 57 self.reg = 0x00
486b19ce 58 self.ss = self.es = self.ss_block = self.es_block = 0
b7ddc77b 59 self.init_seq = []
012cfd0d 60
8915b346 61 def start(self):
be465111 62 self.out_ann = self.register(srd.OUTPUT_ANN)
012cfd0d 63
739f1b73 64 def putx(self, data):
739f1b73
UH
65 self.put(self.ss, self.es, self.out_ann, data)
66
b7ddc77b 67 def putb(self, data):
486b19ce 68 self.put(self.ss_block, self.es_block, self.out_ann, data)
803cf705
UH
69
70 def putd(self, bit1, bit2, data):
71 self.put(self.bits[bit1][1], self.bits[bit2][2], self.out_ann, data)
b7ddc77b 72
5ea8b024 73 def handle_reg_0x00(self, databyte):
486b19ce 74 self.ss_block = self.ss
5ea8b024 75 self.sx = databyte
803cf705
UH
76 self.putx([0, ['Analog stick X position: 0x%02X' % self.sx,
77 'SX: 0x%02X' % self.sx]])
5ea8b024
UH
78
79 def handle_reg_0x01(self, databyte):
80 self.sy = databyte
803cf705
UH
81 self.putx([1, ['Analog stick Y position: 0x%02X' % self.sy,
82 'SY: 0x%02X' % self.sy]])
5ea8b024
UH
83
84 def handle_reg_0x02(self, databyte):
85 self.ax = databyte << 2
803cf705
UH
86 self.putx([2, ['Accelerometer X value bits[9:2]: 0x%03X' % self.ax,
87 'AX[9:2]: 0x%03X' % self.ax]])
5ea8b024
UH
88
89 def handle_reg_0x03(self, databyte):
90 self.ay = databyte << 2
803cf705
UH
91 self.putx([3, ['Accelerometer Y value bits[9:2]: 0x%03X' % self.ay,
92 'AY[9:2]: 0x%03X' % self.ay]])
5ea8b024
UH
93
94 def handle_reg_0x04(self, databyte):
95 self.az = databyte << 2
803cf705
UH
96 self.putx([4, ['Accelerometer Z value bits[9:2]: 0x%03X' % self.az,
97 'AZ[9:2]: 0x%03X' % self.az]])
5ea8b024 98
5ea8b024 99 def handle_reg_0x05(self, databyte):
486b19ce 100 self.es_block = self.es
5ea8b024
UH
101 self.bz = (databyte & (1 << 0)) >> 0 # Bits[0:0]
102 self.bc = (databyte & (1 << 1)) >> 1 # Bits[1:1]
103 ax_rest = (databyte & (3 << 2)) >> 2 # Bits[3:2]
104 ay_rest = (databyte & (3 << 4)) >> 4 # Bits[5:4]
105 az_rest = (databyte & (3 << 6)) >> 6 # Bits[7:6]
106 self.ax |= ax_rest
107 self.ay |= ay_rest
108 self.az |= az_rest
109
803cf705
UH
110 # self.putx([5, ['Register 5', 'Reg 5', 'R5']])
111
5ea8b024 112 s = '' if (self.bz == 0) else 'not '
803cf705 113 self.putd(0, 0, [6, ['Z: %spressed' % s, 'BZ: %d' % self.bz]])
5ea8b024
UH
114
115 s = '' if (self.bc == 0) else 'not '
803cf705 116 self.putd(1, 1, [7, ['C: %spressed' % s, 'BC: %d' % self.bc]])
5ea8b024 117
803cf705
UH
118 self.putd(3, 2, [8, ['Accelerometer X value bits[1:0]: 0x%X' % ax_rest,
119 'AX[1:0]: 0x%X' % ax_rest]])
5ea8b024 120
803cf705
UH
121 self.putd(5, 4, [9, ['Accelerometer Y value bits[1:0]: 0x%X' % ay_rest,
122 'AY[1:0]: 0x%X' % ay_rest]])
5ea8b024 123
803cf705
UH
124 self.putd(7, 6, [10, ['Accelerometer Z value bits[1:0]: 0x%X' % az_rest,
125 'AZ[1:0]: 0x%X' % az_rest]])
126
127 self.reg = 0x00
c0d7b38e 128
11860e5a 129 def output_full_block_if_possible(self):
803cf705 130 # For now, only output summary annotations if all values are available.
11860e5a
UH
131 t = (self.sx, self.sy, self.ax, self.ay, self.az, self.bz, self.bc)
132 if -1 in t:
133 return
aac0ac24
UH
134 bz = 'pressed' if self.bz == 0 else 'not pressed'
135 bc = 'pressed' if self.bc == 0 else 'not pressed'
803cf705
UH
136 s = 'Analog stick: %d/%d, accelerometer: %d/%d/%d, Z: %s, C: %s' % \
137 (self.sx, self.sy, self.ax, self.ay, self.az, bz, bc)
138 self.putb([13, [s]])
11860e5a 139
b7ddc77b 140 def handle_reg_write(self, databyte):
803cf705 141 self.putx([11, ['Nunchuk write: 0x%02X' % databyte]])
b7ddc77b
UH
142 if len(self.init_seq) < 2:
143 self.init_seq.append(databyte)
144
145 def output_init_seq(self):
146 if len(self.init_seq) != 2:
803cf705 147 self.putb([14, ['Init sequence was %d bytes long (2 expected)' % \
b7ddc77b 148 len(self.init_seq)]])
803cf705 149 return
b7ddc77b 150
803cf705
UH
151 if self.init_seq != [0x40, 0x00]:
152 self.putb([14, ['Unknown init sequence (expected: 0x40 0x00)']])
153 return
b7ddc77b
UH
154
155 # TODO: Detect Nunchuk clones (they have different init sequences).
b7ddc77b 156
803cf705 157 self.putb([12, ['Initialize Nunchuk', 'Init Nunchuk', 'Init', 'I']])
b7ddc77b 158
5ea8b024 159 def decode(self, ss, es, data):
1b75abfd 160 cmd, databyte = data
c0d7b38e 161
803cf705
UH
162 # Collect the 'BITS' packet, then return. The next packet is
163 # guaranteed to belong to these bits we just stored.
164 if cmd == 'BITS':
165 self.bits = databyte
166 return
167
5ea8b024
UH
168 self.ss, self.es = ss, es
169
170 # State machine.
171 if self.state == 'IDLE':
00197484 172 # Wait for an I²C START condition.
5ea8b024
UH
173 if cmd != 'START':
174 return
175 self.state = 'GET SLAVE ADDR'
486b19ce 176 self.ss_block = ss
5ea8b024 177 elif self.state == 'GET SLAVE ADDR':
b7ddc77b
UH
178 # Wait for an address read/write operation.
179 if cmd == 'ADDRESS READ':
180 self.state = 'READ REGS'
181 elif cmd == 'ADDRESS WRITE':
182 self.state = 'WRITE REGS'
5ea8b024
UH
183 elif self.state == 'READ REGS':
184 if cmd == 'DATA READ':
185 handle_reg = getattr(self, 'handle_reg_0x%02x' % self.reg)
186 handle_reg(databyte)
187 self.reg += 1
188 elif cmd == 'STOP':
486b19ce 189 self.es_block = es
11860e5a 190 self.output_full_block_if_possible()
11860e5a
UH
191 self.sx = self.sy = self.ax = self.ay = self.az = -1
192 self.bz = self.bc = -1
5ea8b024 193 self.state = 'IDLE'
c0d7b38e 194 else:
803cf705 195 # self.putx([14, ['Ignoring: %s (data=%s)' % (cmd, databyte)]])
5ea8b024 196 pass
b7ddc77b
UH
197 elif self.state == 'WRITE REGS':
198 if cmd == 'DATA WRITE':
199 self.handle_reg_write(databyte)
200 elif cmd == 'STOP':
486b19ce 201 self.es_block = es
b7ddc77b
UH
202 self.output_init_seq()
203 self.init_seq = []
204 self.state = 'IDLE'
205 else:
803cf705 206 # self.putx([14, ['Ignoring: %s (data=%s)' % (cmd, databyte)]])
b7ddc77b 207 pass