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all decoders: introduce a reset() method
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cd0fc8c5 1##
50bd5d25 2## This file is part of the libsigrokdecode project.
cd0fc8c5 3##
803cf705 4## Copyright (C) 2010-2014 Uwe Hermann <uwe@hermann-uwe.de>
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5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; either version 2 of the License, or
9## (at your option) any later version.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
16## You should have received a copy of the GNU General Public License
4539e9ca 17## along with this program; if not, see <http://www.gnu.org/licenses/>.
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18##
19
677d597b 20import sigrokdecode as srd
1c8ac5bf 21
677d597b 22class Decoder(srd.Decoder):
b197383c 23 api_version = 3
2b7d0e2b 24 id = 'nunchuk'
012cfd0d 25 name = 'Nunchuk'
3d3da57d 26 longname = 'Nintendo Wii Nunchuk'
a465436e 27 desc = 'Nintendo Wii Nunchuk controller protocol.'
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28 license = 'gplv2+'
29 inputs = ['i2c']
30 outputs = ['nunchuck']
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31 annotations = \
32 tuple(('reg-0x%02X' % i, 'Register 0x%02X' % i) for i in range(6)) + (
33 ('bit-bz', 'BZ bit'),
34 ('bit-bc', 'BC bit'),
35 ('bit-ax', 'AX bits'),
36 ('bit-ay', 'AY bits'),
37 ('bit-az', 'AZ bits'),
38 ('nunchuk-write', 'Nunchuk write'),
39 ('cmd-init', 'Init command'),
40 ('summary', 'Summary'),
41 ('warnings', 'Warnings'),
42 )
43 annotation_rows = (
44 ('regs', 'Registers', tuple(range(13))),
45 ('summary', 'Summary', (13,)),
46 ('warnings', 'Warnings', (14,)),
da9bcbd9 47 )
012cfd0d 48
92b7b49f 49 def __init__(self):
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50 self.reset()
51
52 def reset(self):
5ea8b024 53 self.state = 'IDLE'
11860e5a 54 self.sx = self.sy = self.ax = self.ay = self.az = self.bz = self.bc = -1
012cfd0d 55 self.databytecount = 0
5ea8b024 56 self.reg = 0x00
486b19ce 57 self.ss = self.es = self.ss_block = self.es_block = 0
b7ddc77b 58 self.init_seq = []
012cfd0d 59
8915b346 60 def start(self):
be465111 61 self.out_ann = self.register(srd.OUTPUT_ANN)
012cfd0d 62
739f1b73 63 def putx(self, data):
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64 self.put(self.ss, self.es, self.out_ann, data)
65
b7ddc77b 66 def putb(self, data):
486b19ce 67 self.put(self.ss_block, self.es_block, self.out_ann, data)
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68
69 def putd(self, bit1, bit2, data):
70 self.put(self.bits[bit1][1], self.bits[bit2][2], self.out_ann, data)
b7ddc77b 71
5ea8b024 72 def handle_reg_0x00(self, databyte):
486b19ce 73 self.ss_block = self.ss
5ea8b024 74 self.sx = databyte
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75 self.putx([0, ['Analog stick X position: 0x%02X' % self.sx,
76 'SX: 0x%02X' % self.sx]])
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77
78 def handle_reg_0x01(self, databyte):
79 self.sy = databyte
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80 self.putx([1, ['Analog stick Y position: 0x%02X' % self.sy,
81 'SY: 0x%02X' % self.sy]])
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82
83 def handle_reg_0x02(self, databyte):
84 self.ax = databyte << 2
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85 self.putx([2, ['Accelerometer X value bits[9:2]: 0x%03X' % self.ax,
86 'AX[9:2]: 0x%03X' % self.ax]])
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87
88 def handle_reg_0x03(self, databyte):
89 self.ay = databyte << 2
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90 self.putx([3, ['Accelerometer Y value bits[9:2]: 0x%03X' % self.ay,
91 'AY[9:2]: 0x%03X' % self.ay]])
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92
93 def handle_reg_0x04(self, databyte):
94 self.az = databyte << 2
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95 self.putx([4, ['Accelerometer Z value bits[9:2]: 0x%03X' % self.az,
96 'AZ[9:2]: 0x%03X' % self.az]])
5ea8b024 97
5ea8b024 98 def handle_reg_0x05(self, databyte):
486b19ce 99 self.es_block = self.es
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100 self.bz = (databyte & (1 << 0)) >> 0 # Bits[0:0]
101 self.bc = (databyte & (1 << 1)) >> 1 # Bits[1:1]
102 ax_rest = (databyte & (3 << 2)) >> 2 # Bits[3:2]
103 ay_rest = (databyte & (3 << 4)) >> 4 # Bits[5:4]
104 az_rest = (databyte & (3 << 6)) >> 6 # Bits[7:6]
105 self.ax |= ax_rest
106 self.ay |= ay_rest
107 self.az |= az_rest
108
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109 # self.putx([5, ['Register 5', 'Reg 5', 'R5']])
110
5ea8b024 111 s = '' if (self.bz == 0) else 'not '
803cf705 112 self.putd(0, 0, [6, ['Z: %spressed' % s, 'BZ: %d' % self.bz]])
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113
114 s = '' if (self.bc == 0) else 'not '
803cf705 115 self.putd(1, 1, [7, ['C: %spressed' % s, 'BC: %d' % self.bc]])
5ea8b024 116
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117 self.putd(3, 2, [8, ['Accelerometer X value bits[1:0]: 0x%X' % ax_rest,
118 'AX[1:0]: 0x%X' % ax_rest]])
5ea8b024 119
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120 self.putd(5, 4, [9, ['Accelerometer Y value bits[1:0]: 0x%X' % ay_rest,
121 'AY[1:0]: 0x%X' % ay_rest]])
5ea8b024 122
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123 self.putd(7, 6, [10, ['Accelerometer Z value bits[1:0]: 0x%X' % az_rest,
124 'AZ[1:0]: 0x%X' % az_rest]])
125
126 self.reg = 0x00
c0d7b38e 127
11860e5a 128 def output_full_block_if_possible(self):
803cf705 129 # For now, only output summary annotations if all values are available.
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130 t = (self.sx, self.sy, self.ax, self.ay, self.az, self.bz, self.bc)
131 if -1 in t:
132 return
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133 bz = 'pressed' if self.bz == 0 else 'not pressed'
134 bc = 'pressed' if self.bc == 0 else 'not pressed'
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135 s = 'Analog stick: %d/%d, accelerometer: %d/%d/%d, Z: %s, C: %s' % \
136 (self.sx, self.sy, self.ax, self.ay, self.az, bz, bc)
137 self.putb([13, [s]])
11860e5a 138
b7ddc77b 139 def handle_reg_write(self, databyte):
803cf705 140 self.putx([11, ['Nunchuk write: 0x%02X' % databyte]])
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141 if len(self.init_seq) < 2:
142 self.init_seq.append(databyte)
143
144 def output_init_seq(self):
145 if len(self.init_seq) != 2:
803cf705 146 self.putb([14, ['Init sequence was %d bytes long (2 expected)' % \
b7ddc77b 147 len(self.init_seq)]])
803cf705 148 return
b7ddc77b 149
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150 if self.init_seq != [0x40, 0x00]:
151 self.putb([14, ['Unknown init sequence (expected: 0x40 0x00)']])
152 return
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153
154 # TODO: Detect Nunchuk clones (they have different init sequences).
b7ddc77b 155
803cf705 156 self.putb([12, ['Initialize Nunchuk', 'Init Nunchuk', 'Init', 'I']])
b7ddc77b 157
5ea8b024 158 def decode(self, ss, es, data):
1b75abfd 159 cmd, databyte = data
c0d7b38e 160
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161 # Collect the 'BITS' packet, then return. The next packet is
162 # guaranteed to belong to these bits we just stored.
163 if cmd == 'BITS':
164 self.bits = databyte
165 return
166
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167 self.ss, self.es = ss, es
168
169 # State machine.
170 if self.state == 'IDLE':
00197484 171 # Wait for an I²C START condition.
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172 if cmd != 'START':
173 return
174 self.state = 'GET SLAVE ADDR'
486b19ce 175 self.ss_block = ss
5ea8b024 176 elif self.state == 'GET SLAVE ADDR':
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177 # Wait for an address read/write operation.
178 if cmd == 'ADDRESS READ':
179 self.state = 'READ REGS'
180 elif cmd == 'ADDRESS WRITE':
181 self.state = 'WRITE REGS'
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182 elif self.state == 'READ REGS':
183 if cmd == 'DATA READ':
184 handle_reg = getattr(self, 'handle_reg_0x%02x' % self.reg)
185 handle_reg(databyte)
186 self.reg += 1
187 elif cmd == 'STOP':
486b19ce 188 self.es_block = es
11860e5a 189 self.output_full_block_if_possible()
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190 self.sx = self.sy = self.ax = self.ay = self.az = -1
191 self.bz = self.bc = -1
5ea8b024 192 self.state = 'IDLE'
c0d7b38e 193 else:
803cf705 194 # self.putx([14, ['Ignoring: %s (data=%s)' % (cmd, databyte)]])
5ea8b024 195 pass
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196 elif self.state == 'WRITE REGS':
197 if cmd == 'DATA WRITE':
198 self.handle_reg_write(databyte)
199 elif cmd == 'STOP':
486b19ce 200 self.es_block = es
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201 self.output_init_seq()
202 self.init_seq = []
203 self.state = 'IDLE'
204 else:
803cf705 205 # self.putx([14, ['Ignoring: %s (data=%s)' % (cmd, databyte)]])
b7ddc77b 206 pass