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d997c01a 1##
50bd5d25 2## This file is part of the libsigrokdecode project.
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3##
4## Copyright (C) 2012 Uwe Hermann <uwe@hermann-uwe.de>
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; either version 2 of the License, or
9## (at your option) any later version.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
16## You should have received a copy of the GNU General Public License
17## along with this program; if not, write to the Free Software
18## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19##
20
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21import sigrokdecode as srd
22
17160de7 23# Definitions of various bits in MXC6225XU registers.
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24status = {
25 # SH[1:0]
26 'sh': {
17160de7 27 0b00: 'none',
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28 0b01: 'shake left',
29 0b10: 'shake right',
30 0b11: 'undefined',
31 },
32 # ORI[1:0] and OR[1:0] (same format)
33 'ori': {
34 0b00: 'vertical in upright orientation',
35 0b01: 'rotated 90 degrees clockwise',
36 0b10: 'vertical in inverted orientation',
37 0b11: 'rotated 90 degrees counterclockwise',
38 },
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39 # SHTH[1:0]
40 'shth': {
41 0b00: '0.5g',
42 0b01: '1.0g',
43 0b10: '1.5g',
44 0b11: '2.0g',
45 },
46 # SHC[1:0]
47 'shc': {
48 0b00: '16',
49 0b01: '32',
50 0b10: '64',
51 0b11: '128',
52 },
53 # ORC[1:0]
54 'orc': {
55 0b00: '16',
56 0b01: '32',
57 0b10: '64',
58 0b11: '128',
59 },
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60}
61
62class Decoder(srd.Decoder):
12851357 63 api_version = 2
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64 id = 'mxc6225xu'
65 name = 'MXC6225XU'
66 longname = 'MEMSIC MXC6225XU'
a465436e 67 desc = 'Digital Thermal Orientation Sensor (DTOS) protocol.'
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68 license = 'gplv2+'
69 inputs = ['i2c']
70 outputs = ['mxc6225xu']
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71 annotations = (
72 ('text', 'Human-readable text'),
73 )
d997c01a 74
92b7b49f 75 def __init__(self):
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76 self.state = 'IDLE'
77
8915b346 78 def start(self):
be465111 79 self.out_ann = self.register(srd.OUTPUT_ANN)
d997c01a 80
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81 def putx(self, data):
82 self.put(self.ss, self.es, self.out_ann, data)
83
84 def handle_reg_0x00(self, b):
85 # XOUT: 8-bit x-axis acceleration output.
86 # Data is in 2's complement, values range from -128 to 127.
17160de7 87 self.putx([0, ['XOUT: %d' % b]])
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88
89 def handle_reg_0x01(self, b):
90 # YOUT: 8-bit y-axis acceleration output.
91 # Data is in 2's complement, values range from -128 to 127.
17160de7 92 self.putx([0, ['YOUT: %d' % b]])
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93
94 def handle_reg_0x02(self, b):
95 # STATUS: Orientation and shake status.
96
17160de7 97 # Bits[7:7]: INT
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98 int_val = (b >> 7) & 1
99 s = 'unchanged and no' if (int_val == 0) else 'changed or'
868fd207 100 ann = 'INT = %d: Orientation %s shake event occurred\n' % (int_val, s)
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101
102 # Bits[6:5]: SH[1:0]
103 sh = (((b >> 6) & 1) << 1) | ((b >> 5) & 1)
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104 ann += 'SH[1:0] = %s: Shake event: %s\n' % \
105 (bin(sh)[2:], status['sh'][sh])
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106
107 # Bits[4:4]: TILT
17160de7 108 tilt = (b >> 4) & 1
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109 s = '' if (tilt == 0) else 'not '
110 ann += 'TILT = %d: Orientation measurement is %svalid\n' % (tilt, s)
111
112 # Bits[3:2]: ORI[1:0]
113 ori = (((b >> 3) & 1) << 1) | ((b >> 2) & 1)
114 ann += 'ORI[1:0] = %s: %s\n' % (bin(ori)[2:], status['ori'][ori])
115
116 # Bits[1:0]: OR[1:0]
117 or_val = (((b >> 1) & 1) << 1) | ((b >> 0) & 1)
118 ann += 'OR[1:0] = %s: %s\n' % (bin(or_val)[2:], status['ori'][or_val])
119
120 # ann += 'b = %s\n' % (bin(b))
121
122 self.putx([0, [ann]])
123
124 def handle_reg_0x03(self, b):
125 # DETECTION: Powerdown, orientation and shake detection parameters.
126 # Note: This is a write-only register.
127
17160de7 128 # Bits[7:7]: PD
d997c01a 129 pd = (b >> 7) & 1
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130 s = 'Do not power down' if (pd == 0) else 'Power down'
131 ann = 'PD = %d: %s the device (into a low-power state)\n' % (pd, s)
d997c01a 132
17160de7 133 # Bits[6:6]: SHM
d997c01a 134 shm = (b >> 6) & 1
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135 ann = 'SHM = %d: Set shake mode to %d\n' % (shm, shm)
136
137 # Bits[5:4]: SHTH[1:0]
138 shth = (((b >> 5) & 1) << 1) | ((b >> 4) & 1)
139 ann += 'SHTH[1:0] = %s: Set shake threshold to %s\n' \
140 % (bin(shth)[2:], status['shth'][shth])
d997c01a 141
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142 # Bits[3:2]: SHC[1:0]
143 shc = (((b >> 3) & 1) << 1) | ((b >> 2) & 1)
144 ann += 'SHC[1:0] = %s: Set shake count to %s readings\n' \
145 % (bin(shc)[2:], status['shc'][shc])
146
147 # Bits[1:0]: ORC[1:0]
148 orc = (((b >> 1) & 1) << 1) | ((b >> 0) & 1)
149 ann += 'ORC[1:0] = %s: Set orientation count to %s readings\n' \
150 % (bin(orc)[2:], status['orc'][orc])
151
152 self.putx([0, [ann]])
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153
154 # TODO: Fixup, this is copy-pasted from another PD.
17160de7 155 # TODO: Handle/check the ACKs/NACKs.
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156 def decode(self, ss, es, data):
157 cmd, databyte = data
158
31f1a296 159 # Store the start/end samples of this I²C packet.
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160 self.ss, self.es = ss, es
161
162 # State machine.
163 if self.state == 'IDLE':
31f1a296 164 # Wait for an I²C START condition.
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165 if cmd != 'START':
166 return
167 self.state = 'GET SLAVE ADDR'
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168 elif self.state == 'GET SLAVE ADDR':
169 # Wait for an address write operation.
17160de7 170 # TODO: We should only handle packets to the slave(?)
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171 if cmd != 'ADDRESS WRITE':
172 return
173 self.state = 'GET REG ADDR'
174 elif self.state == 'GET REG ADDR':
175 # Wait for a data write (master selects the slave register).
176 if cmd != 'DATA WRITE':
177 return
178 self.reg = databyte
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179 self.state = 'WRITE REGS'
180 elif self.state == 'WRITE REGS':
181 # If we see a Repeated Start here, it's a multi-byte read.
d997c01a 182 if cmd == 'START REPEAT':
17160de7 183 self.state = 'READ REGS'
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184 return
185 # Otherwise: Get data bytes until a STOP condition occurs.
186 if cmd == 'DATA WRITE':
187 handle_reg = getattr(self, 'handle_reg_0x%02x' % self.reg)
188 handle_reg(databyte)
189 self.reg += 1
190 # TODO: Check for NACK!
191 elif cmd == 'STOP':
192 # TODO
193 self.state = 'IDLE'
194 else:
195 pass # TODO
17160de7 196 elif self.state == 'READ REGS':
d997c01a 197 # Wait for an address read operation.
17160de7 198 # TODO: We should only handle packets to the slave(?)
d997c01a 199 if cmd == 'ADDRESS READ':
17160de7 200 self.state = 'READ REGS2'
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201 return
202 else:
203 pass # TODO
17160de7 204 elif self.state == 'READ REGS2':
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205 if cmd == 'DATA READ':
206 handle_reg = getattr(self, 'handle_reg_0x%02x' % self.reg)
207 handle_reg(databyte)
208 self.reg += 1
209 # TODO: Check for NACK!
210 elif cmd == 'STOP':
211 # TODO
212 self.state = 'IDLE'
213 else:
214 pass # TODO?