kingst-la2016: make FPGA bitstream upload optional

kingst-la2016: make FPGA bitstream upload optional

Separate the FPGA bitstream upload logic into the strict file content
upload, and the register access to initialize and enable a currently
loaded bitstream. Check before upload whether a working bitstream is
available in the device.

This eliminates a 600ms delay in every device open code path after the
initial upload. Which speeds up the start of an acquisition. Works in
Pulseview as well as sigrok-cli, even across process invocations.

Unfortunately test conditions are rather weak, they are constrained by
an arbitrary vendor's choice. Stricter checks can get added later if
the need arises (when incompatible device firmware versions are seen,
and more reliable test criteria become available). The implementation
lends itself to transparent robustness improvements.