* Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
* Copyright (C) 2015 Google, Inc.
* (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
+ * Copyright (C) 2017 Frank Stettner <frank-stettner@gmx.net>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
#define CH_IDX(x) (1 << x)
#define FREQ_DC_ONLY {0, 0, 0, 0, 0}
-
-static const uint32_t devopts_none[] = { };
+#define NO_OVP_LIMITS {0, 0, 0, 0, 0}
+#define NO_OCP_LIMITS {0, 0, 0, 0, 0}
/* Agilent/Keysight N5700A series */
static const uint32_t agilent_n5700a_devopts[] = {
};
static const struct channel_spec agilent_n5767a_ch[] = {
- { "1", { 0, 60, 0.0072, 3, 4 }, { 0, 25, 0.003, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY },
+ { "1", { 0, 60, 0.0072, 3, 4 }, { 0, 25, 0.003, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
};
static const struct channel_spec agilent_n5763a_ch[] = {
- { "1", { 0, 12.5, 0.0015, 3, 4 }, { 0, 120, 0.0144, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY },
+ { "1", { 0, 12.5, 0.0015, 3, 4 }, { 0, 120, 0.0144, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
};
/*
};
static const struct channel_spec chroma_61604_ch[] = {
- { "1", { 0, 300, 0.1, 1, 1 }, { 0, 16, 0.1, 2, 2 }, { 0, 2000, 0, 1, 1 }, { 1.0, 1000.0, 0.01 } },
+ { "1", { 0, 300, 0.1, 1, 1 }, { 0, 16, 0.1, 2, 2 }, { 0, 2000, 0, 1, 1 }, { 1.0, 1000.0, 0.01 }, NO_OVP_LIMITS, NO_OCP_LIMITS },
};
static const struct channel_group_spec chroma_61604_cg[] = {
channel = g_malloc0(sizeof(struct channel_spec));
channel->name = "1";
channel->voltage[0] = channel->current[0] = channel->power[0] = 0.0;
- channel->voltage[1] = (float)volts;
- channel->current[1] = (float)amps;
- channel->power[1] = (float)watts;
+ channel->voltage[1] = volts;
+ channel->current[1] = amps;
+ channel->power[1] = watts;
channel->voltage[2] = channel->current[2] = 0.01;
channel->voltage[3] = channel->voltage[4] = 3;
channel->current[3] = channel->current[4] = 4;
return SR_OK;
}
+/* Rigol DP700 series */
+static const uint32_t rigol_dp700_devopts[] = {
+ SR_CONF_CONTINUOUS,
+};
+
+static const uint32_t rigol_dp700_devopts_cg[] = {
+ SR_CONF_REGULATION | SR_CONF_GET,
+ SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
+ SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
+ SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
+ SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
+ SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
+ SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
+ SR_CONF_VOLTAGE | SR_CONF_GET,
+ SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+ SR_CONF_CURRENT | SR_CONF_GET,
+ SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+ SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
+};
+
+static const struct channel_spec rigol_dp711_ch[] = {
+ { "1", { 0, 30, 0.01, 3, 3 }, { 0, 5, 0.01, 3, 3 }, { 0, 150, 0, 3, 3 }, FREQ_DC_ONLY },
+};
+
+static const struct channel_spec rigol_dp712_ch[] = {
+ { "1", { 0, 50, 0.01, 3, 3 }, { 0, 3, 0.01, 3, 3 }, { 0, 150, 0, 3, 3 }, FREQ_DC_ONLY },
+};
+
+static const struct channel_group_spec rigol_dp700_cg[] = {
+ { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
+};
+
+/* Same as the DP800 series, except for the missing :SYST:OTP* commands. */
+static const struct scpi_command rigol_dp700_cmd[] = {
+ { SCPI_CMD_REMOTE, "SYST:REMOTE" },
+ { SCPI_CMD_LOCAL, "SYST:LOCAL" },
+ { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
+ { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
+ { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
+ { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
+ { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
+ { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
+ { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
+ { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
+ { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
+ { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
+ { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
+ { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
+ { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
+ { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
+ { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
+ { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
+ { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
+ { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
+ { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
+ { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
+ { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
+ { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
+ { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
+ { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
+ { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
+ { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
+ { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
+ ALL_ZERO
+};
+
/* Rigol DP800 series */
static const uint32_t rigol_dp800_devopts[] = {
SR_CONF_CONTINUOUS,
};
static const struct channel_spec rigol_dp821a_ch[] = {
- { "1", { 0, 60, 0.001, 3, 3 }, { 0, 1, 0.0001, 4, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY },
- { "2", { 0, 8, 0.001, 3, 3 }, { 0, 10, 0.001, 3, 3 }, { 0, 80, 0, 3, 3 }, FREQ_DC_ONLY },
+ { "1", { 0, 60, 0.001, 3, 3 }, { 0, 1, 0.0001, 4, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
+ { "2", { 0, 8, 0.001, 3, 3 }, { 0, 10, 0.001, 3, 3 }, { 0, 80, 0, 3, 3 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
};
static const struct channel_spec rigol_dp831_ch[] = {
- { "1", { 0, 8, 0.001, 3, 4 }, { 0, 5, 0.0003, 3, 4 }, { 0, 40, 0, 3, 4 }, FREQ_DC_ONLY },
- { "2", { 0, 30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY },
- { "3", { 0, -30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY },
+ { "1", { 0, 8, 0.001, 3, 4 }, { 0, 5, 0.0003, 3, 4 }, { 0, 40, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
+ { "2", { 0, 30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
+ { "3", { 0, -30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
};
static const struct channel_spec rigol_dp832_ch[] = {
- { "1", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY },
- { "2", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY },
- { "3", { 0, 5, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY },
+ { "1", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
+ { "2", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
+ { "3", { 0, 5, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
};
static const struct channel_group_spec rigol_dp820_cg[] = {
/* HP 663xx series */
static const uint32_t hp_6630a_devopts[] = {
SR_CONF_CONTINUOUS,
+};
+
+static const uint32_t hp_6630a_devopts_cg[] = {
SR_CONF_ENABLED | SR_CONF_SET,
SR_CONF_VOLTAGE | SR_CONF_GET,
SR_CONF_CURRENT | SR_CONF_GET,
SR_CONF_VOLTAGE_TARGET | SR_CONF_SET | SR_CONF_LIST,
SR_CONF_CURRENT_LIMIT | SR_CONF_SET | SR_CONF_LIST,
- SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_SET,
+ SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_SET | SR_CONF_LIST,
SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_SET,
};
-static const uint32_t hp_6632b_devopts[] = {
+static const uint32_t hp_6630b_devopts[] = {
SR_CONF_CONTINUOUS,
+};
+
+static const uint32_t hp_6630b_devopts_cg[] = {
SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
SR_CONF_VOLTAGE | SR_CONF_GET,
SR_CONF_CURRENT | SR_CONF_GET,
SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+ SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+ SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
};
static const struct channel_spec hp_6633a_ch[] = {
- { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 2.0475, 0.0005, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY },
+ { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 2.0475, 0.0005, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 55, 0.25 }, NO_OCP_LIMITS },
+};
+
+static const struct channel_spec hp_6631b_ch[] = {
+ { "1", { 0, 8.19, 0.002, 3, 4 }, { 0, 10.237, 0.00263, 4, 5 }, { 0, 83.84103 }, FREQ_DC_ONLY, { 0, 12, 0.06 }, NO_OCP_LIMITS },
};
static const struct channel_spec hp_6632b_ch[] = {
- { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY },
+ { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS },
+};
+
+static const struct channel_spec hp_66332a_ch[] = {
+ { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS },
+};
+
+static const struct channel_spec hp_6633b_ch[] = {
+ { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 2.0475, 0.000526, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 55, 0.25 }, NO_OCP_LIMITS },
+};
+
+static const struct channel_spec hp_6634b_ch[] = {
+ { "1", { 0, 102.38, 0.025, 3, 4 }, { 0, 1.0238, 0.000263, 4, 5 }, { 0, 104.81664 }, FREQ_DC_ONLY, { 0, 110, 0.5 }, NO_OCP_LIMITS },
};
static const struct channel_group_spec hp_663xx_cg[] = {
ALL_ZERO
};
-static const struct scpi_command hp_6632b_cmd[] = {
+static const struct scpi_command hp_6630b_cmd[] = {
+ { SCPI_CMD_REMOTE, "SYST:REM" },
+ { SCPI_CMD_LOCAL, "SYST:LOC" },
{ SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
{ SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
{ SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
{ SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
{ SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
+ { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" },
+ { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT 1" },
+ { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT 0" },
+ { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" },
+ { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" },
ALL_ZERO
};
static const struct philips_pm2800_module_spec {
/* Min, max, programming resolution. */
- float voltage[5];
- float current[5];
- float power[5];
+ double voltage[5];
+ double current[5];
+ double power[5];
} philips_pm2800_module_specs[] = {
/* Autoranging modules. */
[PM2800_MOD_30V_10A] = { { 0, 30, 0.0075, 2, 4 }, { 0, 10, 0.0025, 2, 4 }, { 0, 60 } },
spec->current[0], spec->current[1],
spec->power[0], spec->power[1]);
(*channels)[i].name = (char *)philips_pm2800_names[i];
- memcpy(&((*channels)[i].voltage), spec, sizeof(float) * 15);
+ memcpy(&((*channels)[i].voltage), spec, sizeof(double) * 15);
(*channel_groups)[i].name = (char *)philips_pm2800_names[i];
(*channel_groups)[i].channel_index_mask = 1 << i;
(*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP;
};
static const struct channel_spec rs_hmc8043_ch[] = {
- { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY },
- { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY },
- { "3", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY },
+ { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
+ { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
+ { "3", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS },
};
static const struct channel_group_spec rs_hmc8043_cg[] = {
/* HP 6633A */
{ "HP", "6633A", 0,
ARRAY_AND_SIZE(hp_6630a_devopts),
- ARRAY_AND_SIZE(devopts_none),
+ ARRAY_AND_SIZE(hp_6630a_devopts_cg),
ARRAY_AND_SIZE(hp_6633a_ch),
ARRAY_AND_SIZE(hp_663xx_cg),
hp_6630a_cmd,
.probe_channels = NULL,
},
+ /* HP 6631B */
+ { "HP", "6631B", PPS_OVP | PPS_OCP | PPS_OTP,
+ ARRAY_AND_SIZE(hp_6630b_devopts),
+ ARRAY_AND_SIZE(hp_6630b_devopts_cg),
+ ARRAY_AND_SIZE(hp_6631b_ch),
+ ARRAY_AND_SIZE(hp_663xx_cg),
+ hp_6630b_cmd,
+ .probe_channels = NULL,
+ },
+
/* HP 6632B */
- { "HP", "6632B", 0,
- ARRAY_AND_SIZE(hp_6632b_devopts),
- ARRAY_AND_SIZE(devopts_none),
+ { "HP", "6632B", PPS_OVP | PPS_OCP | PPS_OTP,
+ ARRAY_AND_SIZE(hp_6630b_devopts),
+ ARRAY_AND_SIZE(hp_6630b_devopts_cg),
ARRAY_AND_SIZE(hp_6632b_ch),
ARRAY_AND_SIZE(hp_663xx_cg),
- hp_6632b_cmd,
+ hp_6630b_cmd,
+ .probe_channels = NULL,
+ },
+
+ /* HP 66332A */
+ { "HP", "66332A", PPS_OVP | PPS_OCP | PPS_OTP,
+ ARRAY_AND_SIZE(hp_6630b_devopts),
+ ARRAY_AND_SIZE(hp_6630b_devopts_cg),
+ ARRAY_AND_SIZE(hp_66332a_ch),
+ ARRAY_AND_SIZE(hp_663xx_cg),
+ hp_6630b_cmd,
+ .probe_channels = NULL,
+ },
+
+ /* HP 6633B */
+ { "HP", "6633B", PPS_OVP | PPS_OCP | PPS_OTP,
+ ARRAY_AND_SIZE(hp_6630b_devopts),
+ ARRAY_AND_SIZE(hp_6630b_devopts_cg),
+ ARRAY_AND_SIZE(hp_6633b_ch),
+ ARRAY_AND_SIZE(hp_663xx_cg),
+ hp_6630b_cmd,
+ .probe_channels = NULL,
+ },
+
+ /* HP 6634B */
+ { "HP", "6634B", PPS_OVP | PPS_OCP | PPS_OTP,
+ ARRAY_AND_SIZE(hp_6630b_devopts),
+ ARRAY_AND_SIZE(hp_6630b_devopts_cg),
+ ARRAY_AND_SIZE(hp_6634b_ch),
+ ARRAY_AND_SIZE(hp_663xx_cg),
+ hp_6630b_cmd,
+ .probe_channels = NULL,
+ },
+
+ /* Rigol DP700 series */
+ { "Rigol", "^DP711$", 0,
+ ARRAY_AND_SIZE(rigol_dp700_devopts),
+ ARRAY_AND_SIZE(rigol_dp700_devopts_cg),
+ ARRAY_AND_SIZE(rigol_dp711_ch),
+ ARRAY_AND_SIZE(rigol_dp700_cg),
+ rigol_dp700_cmd,
+ .probe_channels = NULL,
+ },
+ { "Rigol", "^DP712$", 0,
+ ARRAY_AND_SIZE(rigol_dp700_devopts),
+ ARRAY_AND_SIZE(rigol_dp700_devopts_cg),
+ ARRAY_AND_SIZE(rigol_dp712_ch),
+ ARRAY_AND_SIZE(rigol_dp700_cg),
+ rigol_dp700_cmd,
.probe_channels = NULL,
},
projects / libsigrok.git / blobdiff