]> sigrok.org Git - libsigrok.git/blobdiff - src/hardware/rigol-ds/protocol.c
rigol-ds: Fix reading data from internal memory
[libsigrok.git] / src / hardware / rigol-ds / protocol.c
index d9d8dc7ea1d79f51352d813146b58f9971840b95..02a484f32935d6cecf0a8a6e0e9807437a514224 100644 (file)
@@ -177,7 +177,7 @@ static int rigol_ds_trigger_wait(const struct sr_dev_inst *sdi)
        if (!(devc = sdi->priv))
                return SR_ERR;
 
-       /* 
+       /*
         * If timebase < 50 msecs/DIV just sleep about one sweep time except
         * for really fast sweeps.
         */
@@ -220,11 +220,19 @@ static int rigol_ds_check_stop(const struct sr_dev_inst *sdi)
        if (devc->model->series->protocol != PROTOCOL_V3)
                return SR_OK;
 
-       if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
-                         ch->index + 1) != SR_OK)
-               return SR_ERR;
+       if (ch->type == SR_CHANNEL_LOGIC) {
+               if (rigol_ds_config_set(sdi, ":WAV:SOUR LA") != SR_OK)
+                       return SR_ERR;
+       } else {
+               if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
+                               ch->index + 1) != SR_OK)
+                       return SR_ERR;
+       }
        /* Check that the number of samples will be accepted */
-       if (rigol_ds_config_set(sdi, ":WAV:POIN %d", devc->analog_frame_size) != SR_OK)
+       if (rigol_ds_config_set(sdi, ":WAV:POIN %d",
+                       ch->type == SR_CHANNEL_LOGIC ?
+                               devc->digital_frame_size :
+                               devc->analog_frame_size) != SR_OK)
                return SR_ERR;
        if (sr_scpi_get_int(sdi->conn, "*ESR?", &tmp) != SR_OK)
                return SR_ERR;
@@ -325,12 +333,17 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
        struct dev_context *devc;
        gchar *trig_mode;
        unsigned int num_channels, i, j;
+       int buffer_samples;
 
        if (!(devc = sdi->priv))
                return SR_ERR;
 
-       sr_dbg("Starting data capture for frameset %" PRIu64 " of %" PRIu64,
-              devc->num_frames + 1, devc->limit_frames);
+       if (devc->limit_frames == 0)
+               sr_dbg("Starting data capture for frameset %" PRIu64,
+                      devc->num_frames + 1);
+       else
+               sr_dbg("Starting data capture for frameset %" PRIu64 " of %"
+                      PRIu64, devc->num_frames + 1, devc->limit_frames);
 
        switch (devc->model->series->protocol) {
        case PROTOCOL_V1:
@@ -357,6 +370,7 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
                break;
        case PROTOCOL_V3:
        case PROTOCOL_V4:
+       case PROTOCOL_V5:
                if (rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK)
                        return SR_ERR;
                if (devc->data_source == DATA_SOURCE_LIVE) {
@@ -369,7 +383,7 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
                        if (devc->model->series->protocol == PROTOCOL_V3) {
                                if (rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK)
                                        return SR_ERR;
-                       } else if (devc->model->series->protocol == PROTOCOL_V4) {
+                       } else if (devc->model->series->protocol >= PROTOCOL_V4) {
                                num_channels = 0;
 
                                /* Channels 3 and 4 are multiplexed with D0-7 and D8-15 */
@@ -386,12 +400,29 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
                                        }
                                }
 
-                               devc->analog_frame_size = devc->digital_frame_size =
-                                       num_channels == 1 ?
-                                               devc->model->series->buffer_samples :
-                                                       num_channels == 2 ?
-                                                               devc->model->series->buffer_samples / 2 :
-                                                               devc->model->series->buffer_samples / 4;
+                               buffer_samples = devc->model->series->buffer_samples;
+                               if (buffer_samples == 0)
+                               {
+                                       /* The DS4000 series does not have a fixed memory depth, it
+                                        * can be chosen from the menu and also varies with number
+                                        * of active channels. Retrieve the actual number with the
+                                        * ACQ:MDEP command. */
+                                       sr_scpi_get_int(sdi->conn, "ACQ:MDEP?", &buffer_samples);
+                                       devc->analog_frame_size = devc->digital_frame_size =
+                                                       buffer_samples;
+                               }
+                               else
+                               {
+                                       /* The DS1000Z series has a fixed memory depth which we
+                                        * need to divide correctly according to the number of
+                                        * active channels. */
+                                       devc->analog_frame_size = devc->digital_frame_size =
+                                               num_channels == 1 ?
+                                                       buffer_samples :
+                                                               num_channels == 2 ?
+                                                                       buffer_samples / 2 :
+                                                                       buffer_samples / 4;
+                               }
                        }
 
                        if (rigol_ds_config_set(sdi, ":SING") != SR_OK)
@@ -431,9 +462,14 @@ SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
                rigol_ds_set_wait_event(devc, WAIT_NONE);
                break;
        case PROTOCOL_V3:
-               if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
-                                 ch->index + 1) != SR_OK)
-                       return SR_ERR;
+               if (ch->type == SR_CHANNEL_LOGIC) {
+                       if (rigol_ds_config_set(sdi, ":WAV:SOUR LA") != SR_OK)
+                               return SR_ERR;
+               } else {
+                       if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
+                                       ch->index + 1) != SR_OK)
+                               return SR_ERR;
+               }
                if (devc->data_source != DATA_SOURCE_LIVE) {
                        if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
                                return SR_ERR;
@@ -442,6 +478,7 @@ SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
                }
                break;
        case PROTOCOL_V4:
+       case PROTOCOL_V5:
                if (ch->type == SR_CHANNEL_ANALOG) {
                        if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
                                        ch->index + 1) != SR_OK)
@@ -456,15 +493,30 @@ SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
                                        devc->data_source == DATA_SOURCE_LIVE ?
                                                ":WAV:MODE NORM" :":WAV:MODE RAW") != SR_OK)
                        return SR_ERR;
+
+               if (devc->data_source != DATA_SOURCE_LIVE) {
+                       if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
+                               return SR_ERR;
+               }
                break;
        }
 
        if (devc->model->series->protocol >= PROTOCOL_V3 &&
                        ch->type == SR_CHANNEL_ANALOG) {
+               /* Vertical increment. */
+               if (sr_scpi_get_float(sdi->conn, ":WAV:YINC?",
+                               &devc->vert_inc[ch->index]) != SR_OK)
+                       return SR_ERR;
+               /* Vertical origin. */
+               if (sr_scpi_get_float(sdi->conn, ":WAV:YOR?",
+                       &devc->vert_origin[ch->index]) != SR_OK)
+                       return SR_ERR;
                /* Vertical reference. */
                if (sr_scpi_get_int(sdi->conn, ":WAV:YREF?",
                                &devc->vert_reference[ch->index]) != SR_OK)
                        return SR_ERR;
+       } else if (ch->type == SR_CHANNEL_ANALOG) {
+               devc->vert_inc[ch->index] = devc->vdiv[ch->index] / 25.6;
        }
 
        rigol_ds_set_wait_event(devc, WAIT_BLOCK);
@@ -544,7 +596,7 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
        struct sr_analog_meaning meaning;
        struct sr_analog_spec spec;
        struct sr_datafeed_logic logic;
-       double vdiv, offset;
+       double vdiv, offset, origin;
        int len, i, vref;
        struct sr_channel *ch;
        gsize expected_data_bytes;
@@ -595,18 +647,21 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 
        if (devc->num_block_bytes == 0) {
                if (devc->model->series->protocol >= PROTOCOL_V4) {
-                       if (sr_scpi_send(sdi->conn, ":WAV:START %d",
+                       if (rigol_ds_config_set(sdi, ":WAV:START %d",
                                        devc->num_channel_bytes + 1) != SR_OK)
                                return TRUE;
-                       if (sr_scpi_send(sdi->conn, ":WAV:STOP %d",
+                       if (rigol_ds_config_set(sdi, ":WAV:STOP %d",
                                        MIN(devc->num_channel_bytes + ACQ_BLOCK_SIZE,
                                                devc->analog_frame_size)) != SR_OK)
                                return TRUE;
                }
 
-               if (devc->model->series->protocol >= PROTOCOL_V3)
+               if (devc->model->series->protocol >= PROTOCOL_V3) {
+                       if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK)
+                               return TRUE;
                        if (sr_scpi_send(sdi->conn, ":WAV:DATA?") != SR_OK)
                                return TRUE;
+               }
 
                if (sr_scpi_read_begin(scpi) != SR_OK)
                        return TRUE;
@@ -618,10 +673,9 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
                                /* Still reading the header. */
                                return TRUE;
                        if (len == -1) {
-                               sr_err("Read error, aborting capture.");
-                               packet.type = SR_DF_FRAME_END;
-                               sr_session_send(sdi, &packet);
-                               sdi->driver->dev_acquisition_stop(sdi);
+                               sr_err("Error while reading block header, aborting capture.");
+                               std_session_send_df_frame_end(sdi);
+                               sr_dev_acquisition_stop(sdi);
                                return TRUE;
                        }
                        /* At slow timebases in live capture the DS2072
@@ -651,10 +705,9 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
        len = sr_scpi_read_data(scpi, (char *)devc->buffer, len);
 
        if (len == -1) {
-               sr_err("Read error, aborting capture.");
-               packet.type = SR_DF_FRAME_END;
-               sr_session_send(sdi, &packet);
-               sdi->driver->dev_acquisition_stop(sdi);
+               sr_err("Error while reading block data, aborting capture.");
+               std_session_send_df_frame_end(sdi);
+               sr_dev_acquisition_stop(sdi);
                return TRUE;
        }
 
@@ -664,15 +717,18 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 
        if (ch->type == SR_CHANNEL_ANALOG) {
                vref = devc->vert_reference[ch->index];
-               vdiv = devc->vdiv[ch->index] / 25.6;
+               vdiv = devc->vert_inc[ch->index];
+               origin = devc->vert_origin[ch->index];
                offset = devc->vert_offset[ch->index];
                if (devc->model->series->protocol >= PROTOCOL_V3)
                        for (i = 0; i < len; i++)
-                               devc->data[i] = ((int)devc->buffer[i] - vref) * vdiv - offset;
+                               devc->data[i] = ((int)devc->buffer[i] - vref - origin) * vdiv;
                else
                        for (i = 0; i < len; i++)
                                devc->data[i] = (128 - devc->buffer[i]) * vdiv - offset;
-               sr_analog_init(&analog, &encoding, &meaning, &spec, 0);
+               float vdivlog = log10f(vdiv);
+               int digits = -(int)vdivlog + (vdivlog < 0.0);
+               sr_analog_init(&analog, &encoding, &meaning, &spec, digits);
                analog.meaning->channels = g_slist_append(NULL, ch);
                analog.num_samples = len;
                analog.data = devc->data;
@@ -688,7 +744,7 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
                // TODO: For the MSO1000Z series, we need a way to express that
                // this data is in fact just for a single channel, with the valid
                // data for that channel in the LSB of each byte.
-               logic.unitsize = devc->model->series->protocol == PROTOCOL_V4 ? 1 : 2;
+               logic.unitsize = devc->model->series->protocol >= PROTOCOL_V4 ? 1 : 2;
                logic.data = devc->buffer;
                packet.type = SR_DF_LOGIC;
                packet.payload = &logic;
@@ -708,12 +764,8 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
                        if (devc->data_source != DATA_SOURCE_LIVE)
                                rigol_ds_set_wait_event(devc, WAIT_BLOCK);
                }
-               if (!sr_scpi_read_complete(scpi)) {
+               if (!sr_scpi_read_complete(scpi) && !devc->channel_entry->next) {
                        sr_err("Read should have been completed");
-                       packet.type = SR_DF_FRAME_END;
-                       sr_session_send(sdi, &packet);
-                       sdi->driver->dev_acquisition_stop(sdi);
-                       return TRUE;
                }
                devc->num_block_read = 0;
        } else {
@@ -745,12 +797,11 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
                rigol_ds_channel_start(sdi);
        } else {
                /* Done with this frame. */
-               packet.type = SR_DF_FRAME_END;
-               sr_session_send(sdi, &packet);
+               std_session_send_df_frame_end(sdi);
 
-               if (++devc->num_frames == devc->limit_frames) {
+               if (++devc->num_frames == devc->limit_frames || devc->data_source == DATA_SOURCE_MEMORY) {
                        /* Last frame, stop capture. */
-                       sdi->driver->dev_acquisition_stop(sdi);
+                       sr_dev_acquisition_stop(sdi);
                } else {
                        /* Get the next frame, starting with the first channel. */
                        devc->channel_entry = devc->enabled_channels;
@@ -758,8 +809,7 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
                        rigol_ds_capture_start(sdi);
 
                        /* Start of next frame. */
-                       packet.type = SR_DF_FRAME_BEGIN;
-                       sr_session_send(sdi, &packet);
+                       std_session_send_df_frame_begin(sdi);
                }
        }
 
@@ -769,6 +819,7 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
 {
        struct dev_context *devc;
+       struct sr_channel *ch;
        char *cmd;
        unsigned int i;
        int res;
@@ -782,6 +833,8 @@ SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
                g_free(cmd);
                if (res != SR_OK)
                        return SR_ERR;
+               ch = g_slist_nth_data(sdi->channels, i);
+               ch->enabled = devc->analog_channels[i];
        }
        sr_dbg("Current analog channel state:");
        for (i = 0; i < devc->model->analog_channels; i++)
@@ -790,20 +843,25 @@ SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
        /* Digital channel state. */
        if (devc->model->has_digital) {
                if (sr_scpi_get_bool(sdi->conn,
-                               devc->model->series->protocol >= PROTOCOL_V4 ?
+                               devc->model->series->protocol >= PROTOCOL_V3 ?
                                        ":LA:STAT?" : ":LA:DISP?",
                                &devc->la_enabled) != SR_OK)
                        return SR_ERR;
                sr_dbg("Logic analyzer %s, current digital channel state:",
                                devc->la_enabled ? "enabled" : "disabled");
                for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
-                       cmd = g_strdup_printf(
-                               devc->model->series->protocol >= PROTOCOL_V4 ?
-                                       ":LA:DIG%d:DISP?" : ":DIG%d:TURN?", i);
+                       if (devc->model->series->protocol >= PROTOCOL_V5)
+                               cmd = g_strdup_printf(":LA:DISP? D%d", i);
+                       else if (devc->model->series->protocol >= PROTOCOL_V3)
+                               cmd = g_strdup_printf(":LA:DIG%d:DISP?", i);
+                       else
+                               cmd = g_strdup_printf(":DIG%d:TURN?", i);
                        res = sr_scpi_get_bool(sdi->conn, cmd, &devc->digital_channels[i]);
                        g_free(cmd);
                        if (res != SR_OK)
                                return SR_ERR;
+                       ch = g_slist_nth_data(sdi->channels, i + devc->model->analog_channels);
+                       ch->enabled = devc->digital_channels[i];
                        sr_dbg("D%d: %s", i, devc->digital_channels[i] ? "on" : "off");
                }
        }
@@ -847,7 +905,8 @@ SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
        sr_dbg("Current trigger source %s", devc->trigger_source);
 
        /* Horizontal trigger position. */
-       if (sr_scpi_get_float(sdi->conn, ":TIM:OFFS?", &devc->horiz_triggerpos) != SR_OK)
+       if (sr_scpi_get_float(sdi->conn, devc->model->cmds[CMD_GET_HORIZ_TRIGGERPOS].str,
+                       &devc->horiz_triggerpos) != SR_OK)
                return SR_ERR;
        sr_dbg("Current horizontal trigger position %g", devc->horiz_triggerpos);