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rigol-ds: Get correct samplerate for Memory and Segmented sources
[libsigrok.git] / src / hardware / rigol-ds / api.c
diff --git a/src/hardware/rigol-ds/api.c b/src/hardware/rigol-ds/api.c
index b34aeee6fea8d834943168b87fa05a06eae87e5f..af15587db2e36fef02c2a6c1963e01ad56e81542 100644 (file)
--- a/src/hardware/rigol-ds/api.c
+++ b/src/hardware/rigol-ds/api.c
@@ -159,6 +159,16 @@ static const char *data_sources[] = {
        "Segmented",
 };
 
+static const struct rigol_ds_command std_cmd[] = {
+       { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:OFFS?" },
+       { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:OFFS %s" },
+};
+
+static const struct rigol_ds_command mso7000a_cmd[] = {
+       { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:POS?" },
+       { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:POS %s" },
+};
+
 enum vendor {
        RIGOL,
        AGILENT,
@@ -170,8 +180,11 @@ enum series {
        DS2000,
        DS2000A,
        DSO1000,
+       DSO1000B,
        DS1000Z,
        DS4000,
+       MSO5000,
+       MSO7000A,
 };
 
 /* short name, full name */
@@ -194,10 +207,16 @@ static const struct rigol_ds_series supported_series[] = {
                {1000, 1}, {500, 1000000}, 14, 1400, 14000},
        [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
                {50, 1}, {2, 1000}, 12, 600, 20480},
+       [DSO1000B] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
+               {50, 1}, {2, 1000}, 12, 600, 20480},
        [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
                {50, 1}, {1, 1000}, 12, 1200, 12000000},
        [DS4000] = {VENDOR(RIGOL), "DS4000", PROTOCOL_V4, FORMAT_IEEE488_2,
-               {1000, 1}, {1, 1000}, 14, 1400, 14000},
+               {1000, 1}, {1, 1000}, 14, 1400, 0},
+       [MSO5000] = {VENDOR(RIGOL), "MSO5000", PROTOCOL_V5, FORMAT_IEEE488_2,
+               {1000, 1}, {500, 1000000}, 10, 1000, 0},
+       [MSO7000A] = {VENDOR(AGILENT), "MSO7000A", PROTOCOL_V4, FORMAT_IEEE488_2,
+               {50, 1}, {2, 1000}, 10, 1000, 8000000},
 };
 
 #define SERIES(x) &supported_series[x]
@@ -210,52 +229,66 @@ static const struct rigol_ds_series supported_series[] = {
        digital ? ARRAY_SIZE(trigger_sources_##num##_chans) : (num + 2)
 /* series, model, min timebase, analog channels, digital */
 static const struct rigol_ds_model supported_models[] = {
-       {SERIES(VS5000), "VS5022", {20, 1000000000}, CH_INFO(2, false)},
-       {SERIES(VS5000), "VS5042", {10, 1000000000}, CH_INFO(2, false)},
-       {SERIES(VS5000), "VS5062", {5, 1000000000}, CH_INFO(2, false)},
-       {SERIES(VS5000), "VS5102", {2, 1000000000}, CH_INFO(2, false)},
-       {SERIES(VS5000), "VS5202", {2, 1000000000}, CH_INFO(2, false)},
-       {SERIES(VS5000), "VS5022D", {20, 1000000000}, CH_INFO(2, true)},
-       {SERIES(VS5000), "VS5042D", {10, 1000000000}, CH_INFO(2, true)},
-       {SERIES(VS5000), "VS5062D", {5, 1000000000}, CH_INFO(2, true)},
-       {SERIES(VS5000), "VS5102D", {2, 1000000000}, CH_INFO(2, true)},
-       {SERIES(VS5000), "VS5202D", {2, 1000000000}, CH_INFO(2, true)},
-       {SERIES(DS1000), "DS1052E", {5, 1000000000}, CH_INFO(2, false)},
-       {SERIES(DS1000), "DS1102E", {2, 1000000000}, CH_INFO(2, false)},
-       {SERIES(DS1000), "DS1152E", {2, 1000000000}, CH_INFO(2, false)},
-       {SERIES(DS1000), "DS1052D", {5, 1000000000}, CH_INFO(2, true)},
-       {SERIES(DS1000), "DS1102D", {2, 1000000000}, CH_INFO(2, true)},
-       {SERIES(DS1000), "DS1152D", {2, 1000000000}, CH_INFO(2, true)},
-       {SERIES(DS2000), "DS2072", {5, 1000000000}, CH_INFO(2, false)},
-       {SERIES(DS2000), "DS2102", {5, 1000000000}, CH_INFO(2, false)},
-       {SERIES(DS2000), "DS2202", {2, 1000000000}, CH_INFO(2, false)},
-       {SERIES(DS2000), "DS2302", {1, 1000000000}, CH_INFO(2, false)},
-       {SERIES(DS2000A), "DS2072A", {5, 1000000000}, CH_INFO(2, false)},
-       {SERIES(DS2000A), "DS2102A", {5, 1000000000}, CH_INFO(2, false)},
-       {SERIES(DS2000A), "DS2202A", {2, 1000000000}, CH_INFO(2, false)},
-       {SERIES(DS2000A), "DS2302A", {1, 1000000000}, CH_INFO(2, false)},
-       {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, CH_INFO(2, true)},
-       {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, CH_INFO(2, true)},
-       {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, CH_INFO(2, true)},
-       {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, CH_INFO(2, true)},
-       {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, CH_INFO(2, false)},
-       {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, CH_INFO(4, false)},
-       {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, CH_INFO(2, false)},
-       {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, CH_INFO(4, false)},
-       {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, CH_INFO(2, false)},
-       {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, CH_INFO(4, false)},
-       {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, CH_INFO(4, false)},
-       {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, CH_INFO(4, false)},
-       {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, CH_INFO(4, false)},
-       {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, CH_INFO(4, false)},
-       {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, CH_INFO(4, false)},
-       {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, CH_INFO(4, false)},
-       {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, CH_INFO(4, false)},
-       {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, CH_INFO(4, true)},
-       {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, CH_INFO(4, true)},
-       {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, CH_INFO(4, true)},
-       {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, CH_INFO(4, true)},
-       {SERIES(DS4000), "DS4024", {1, 1000000000}, CH_INFO(4, false)},
+       {SERIES(VS5000), "VS5022", {20, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(VS5000), "VS5042", {10, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(VS5000), "VS5062", {5, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(VS5000), "VS5102", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(VS5000), "VS5202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(VS5000), "VS5022D", {20, 1000000000}, CH_INFO(2, true), std_cmd},
+       {SERIES(VS5000), "VS5042D", {10, 1000000000}, CH_INFO(2, true), std_cmd},
+       {SERIES(VS5000), "VS5062D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
+       {SERIES(VS5000), "VS5102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
+       {SERIES(VS5000), "VS5202D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
+       {SERIES(DS1000), "DS1052E", {5, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DS1000), "DS1102E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DS1000), "DS1152E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DS1000), "DS1152E-EDU", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DS1000), "DS1052D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
+       {SERIES(DS1000), "DS1102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
+       {SERIES(DS1000), "DS1152D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
+       {SERIES(DS2000), "DS2072", {5, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DS2000), "DS2102", {5, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DS2000), "DS2202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DS2000), "DS2302", {1, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DS2000A), "DS2072A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DS2000A), "DS2102A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DS2000A), "DS2202A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DS2000A), "DS2302A", {1, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
+       {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
+       {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, CH_INFO(2, true), std_cmd},
+       {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, CH_INFO(2, true), std_cmd},
+       {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, CH_INFO(4, false), std_cmd},
+       {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
+       {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
+       {SERIES(DSO1000B), "DSO1052B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DSO1000B), "DSO1072B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DSO1000B), "DSO1102B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DSO1000B), "DSO1152B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
+       {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
+       {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
+       {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
+       {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
+       {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
+       {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
+       {SERIES(DS1000Z), "DS1202Z-E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+       {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
+       {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
+       {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
+       {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
+       {SERIES(DS4000), "DS4024", {1, 1000000000}, CH_INFO(4, false), std_cmd},
+       {SERIES(MSO5000), "MSO5072", {1, 1000000000}, CH_INFO(2, true), std_cmd},
+       {SERIES(MSO5000), "MSO5074", {1, 1000000000}, CH_INFO(4, true), std_cmd},
+       {SERIES(MSO5000), "MSO5102", {1, 1000000000}, CH_INFO(2, true), std_cmd},
+       {SERIES(MSO5000), "MSO5104", {1, 1000000000}, CH_INFO(4, true), std_cmd},
+       {SERIES(MSO5000), "MSO5204", {1, 1000000000}, CH_INFO(4, true), std_cmd},
+       {SERIES(MSO5000), "MSO5354", {1, 1000000000}, CH_INFO(4, true), std_cmd},
+       /* TODO: Digital channels are not yet supported on MSO7000A. */
+       {SERIES(MSO7000A), "MSO7034A", {2, 1000000000}, CH_INFO(4, false), mso7000a_cmd},
 };
 
 static struct sr_dev_driver rigol_ds_driver_info;
@@ -493,7 +526,6 @@ static int config_get(uint32_t key, GVariant **data,
        struct dev_context *devc;
        struct sr_channel *ch;
        const char *tmp_str;
-       uint64_t samplerate;
        int analog_channel = -1;
        float smallest_diff = INFINITY;
        int idx = -1;
@@ -537,14 +569,7 @@ static int config_get(uint32_t key, GVariant **data,
                        *data = g_variant_new_string("Segmented");
                break;
        case SR_CONF_SAMPLERATE:
-               if (devc->data_source == DATA_SOURCE_LIVE) {
-                       samplerate = analog_frame_size(sdi) /
-                               (devc->timebase * devc->model->series->num_horizontal_divs);
-                       *data = g_variant_new_uint64(samplerate);
-               } else {
-                       sr_dbg("Unknown data source: %d.", devc->data_source);
-                       return SR_ERR_NA;
-               }
+               *data = g_variant_new_uint64(devc->sample_rate);
                break;
        case SR_CONF_TRIGGER_SOURCE:
                if (!strcmp(devc->trigger_source, "ACL"))
@@ -670,7 +695,8 @@ static int config_set(uint32_t key, GVariant *data,
                 * need to express this in seconds. */
                t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
                g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
-               return rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
+               return rigol_ds_config_set(sdi,
+                       devc->model->cmds[CMD_SET_HORIZ_TRIGGERPOS].str, buffer);
        case SR_CONF_TRIGGER_LEVEL:
                t_dbl = g_variant_get_double(data);
                g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
@@ -845,9 +871,9 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
        struct sr_scpi_dev_inst *scpi;
        struct dev_context *devc;
        struct sr_channel *ch;
-       struct sr_datafeed_packet packet;
        gboolean some_digital;
        GSList *l;
+       char *cmd;
 
        scpi = sdi->conn;
        devc = sdi->priv;
@@ -890,9 +916,14 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
                        }
                        if (ch->enabled != devc->digital_channels[ch->index]) {
                                /* Enabled channel is currently disabled, or vice versa. */
-                               if (rigol_ds_config_set(sdi,
-                                               devc->model->series->protocol >= PROTOCOL_V3 ?
-                                                       ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
+                               if (devc->model->series->protocol >= PROTOCOL_V5)
+                                       cmd = ":LA:DISP D%d,%s";
+                               else if (devc->model->series->protocol >= PROTOCOL_V3)
+                                       cmd = ":LA:DIG%d:DISP %s";
+                               else
+                                       cmd = ":DIG%d:TURN %s";
+
+                               if (rigol_ds_config_set(sdi, cmd, ch->index,
                                                ch->enabled ? "ON" : "OFF") != SR_OK)
                                        return SR_ERR;
                                devc->digital_channels[ch->index] = ch->enabled;
@@ -951,12 +982,25 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 
        devc->channel_entry = devc->enabled_channels;
 
+       if (devc->data_source == DATA_SOURCE_LIVE)
+               devc->sample_rate = analog_frame_size(sdi) / 
+                       (devc->timebase * devc->model->series->num_horizontal_divs);
+       else {
+               float xinc;
+               if (devc->model->series->protocol >= PROTOCOL_V3 && 
+                               sr_scpi_get_float(sdi->conn, "WAV:XINC?", &xinc) != SR_OK) {
+                       sr_err("Couldn't get sampling rate");
+                       return SR_ERR;
+               }
+               devc->sample_rate = 1. / xinc;
+       }
+
+
        if (rigol_ds_capture_start(sdi) != SR_OK)
                return SR_ERR;
 
        /* Start of first frame. */
-       packet.type = SR_DF_FRAME_BEGIN;
-       sr_session_send(sdi, &packet);
+       std_session_send_df_frame_begin(sdi);
 
        return SR_OK;
 }
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