rigol-ds: Add missing 20/50/100V vdiv entries.

[libsigrok.git] / src / hardware / rigol-ds / api.c

diff --git a/src/hardware/rigol-ds/api.c b/src/hardware/rigol-ds/api.c
index d748e6d490c0c8007a2d48d56630169cc4ef0a8f..3ce237d7b857c0c1c4cf9f4e0dd914d2bb13188d 100644 (file)
--- a/src/hardware/rigol-ds/api.c
+++ b/src/hardware/rigol-ds/api.c
@@ -113,6 +113,9 @@ static const uint64_t vdivs[][2] = {
        { 2, 1 },
        { 5, 1 },
        { 10, 1 },
+       { 20, 1 },
+       { 50, 1 },
+       { 100, 1 },
 };
 
 #define NUM_TIMEBASE  ARRAY_SIZE(timebases)