SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
- SR_CONF_EXTERNAL_CLOCK | SR_CONF_SET,
+ SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
+ SR_CONF_CLOCK_EDGE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
SR_CONF_SWAP | SR_CONF_SET,
SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
SR_TRIGGER_ONE,
};
+static const char* external_clock_edges[] = {
+ "rising", // positive edge
+ "falling" // negative edge
+};
+
#define STR_PATTERN_NONE "None"
#define STR_PATTERN_EXTERNAL "External"
#define STR_PATTERN_INTERNAL "Internal"
SR_HZ(1),
};
-#define RESPONSE_DELAY_US (10 * 1000)
+#define RESPONSE_DELAY_US (20 * 1000)
static GSList *scan(struct sr_dev_driver *di, GSList *options)
{
struct sr_dev_inst *sdi;
struct sr_serial_dev_inst *serial;
GSList *l;
- int ret;
+ int num_read;
unsigned int i;
const char *conn, *serialcomm;
- char buf[8];
+ char buf[4] = { 0, 0, 0, 0 };
conn = serialcomm = NULL;
for (l = options; l; l = l->next) {
g_usleep(RESPONSE_DELAY_US);
- if (sp_input_waiting(serial->data) == 0) {
- sr_dbg("Didn't get any reply.");
+ if (serial_has_receive_data(serial) == 0) {
+ sr_dbg("Didn't get any ID reply.");
return NULL;
}
- ret = serial_read_blocking(serial, buf, 4, serial_timeout(serial, 4));
- if (ret != 4) {
- sr_err("Invalid reply (expected 4 bytes, got %d).", ret);
+ num_read = serial_read_blocking(serial, buf, 4, serial_timeout(serial, 4));
+ if (num_read < 0) {
+ sr_err("Getting ID reply failed (%d).", num_read);
return NULL;
}
if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4)) {
- sr_err("Invalid reply (expected '1SLO' or '1ALS', got "
- "'%c%c%c%c').", buf[0], buf[1], buf[2], buf[3]);
+ GString *id = sr_hexdump_new((uint8_t *)buf, num_read);
+
+ sr_err("Invalid ID reply (got %s).", id->str);
+
+ sr_hexdump_free(id);
return NULL;
}
g_usleep(RESPONSE_DELAY_US);
- if (sp_input_waiting(serial->data) != 0) {
+ if (serial_has_receive_data(serial) != 0) {
/* Got metadata. */
sdi = get_metadata(serial);
} else {
*data = g_variant_new_uint64(devc->limit_samples);
break;
case SR_CONF_PATTERN_MODE:
- if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
+ if (devc->capture_flags & CAPTURE_FLAG_EXTERNAL_TEST_MODE)
*data = g_variant_new_string(STR_PATTERN_EXTERNAL);
- else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
+ else if (devc->capture_flags & CAPTURE_FLAG_INTERNAL_TEST_MODE)
*data = g_variant_new_string(STR_PATTERN_INTERNAL);
else
*data = g_variant_new_string(STR_PATTERN_NONE);
break;
case SR_CONF_RLE:
- *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
+ *data = g_variant_new_boolean(devc->capture_flags & CAPTURE_FLAG_RLE ? TRUE : FALSE);
+ break;
+ case SR_CONF_EXTERNAL_CLOCK:
+ *data = g_variant_new_boolean(
+ devc->capture_flags & CAPTURE_FLAG_CLOCK_EXTERNAL ? TRUE : FALSE);
+ break;
+ case SR_CONF_CLOCK_EDGE:
+ *data = g_variant_new_string(external_clock_edges[
+ devc->capture_flags & CAPTURE_FLAG_INVERT_EXT_CLOCK ? 1 : 0]);
break;
default:
return SR_ERR_NA;
case SR_CONF_EXTERNAL_CLOCK:
if (g_variant_get_boolean(data)) {
sr_info("Enabling external clock.");
- devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
+ devc->capture_flags |= CAPTURE_FLAG_CLOCK_EXTERNAL;
} else {
sr_info("Disabled external clock.");
- devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
+ devc->capture_flags &= ~CAPTURE_FLAG_CLOCK_EXTERNAL;
+ }
+ break;
+ case SR_CONF_CLOCK_EDGE:
+ stropt = g_variant_get_string(data, NULL);
+ if (!strcmp(stropt, external_clock_edges[1])) {
+ sr_info("Triggering on falling edge of external clock.");
+ devc->capture_flags |= CAPTURE_FLAG_INVERT_EXT_CLOCK;
+ } else {
+ sr_info("Triggering on rising edge of external clock.");
+ devc->capture_flags &= ~CAPTURE_FLAG_INVERT_EXT_CLOCK;
}
break;
case SR_CONF_PATTERN_MODE:
stropt = g_variant_get_string(data, NULL);
- flag = 0xffff;
if (!strcmp(stropt, STR_PATTERN_NONE)) {
sr_info("Disabling test modes.");
flag = 0x0000;
} else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
sr_info("Enabling internal test mode.");
- flag = FLAG_INTERNAL_TEST_MODE;
+ flag = CAPTURE_FLAG_INTERNAL_TEST_MODE;
} else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
sr_info("Enabling external test mode.");
- flag = FLAG_EXTERNAL_TEST_MODE;
+ flag = CAPTURE_FLAG_EXTERNAL_TEST_MODE;
} else {
return SR_ERR;
}
- if (flag != 0xffff) {
- devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
- devc->flag_reg |= flag;
- }
+ devc->capture_flags &= ~CAPTURE_FLAG_INTERNAL_TEST_MODE;
+ devc->capture_flags &= ~CAPTURE_FLAG_EXTERNAL_TEST_MODE;
+ devc->capture_flags |= flag;
break;
case SR_CONF_SWAP:
if (g_variant_get_boolean(data)) {
sr_info("Enabling channel swapping.");
- devc->flag_reg |= FLAG_SWAP_CHANNELS;
+ devc->capture_flags |= CAPTURE_FLAG_SWAP_CHANNELS;
} else {
sr_info("Disabling channel swapping.");
- devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
+ devc->capture_flags &= ~CAPTURE_FLAG_SWAP_CHANNELS;
}
break;
case SR_CONF_RLE:
if (g_variant_get_boolean(data)) {
sr_info("Enabling RLE.");
- devc->flag_reg |= FLAG_RLE;
+ devc->capture_flags |= CAPTURE_FLAG_RLE;
} else {
sr_info("Disabling RLE.");
- devc->flag_reg &= ~FLAG_RLE;
+ devc->capture_flags &= ~CAPTURE_FLAG_RLE;
}
break;
default:
case SR_CONF_TRIGGER_MATCH:
*data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
break;
+ case SR_CONF_CLOCK_EDGE:
+ *data = std_gvar_array_str(ARRAY_AND_SIZE(external_clock_edges));
+ break;
case SR_CONF_PATTERN_MODE:
*data = g_variant_new_strv(ARRAY_AND_SIZE(patterns));
break;
if (!sdi)
return SR_ERR_ARG;
devc = sdi->priv;
- if (devc->flag_reg & FLAG_RLE)
+ if (devc->capture_flags & CAPTURE_FLAG_RLE)
return SR_ERR_NA;
if (devc->max_samples == 0)
/* Device didn't specify sample memory size in metadata. */
* Channel groups are turned off if no channels in that group are
* enabled, making more room for samples for the enabled group.
*/
- ols_channel_mask(sdi);
+ uint32_t channel_mask = ols_channel_mask(sdi);
num_ols_changrp = 0;
for (i = 0; i < 4; i++) {
- if (devc->channel_mask & (0xff << (i * 8)))
+ if (channel_mask & (0xff << (i * 8)))
num_ols_changrp++;
}
return SR_OK;
}
-static int set_trigger(const struct sr_dev_inst *sdi, int stage)
-{
- struct dev_context *devc;
- struct sr_serial_dev_inst *serial;
- uint8_t cmd, arg[4];
-
- devc = sdi->priv;
- serial = sdi->conn;
-
- cmd = CMD_SET_TRIGGER_MASK + stage * 4;
- arg[0] = devc->trigger_mask[stage] & 0xff;
- arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
- arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
- arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
- if (send_longcommand(serial, cmd, arg) != SR_OK)
- return SR_ERR;
-
- cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
- arg[0] = devc->trigger_value[stage] & 0xff;
- arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
- arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
- arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
- if (send_longcommand(serial, cmd, arg) != SR_OK)
- return SR_ERR;
-
- cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
- arg[0] = arg[1] = arg[3] = 0x00;
- arg[2] = stage;
- if (stage == devc->num_stages)
- /* Last stage, fire when this one matches. */
- arg[3] |= TRIGGER_START;
- if (send_longcommand(serial, cmd, arg) != SR_OK)
- return SR_ERR;
-
- return SR_OK;
-}
-
static int dev_acquisition_start(const struct sr_dev_inst *sdi)
{
+ int ret;
struct dev_context *devc;
struct sr_serial_dev_inst *serial;
- uint16_t samplecount, readcount, delaycount;
- uint8_t ols_changrp_mask, arg[4];
- int num_ols_changrp;
- int ret, i;
devc = sdi->priv;
serial = sdi->conn;
- ols_channel_mask(sdi);
-
- num_ols_changrp = 0;
- ols_changrp_mask = 0;
- for (i = 0; i < 4; i++) {
- if (devc->channel_mask & (0xff << (i * 8))) {
- ols_changrp_mask |= (1 << i);
- num_ols_changrp++;
- }
- }
-
- /*
- * Limit readcount to prevent reading past the end of the hardware
- * buffer.
- */
- samplecount = MIN(devc->max_samples / num_ols_changrp, devc->limit_samples);
- readcount = samplecount / 4;
-
- /* Rather read too many samples than too few. */
- if (samplecount % 4 != 0)
- readcount++;
-
- /* Basic triggers. */
- if (ols_convert_trigger(sdi) != SR_OK) {
- sr_err("Failed to configure channels.");
- return SR_ERR;
- }
- if (devc->num_stages > 0) {
- /*
- * According to http://mygizmos.org/ols/Logic-Sniffer-FPGA-Spec.pdf
- * reset command must be send prior each arm command
- */
- sr_dbg("Send reset command before trigger configure");
- if (ols_send_reset(serial) != SR_OK)
- return SR_ERR;
-
- delaycount = readcount * (1 - devc->capture_ratio / 100.0);
- devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
- for (i = 0; i <= devc->num_stages; i++) {
- sr_dbg("Setting OLS stage %d trigger.", i);
- if ((ret = set_trigger(sdi, i)) != SR_OK)
- return ret;
- }
- } else {
- /* No triggers configured, force trigger on first stage. */
- sr_dbg("Forcing trigger at stage 0.");
- if ((ret = set_trigger(sdi, 0)) != SR_OK)
- return ret;
- delaycount = readcount;
- }
-
- /* Samplerate. */
- sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
- devc->cur_samplerate, devc->cur_samplerate_divider);
- arg[0] = devc->cur_samplerate_divider & 0xff;
- arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
- arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
- arg[3] = 0x00;
- if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK)
- return SR_ERR;
-
- /* Send sample limit and pre/post-trigger capture ratio. */
- sr_dbg("Setting sample limit %d, trigger point at %d",
- (readcount - 1) * 4, (delaycount - 1) * 4);
- arg[0] = ((readcount - 1) & 0xff);
- arg[1] = ((readcount - 1) & 0xff00) >> 8;
- arg[2] = ((delaycount - 1) & 0xff);
- arg[3] = ((delaycount - 1) & 0xff00) >> 8;
- if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
- return SR_ERR;
-
- /* Flag register. */
- sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
- devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
- devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
- devc->flag_reg & FLAG_RLE ? "on" : "off",
- devc->flag_reg & FLAG_FILTER ? "on": "off",
- devc->flag_reg & FLAG_DEMUX ? "on" : "off");
- /*
- * Enable/disable OLS channel groups in the flag register according
- * to the channel mask. 1 means "disable channel".
- */
- devc->flag_reg |= ~(ols_changrp_mask << 2) & 0x3c;
- arg[0] = devc->flag_reg & 0xff;
- arg[1] = devc->flag_reg >> 8;
- arg[2] = arg[3] = 0x00;
- if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK)
- return SR_ERR;
+ ret = ols_prepare_acquisition(sdi);
+ if (ret != SR_OK)
+ return ret;
/* Start acquisition on the device. */
- if (send_shortcommand(serial, CMD_RUN) != SR_OK)
+ if (send_shortcommand(serial, CMD_ARM_BASIC_TRIGGER) != SR_OK)
return SR_ERR;
/* Reset all operational states. */
static struct sr_dev_driver ols_driver_info = {
.name = "ols",
- .longname = "Openbench Logic Sniffer",
+ .longname = "Openbench Logic Sniffer & SUMP compatibles",
.api_version = 1,
.init = std_init,
.cleanup = std_cleanup,
projects / libsigrok.git / blobdiff