struct sr_config *src;
struct sr_dev_inst *sdi;
struct sr_serial_dev_inst *serial;
- GSList *l, *devices;
+ GSList *l;
int ret;
unsigned int i;
const char *conn, *serialcomm;
char buf[8];
- devices = NULL;
-
conn = serialcomm = NULL;
for (l = options; l; l = l->next) {
src = l->data;
if (serial_open(serial, SERIAL_RDWR) != SR_OK)
return NULL;
- ret = SR_OK;
- for (i = 0; i < 5; i++) {
- if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
- sr_err("Port %s is not writable.", conn);
- break;
- }
- }
- if (ret != SR_OK) {
+ if (ols_send_reset(serial) != SR_OK) {
serial_close(serial);
sr_err("Could not use port %s. Quitting.", conn);
return NULL;
sdi->inst_type = SR_INST_SERIAL;
sdi->conn = serial;
- devices = g_slist_append(devices, sdi);
-
serial_close(serial);
- return std_scan_complete(di, devices);
+ return std_scan_complete(di, g_slist_append(NULL, sdi));
}
static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
return SR_ERR;
}
if (devc->num_stages > 0) {
+ /*
+ * According to http://mygizmos.org/ols/Logic-Sniffer-FPGA-Spec.pdf
+ * reset command must be send prior each arm command
+ */
+ sr_dbg("Send reset command before trigger configure");
+ if (ols_send_reset(serial) != SR_OK)
+ return SR_ERR;
+
delaycount = readcount * (1 - devc->capture_ratio / 100.0);
devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
for (i = 0; i <= devc->num_stages; i++) {
devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
memset(devc->sample, 0, 4);
- std_session_send_df_header(sdi, LOG_PREFIX);
+ std_session_send_df_header(sdi);
/* If the device stops sending for longer than it takes to send a byte,
* that means it's finished. But wait at least 100 ms to be safe.