- if (which < 1 || which > ARRAY_SIZE(ctrl_reg_tab)) {
- sr_err("Invalid PWM channel: %d.", which);
- return SR_ERR;
- }
- if (freq < 0 || freq > MAX_PWM_FREQ) {
- sr_err("Too high a PWM frequency: %.1f.", freq);
- return SR_ERR;
- }
- if (duty < 0 || duty > 100) {
- sr_err("Invalid PWM duty cycle: %f.", duty);
- return SR_ERR;
+ /*
+ * Map application's specs to hardware register values. Do math
+ * in floating point initially, but convert to u32 eventually.
+ */
+ sr_dbg("PWM config, app spec, ch %zu, en %d, freq %.1f, duty %.1f.",
+ idx, params->enabled ? 1 : 0, params->freq, params->duty);
+ val_f = PWM_CLOCK;
+ val_f /= params->freq;
+ val_u = val_f;
+ period = val_u;
+ val_f = period;
+ val_f *= params->duty;
+ val_f /= 100.0;
+ val_f += 0.5;
+ val_u = val_f;
+ duty = val_u;
+ sr_dbg("PWM config, reg 0x%04x, freq %u, duty %u.",
+ (unsigned)reg_base, (unsigned)period, (unsigned)duty);
+
+ /* Get the "enabled" state of all supported PWM channels. */
+ enable_all = 0;
+ for (ch = 0; ch < ARRAY_SIZE(devc->pwm_setting); ch++) {
+ if (!devc->pwm_setting[ch].enabled)
+ continue;
+ enable_all |= 1U << ch;