*/
#include <config.h>
-#include <stdint.h>
-#include <string.h>
+
+#include <errno.h>
#include <glib.h>
#include <glib/gstdio.h>
-#include <stdio.h>
-#include <errno.h>
-#include <math.h>
#include <inttypes.h>
#include <libsigrok/libsigrok.h>
+#include <math.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+
#include "libsigrok-internal.h"
#include "protocol.h"
#define PWM_CLOCK SR_MHZ(200) /* this is 200MHz for both the LA2016 and LA1016 */
/* usb vendor class control requests to the cypress FX2 microcontroller */
-#define CMD_EEPROM 0xa2 /* ctrl_in reads, ctrl_out writes */
-#define CMD_FPGA_INIT 0x50 /* used before and after FPGA bitstream loading */
-#define CMD_FPGA_SPI 0x20 /* access registers in the FPGA over SPI bus, ctrl_in reads, ctrl_out writes */
-#define CMD_FPGA_ENABLE 0x10
-#define CMD_BULK_RESET 0x38 /* flush FX2 usb endpoint 6 IN fifos */
-#define CMD_BULK_START 0x30 /* begin transfer of capture data via usb endpoint 6 IN */
-#define CMD_KAUTH 0x60 /* communicate with authentication ic U10, not used */
+#define CMD_FPGA_ENABLE 0x10
+#define CMD_FPGA_SPI 0x20 /* access registers in the FPGA over SPI bus, ctrl_in reads, ctrl_out writes */
+#define CMD_BULK_START 0x30 /* begin transfer of capture data via usb endpoint 6 IN */
+#define CMD_BULK_RESET 0x38 /* flush FX2 usb endpoint 6 IN fifos */
+#define CMD_FPGA_INIT 0x50 /* used before and after FPGA bitstream loading */
+#define CMD_KAUTH 0x60 /* communicate with authentication ic U10, not used */
+#define CMD_EEPROM 0xa2 /* ctrl_in reads, ctrl_out writes */
/*
* fpga spi register addresses for control request CMD_FPGA_SPI:
* as appropriate. In this driver code just use IN transactions
* to read, OUT to write.
*/
-#define REG_RUN 0x00 /* read capture status, write capture start */
-#define REG_PWM_EN 0x02 /* user pwm channels on/off */
-#define REG_CAPT_MODE 0x03 /* set to 0x00 for capture to sdram, 0x01 bypass sdram for streaming */
-#define REG_BULK 0x08 /* write start address and number of bytes for capture data bulk upload */
-#define REG_SAMPLING 0x10 /* write capture config, read capture data location in sdram */
-#define REG_TRIGGER 0x20 /* write level and edge trigger config */
-#define REG_THRESHOLD 0x68 /* write two pwm configs to control input threshold dac */
-#define REG_PWM1 0x70 /* write config for user pwm1 */
-#define REG_PWM2 0x78 /* write config for user pwm2 */
+#define REG_RUN 0x00 /* read capture status, write capture start */
+#define REG_PWM_EN 0x02 /* user pwm channels on/off */
+#define REG_CAPT_MODE 0x03 /* set to 0x00 for capture to sdram, 0x01 bypass sdram for streaming */
+#define REG_BULK 0x08 /* write start address and number of bytes for capture data bulk upload */
+#define REG_SAMPLING 0x10 /* write capture config, read capture data location in sdram */
+#define REG_TRIGGER 0x20 /* write level and edge trigger config */
+#define REG_THRESHOLD 0x68 /* write two pwm configs to control input threshold dac */
+#define REG_PWM1 0x70 /* write config for user pwm1 */
+#define REG_PWM2 0x78 /* write config for user pwm2 */
static int ctrl_in(const struct sr_dev_inst *sdi,
uint8_t bRequest, uint16_t wValue, uint16_t wIndex,
write_u32le_inc(&wrptr, devc->limit_samples);
write_u8_inc(&wrptr, 0);
write_u32le_inc(&wrptr, devc->pre_trigger_size);
- write_u32le_inc(&wrptr, ((total * devc->capture_ratio) / 100) & 0xFFFFFF00 );
+ write_u32le_inc(&wrptr, ((total * devc->capture_ratio) / 100) & 0xFFFFFF00);
write_u16le_inc(&wrptr, divisor);
write_u8_inc(&wrptr, 0);
static uint16_t run_state(const struct sr_dev_inst *sdi)
{
uint16_t state;
- static uint16_t previous_state=0;
+ static uint16_t previous_state = 0;
int ret;
if ((ret = ctrl_in(sdi, CMD_FPGA_SPI, REG_RUN, 0, &state, sizeof(state))) != SR_OK) {
* just print a log message if status has changed.
*/
- if(state != previous_state) {
+ if (state != previous_state) {
previous_state = state;
- if((state & 0x0003)==1) {
+ if ((state & 0x0003) == 0x01) {
sr_dbg("run_state: 0x%04x (%s)", state, "idle");
}
- else if((state & 0x000f)==2) {
+ else if ((state & 0x000f) == 0x02) {
sr_dbg("run_state: 0x%04x (%s)", state, "pre-trigger sampling");
}
- else if((state & 0x000f)==0x0a) {
+ else if ((state & 0x000f) == 0x0a) {
sr_dbg("run_state: 0x%04x (%s)", state, "sampling, waiting for trigger");
}
- else if((state & 0x000f)==0x0e) {
+ else if ((state & 0x000f) == 0x0e) {
sr_dbg("run_state: 0x%04x (%s)", state, "post-trigger sampling");
}
else {
SR_PRIV int la2016_start_acquisition(const struct sr_dev_inst *sdi)
{
- return set_run_mode(sdi, 3);
+ int ret;
+
+ ret = set_run_mode(sdi, 3);
+ if (ret != SR_OK)
+ return ret;
+
+ return SR_OK;
}
-SR_PRIV int la2016_stop_acquisition(const struct sr_dev_inst *sdi)
+static int la2016_stop_acquisition(const struct sr_dev_inst *sdi)
{
- return set_run_mode(sdi, 0);
+ int ret;
+
+ ret = set_run_mode(sdi, 0);
+ if (ret != SR_OK)
+ return ret;
+
+ return SR_OK;
}
SR_PRIV int la2016_abort_acquisition(const struct sr_dev_inst *sdi)
{
- return la2016_stop_acquisition(sdi);
+ int ret;
+ struct dev_context *devc;
+
+ ret = la2016_stop_acquisition(sdi);
+ if (ret != SR_OK)
+ return ret;
+
+ devc = sdi ? sdi->priv : NULL;
+ if (devc && devc->transfer)
+ libusb_cancel_transfer(devc->transfer);
+
+ return SR_OK;
}
-SR_PRIV int la2016_has_triggered(const struct sr_dev_inst *sdi)
+static int la2016_has_triggered(const struct sr_dev_inst *sdi)
{
uint16_t state;
return (state & 0x3) == 1;
}
-SR_PRIV int la2016_start_retrieval(const struct sr_dev_inst *sdi, libusb_transfer_cb_fn cb)
+static int la2016_start_retrieval(const struct sr_dev_inst *sdi, libusb_transfer_cb_fn cb)
{
struct dev_context *devc;
struct sr_usb_dev_inst *usb;
}
to_read = devc->n_bytes_to_read;
- if (to_read > LA2016_BULK_MAX)
- to_read = LA2016_BULK_MAX;
-
+ /* choose a buffer size for all of the usb transfers */
+ if (to_read >= LA2016_USB_BUFSZ)
+ to_read = LA2016_USB_BUFSZ; /* multiple transfers */
+ else /* one transfer, make buffer size some multiple of LA2016_EP6_PKTSZ */
+ to_read = (to_read + (LA2016_EP6_PKTSZ-1)) & ~(LA2016_EP6_PKTSZ-1);
buffer = g_try_malloc(to_read);
if (!buffer) {
sr_err("Failed to allocate %d bytes for bulk transfer", to_read);
return SR_OK;
}
+static void send_chunk(struct sr_dev_inst *sdi,
+ const uint8_t *packets, unsigned int num_tfers)
+{
+ struct dev_context *devc;
+ struct sr_datafeed_logic logic;
+ struct sr_datafeed_packet sr_packet;
+ unsigned int max_samples, n_samples, total_samples, free_n_samples;
+ unsigned int i, j, k;
+ int do_signal_trigger;
+ uint16_t *wp;
+ const uint8_t *rp;
+ uint16_t state;
+ uint8_t repetitions;
+
+ devc = sdi->priv;
+
+ logic.unitsize = 2;
+ logic.data = devc->convbuffer;
+
+ sr_packet.type = SR_DF_LOGIC;
+ sr_packet.payload = &logic;
+
+ max_samples = devc->convbuffer_size / 2;
+ n_samples = 0;
+ wp = (uint16_t *)devc->convbuffer;
+ total_samples = 0;
+ do_signal_trigger = 0;
+
+ if (devc->had_triggers_configured && devc->reading_behind_trigger == 0 && devc->info.n_rep_packets_before_trigger == 0) {
+ std_session_send_df_trigger(sdi);
+ devc->reading_behind_trigger = 1;
+ }
+
+ rp = packets;
+ for (i = 0; i < num_tfers; i++) {
+ for (k = 0; k < NUM_PACKETS_IN_CHUNK; k++) {
+ free_n_samples = max_samples - n_samples;
+ if (free_n_samples < 256 || do_signal_trigger) {
+ logic.length = n_samples * 2;
+ sr_session_send(sdi, &sr_packet);
+ n_samples = 0;
+ wp = (uint16_t *)devc->convbuffer;
+ if (do_signal_trigger) {
+ std_session_send_df_trigger(sdi);
+ do_signal_trigger = 0;
+ }
+ }
+
+ state = read_u16le_inc(&rp);
+ repetitions = read_u8_inc(&rp);
+ for (j = 0; j < repetitions; j++)
+ *wp++ = state;
+
+ n_samples += repetitions;
+ total_samples += repetitions;
+ devc->total_samples += repetitions;
+ if (!devc->reading_behind_trigger) {
+ devc->n_reps_until_trigger--;
+ if (devc->n_reps_until_trigger == 0) {
+ devc->reading_behind_trigger = 1;
+ do_signal_trigger = 1;
+ sr_dbg(" here is trigger position after %" PRIu64 " samples, %.6fms",
+ devc->total_samples,
+ (double)devc->total_samples / devc->cur_samplerate * 1e3);
+ }
+ }
+ }
+ (void)read_u8_inc(&rp); /* Skip sequence number. */
+ }
+ if (n_samples) {
+ logic.length = n_samples * 2;
+ sr_session_send(sdi, &sr_packet);
+ if (do_signal_trigger) {
+ std_session_send_df_trigger(sdi);
+ }
+ }
+ sr_dbg("send_chunk done after %d samples", total_samples);
+}
+
+static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
+{
+ struct sr_dev_inst *sdi;
+ struct dev_context *devc;
+ struct sr_usb_dev_inst *usb;
+ int ret;
+
+ sdi = transfer->user_data;
+ devc = sdi->priv;
+ usb = sdi->conn;
+
+ sr_dbg("receive_transfer(): status %s received %d bytes.",
+ libusb_error_name(transfer->status), transfer->actual_length);
+
+ if (transfer->status == LIBUSB_TRANSFER_TIMED_OUT) {
+ sr_err("bulk transfer timeout!");
+ devc->transfer_finished = 1;
+ }
+ send_chunk(sdi, transfer->buffer, transfer->actual_length / TRANSFER_PACKET_LENGTH);
+
+ devc->n_bytes_to_read -= transfer->actual_length;
+ if (devc->n_bytes_to_read) {
+ uint32_t to_read = devc->n_bytes_to_read;
+ /* determine read size for the next usb transfer */
+ if (to_read >= LA2016_USB_BUFSZ)
+ to_read = LA2016_USB_BUFSZ;
+ else /* last transfer, make read size some multiple of LA2016_EP6_PKTSZ */
+ to_read = (to_read + (LA2016_EP6_PKTSZ-1)) & ~(LA2016_EP6_PKTSZ-1);
+ libusb_fill_bulk_transfer(
+ transfer, usb->devhdl,
+ 0x86, transfer->buffer, to_read,
+ receive_transfer, (void *)sdi, DEFAULT_TIMEOUT_MS);
+
+ if ((ret = libusb_submit_transfer(transfer)) == 0)
+ return;
+ sr_err("Failed to submit further transfer: %s.", libusb_error_name(ret));
+ }
+
+ g_free(transfer->buffer);
+ libusb_free_transfer(transfer);
+ devc->transfer_finished = 1;
+}
+
+SR_PRIV int la2016_receive_data(int fd, int revents, void *cb_data)
+{
+ const struct sr_dev_inst *sdi;
+ struct dev_context *devc;
+ struct drv_context *drvc;
+ struct timeval tv;
+
+ (void)fd;
+ (void)revents;
+
+ sdi = cb_data;
+ devc = sdi->priv;
+ drvc = sdi->driver->context;
+
+ if (devc->have_trigger == 0) {
+ if (la2016_has_triggered(sdi) == 0) {
+ /* not yet ready for download */
+ return TRUE;
+ }
+ devc->have_trigger = 1;
+ devc->transfer_finished = 0;
+ devc->reading_behind_trigger = 0;
+ devc->total_samples = 0;
+ /* we can start retrieving data! */
+ if (la2016_start_retrieval(sdi, receive_transfer) != SR_OK) {
+ sr_err("failed to start retrieval!");
+ return FALSE;
+ }
+ sr_dbg("retrieval is started...");
+ std_session_send_df_frame_begin(sdi);
+
+ return TRUE;
+ }
+
+ tv.tv_sec = tv.tv_usec = 0;
+ libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
+
+ if (devc->transfer_finished) {
+ sr_dbg("transfer is finished!");
+ std_session_send_df_frame_end(sdi);
+
+ usb_source_remove(sdi->session, drvc->sr_ctx);
+ std_session_send_df_end(sdi);
+
+ la2016_stop_acquisition(sdi);
+
+ g_free(devc->convbuffer);
+ devc->convbuffer = NULL;
+
+ devc->transfer = NULL;
+
+ sr_dbg("transfer is now finished");
+ }
+
+ return TRUE;
+}
+
SR_PRIV int la2016_init_device(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
}
else {
sr_dbg("purchase date: 20%02hx-%02hx", (purchase_date_bcd[0]) & 0x00ff, (purchase_date_bcd[0] >> 8) & 0x00ff);
- if( purchase_date_bcd[0] != (0x0ffff & ~purchase_date_bcd[1]) ) {
+ if (purchase_date_bcd[0] != (0x0ffff & ~purchase_date_bcd[1])) {
sr_err("purchase date: checksum failure");
}
}
projects / libsigrok.git / blobdiff