#define RUNMODE_HALT 0x00
#define RUNMODE_RUN 0x03
+/* Bit patterns when reading from REG_RUN, get run state. */
+#define RUNSTATE_IDLE_BIT (1UL << 0)
+#define RUNSTATE_DRAM_BIT (1UL << 1)
+#define RUNSTATE_TRGD_BIT (1UL << 2)
+#define RUNSTATE_POST_BIT (1UL << 3)
+
static int ctrl_in(const struct sr_dev_inst *sdi,
uint8_t bRequest, uint16_t wValue, uint16_t wIndex,
void *data, uint16_t wLength)
devc = sdi->priv;
devc->capture_ratio = LA2016_DFLT_CAPT_RATIO;
- devc->cur_channels = 0xffff;
devc->limit_samples = LA2016_DFLT_SAMPLEDEPTH;
devc->cur_samplerate = LA2016_DFLT_SAMPLERATE;
channel = stage1->matches;
while (channel) {
match = channel->data;
- ch_mask = 1 << match->channel->index;
+ ch_mask = 1UL << match->channel->index;
switch (match->match) {
case SR_TRIGGER_ZERO:
"level-triggered 0x%04x, high/falling 0x%04x.",
cfg.channels, cfg.enabled, cfg.level, cfg.high_or_falling);
- devc->had_triggers_configured = cfg.enabled != 0;
+ devc->trigger_involved = cfg.enabled != 0;
wrptr = buf;
write_u32le_inc(&wrptr, cfg.channels);
* The meaning of other bit fields is unknown.
*
* Typical values in order of appearance during execution:
+ * 0x85e1: idle, no acquisition pending
+ * IDLE set, TRGD don't care, POST don't care; DRAM don't care
+ * "In idle state." Takes precedence over all others.
* 0x85e2: pre-sampling, samples before the trigger position,
* when capture ratio > 0%
+ * IDLE clear, TRGD clear, POST clear; DRAM don't care
+ * "Not idle any more, no post yet, not triggered yet."
* 0x85ea: pre-sampling complete, now waiting for the trigger
* (whilst sampling continuously)
+ * IDLE clear, TRGD clear, POST set; DRAM don't care
+ * "Post set thus after pre, not triggered yet"
* 0x85ee: trigger seen, capturing post-trigger samples, running
+ * IDLE clear, TRGD set, POST set; DRAM don't care
+ * "Triggered and in post, not idle yet."
* 0x85ed: idle
+ * IDLE set, TRGD don't care, POST don't care; DRAM don't care
+ * "In idle state." TRGD/POST don't care, same meaning as above.
*/
+static const uint16_t runstate_mask_idle = RUNSTATE_IDLE_BIT;
+static const uint16_t runstate_patt_idle = RUNSTATE_IDLE_BIT;
+static const uint16_t runstate_mask_step =
+ RUNSTATE_IDLE_BIT | RUNSTATE_TRGD_BIT | RUNSTATE_POST_BIT;
+static const uint16_t runstate_patt_pre_trig = 0;
+static const uint16_t runstate_patt_wait_trig = RUNSTATE_POST_BIT;
+static const uint16_t runstate_patt_post_trig =
+ RUNSTATE_TRGD_BIT | RUNSTATE_POST_BIT;
+
static uint16_t run_state(const struct sr_dev_inst *sdi)
{
static uint16_t previous_state;
* Avoid flooding the log, only dump values as they change.
* The routine is called about every 50ms.
*/
- if (state != previous_state) {
- previous_state = state;
- if ((state & 0x3) == 0x1) {
- label = "idle";
- } else if ((state & 0xf) == 0x2) {
- label = "pre-trigger sampling";
- } else if ((state & 0xf) == 0xa) {
- label = "sampling, waiting for trigger";
- } else if ((state & 0xf) == 0xe) {
- label = "post-trigger sampling";
- } else {
- label = NULL;
- }
- if (label && *label) {
- sr_dbg("Run state: 0x%04x (%s).", state, label);
- } else {
- sr_dbg("Run state: 0x%04x.", state);
- }
- }
+ if (state == previous_state)
+ return state;
+
+ previous_state = state;
+ label = NULL;
+ if ((state & runstate_mask_idle) == runstate_patt_idle)
+ label = "idle";
+ if ((state & runstate_mask_step) == runstate_patt_pre_trig)
+ label = "pre-trigger sampling";
+ if ((state & runstate_mask_step) == runstate_patt_wait_trig)
+ label = "sampling, waiting for trigger";
+ if ((state & runstate_mask_step) == runstate_patt_post_trig)
+ label = "post-trigger sampling";
+ if (label && *label)
+ sr_dbg("Run state: 0x%04x (%s).", state, label);
+ else
+ sr_dbg("Run state: 0x%04x.", state);
return state;
}
-static int la2016_has_triggered(const struct sr_dev_inst *sdi)
+static int la2016_is_idle(const struct sr_dev_inst *sdi)
{
uint16_t state;
state = run_state(sdi);
- if ((state & 0x3) == 0x1)
+ if ((state & runstate_mask_idle) == runstate_patt_idle)
return 1;
return 0;
devc->info.n_rep_packets_before_trigger = read_u32le_inc(&rdptr);
devc->info.write_pos = read_u32le_inc(&rdptr);
- sr_dbg("Capture info: n_rep_packets: 0x%08x/%d, before_trigger: 0x%08x/%d, write_pos: 0x%08x%d.",
+ sr_dbg("Capture info: n_rep_packets: 0x%08x/%d, before_trigger: 0x%08x/%d, write_pos: 0x%08x/%d.",
devc->info.n_rep_packets, devc->info.n_rep_packets,
devc->info.n_rep_packets_before_trigger,
devc->info.n_rep_packets_before_trigger,
return SR_OK;
}
-static int la2016_start_retrieval(const struct sr_dev_inst *sdi,
+static int la2016_start_download(const struct sr_dev_inst *sdi,
libusb_transfer_cb_fn cb)
{
struct dev_context *devc;
struct sr_datafeed_packet sr_packet;
unsigned int max_samples, n_samples, total_samples, free_n_samples;
unsigned int i, j, k;
- int do_signal_trigger;
+ gboolean do_signal_trigger;
uint8_t *wp;
const uint8_t *rp;
uint16_t state;
n_samples = 0;
wp = devc->convbuffer;
total_samples = 0;
- do_signal_trigger = 0;
+ do_signal_trigger = FALSE;
- if (devc->had_triggers_configured && devc->reading_behind_trigger == 0 && devc->info.n_rep_packets_before_trigger == 0) {
+ if (devc->trigger_involved && !devc->trigger_marked && devc->info.n_rep_packets_before_trigger == 0) {
std_session_send_df_trigger(sdi);
- devc->reading_behind_trigger = 1;
+ devc->trigger_marked = TRUE;
}
rp = packets;
wp = devc->convbuffer;
if (do_signal_trigger) {
std_session_send_df_trigger(sdi);
- do_signal_trigger = 0;
+ do_signal_trigger = FALSE;
}
}
n_samples += repetitions;
total_samples += repetitions;
devc->total_samples += repetitions;
- if (!devc->reading_behind_trigger) {
- devc->n_reps_until_trigger--;
- if (devc->n_reps_until_trigger == 0) {
- devc->reading_behind_trigger = 1;
- do_signal_trigger = 1;
+ if (devc->trigger_involved && !devc->trigger_marked) {
+ if (!--devc->n_reps_until_trigger) {
+ devc->trigger_marked = TRUE;
+ do_signal_trigger = TRUE;
sr_dbg("Trigger position after %" PRIu64 " samples, %.6fms.",
devc->total_samples,
(double)devc->total_samples / devc->cur_samplerate * 1e3);
if (transfer->status == LIBUSB_TRANSFER_TIMED_OUT) {
sr_err("USB bulk transfer timeout.");
- devc->transfer_finished = 1;
+ devc->download_finished = TRUE;
}
send_chunk(sdi, transfer->buffer, transfer->actual_length / TRANSFER_PACKET_LENGTH);
g_free(transfer->buffer);
libusb_free_transfer(transfer);
- devc->transfer_finished = 1;
+ devc->download_finished = TRUE;
}
SR_PRIV int la2016_receive_data(int fd, int revents, void *cb_data)
devc = sdi->priv;
drvc = sdi->driver->context;
- if (devc->have_trigger == 0) {
- if (la2016_has_triggered(sdi) == 0) {
+ if (!devc->completion_seen) {
+ if (!la2016_is_idle(sdi)) {
/* Not yet ready for sample data download. */
return TRUE;
}
- devc->have_trigger = 1;
- devc->transfer_finished = 0;
- devc->reading_behind_trigger = 0;
+ devc->completion_seen = TRUE;
+ devc->download_finished = FALSE;
+ devc->trigger_marked = FALSE;
devc->total_samples = 0;
/* We can start downloading sample data. */
- if (la2016_start_retrieval(sdi, receive_transfer) != SR_OK) {
+ if (la2016_start_download(sdi, receive_transfer) != SR_OK) {
sr_err("Cannot start acquisition data download.");
return FALSE;
}
tv.tv_sec = tv.tv_usec = 0;
libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
- if (devc->transfer_finished) {
+ if (devc->download_finished) {
sr_dbg("Download finished, post processing.");
std_session_send_df_frame_end(sdi);