/*
* This file is part of the sigrok project.
*
- * Copyright (C) 2011 Bert Vermeulen <bert@biot.com>
+ * Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef OLS_H_
-#define OLS_H_
+#ifndef LIBSIGROK_HARDWARE_OPENBENCH_LOGIC_SNIFFER_OLS_H
+#define LIBSIGROK_HARDWARE_OPENBENCH_LOGIC_SNIFFER_OLS_H
#define NUM_PROBES 32
#define NUM_TRIGGER_STAGES 4
uint64_t cur_samplerate;
uint32_t cur_samplerate_divider;
- uint64_t period_ps;
uint64_t limit_samples;
/* Current state of the flag register */
uint32_t flag_reg;
struct sr_serial_device_instance *serial;
};
-#endif /* OLS_H_ */
+#endif