*/
/*
- * ASIX Sigma Logic Analyzer Driver
+ * ASIX SIGMA Logic Analyzer Driver
*/
+#include <glib.h>
+#include <glib/gstdio.h>
#include <ftdi.h>
#include <string.h>
#include <zlib.h>
-#include <sigrok.h>
+#include "sigrok.h"
+#include "sigrok-internal.h"
#include "asix-sigma.h"
#define USB_VENDOR 0xa600
#define USB_VENDOR_NAME "ASIX"
#define USB_MODEL_NAME "SIGMA"
#define USB_MODEL_VERSION ""
+#define TRIGGER_TYPES "rf10"
+#define NUM_PROBES 16
-static GSList *device_instances = NULL;
-
-// XXX These should be per device
-static struct ftdi_context ftdic;
-static uint64_t cur_samplerate = 0;
-static uint32_t limit_msec = 0;
-static struct timeval start_tv;
-static int cur_firmware = -1;
-static int num_probes = 0;
-static int samples_per_event = 0;
+static GSList *dev_insts = NULL;
static uint64_t supported_samplerates[] = {
- MHZ(50),
- MHZ(100),
- MHZ(200),
+ SR_KHZ(200),
+ SR_KHZ(250),
+ SR_KHZ(500),
+ SR_MHZ(1),
+ SR_MHZ(5),
+ SR_MHZ(10),
+ SR_MHZ(25),
+ SR_MHZ(50),
+ SR_MHZ(100),
+ SR_MHZ(200),
0,
};
-static struct samplerates samplerates = {
- MHZ(50),
- MHZ(200),
- 0,
+/*
+ * Probe numbers seem to go from 1-16, according to this image:
+ * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
+ * (the cable has two additional GND pins, and a TI and TO pin)
+ */
+static const char *probe_names[NUM_PROBES + 1] = {
+ "1",
+ "2",
+ "3",
+ "4",
+ "5",
+ "6",
+ "7",
+ "8",
+ "9",
+ "10",
+ "11",
+ "12",
+ "13",
+ "14",
+ "15",
+ "16",
+ NULL,
+};
+
+static struct sr_samplerates samplerates = {
+ SR_KHZ(200),
+ SR_MHZ(200),
+ SR_HZ(0),
supported_samplerates,
};
-static int capabilities[] = {
- HWCAP_LOGIC_ANALYZER,
- HWCAP_SAMPLERATE,
+static int hwcaps[] = {
+ SR_HWCAP_LOGIC_ANALYZER,
+ SR_HWCAP_SAMPLERATE,
+ SR_HWCAP_CAPTURE_RATIO,
+ SR_HWCAP_PROBECONFIG,
- /* These are really implemented in the driver, not the hardware. */
- HWCAP_LIMIT_MSEC,
+ SR_HWCAP_LIMIT_MSEC,
0,
};
0x2a, 0x3a, 0x40, 0x03, 0x20, 0x38,
};
-static const char *firmware_files[] =
-{
+static const char *firmware_files[] = {
"asix-sigma-50.fw", /* 50 MHz, supports 8 bit fractions */
"asix-sigma-100.fw", /* 100 MHz */
"asix-sigma-200.fw", /* 200 MHz */
- "asix-sigma-50sync.fw", /* Asynchronous sampling */
+ "asix-sigma-50sync.fw", /* Synchronous clock from pin */
"asix-sigma-phasor.fw", /* Frequency counter */
};
-static int sigma_read(void* buf, size_t size)
+static int hw_dev_acquisition_stop(int dev_index, gpointer session_data);
+
+static int sigma_read(void *buf, size_t size, struct context *ctx)
{
int ret;
- ret = ftdi_read_data(&ftdic, (unsigned char *)buf, size);
+ ret = ftdi_read_data(&ctx->ftdic, (unsigned char *)buf, size);
if (ret < 0) {
- g_warning("ftdi_read_data failed: %s",
- ftdi_get_error_string(&ftdic));
+ sr_err("sigma: ftdi_read_data failed: %s",
+ ftdi_get_error_string(&ctx->ftdic));
}
return ret;
}
-static int sigma_write(void *buf, size_t size)
+static int sigma_write(void *buf, size_t size, struct context *ctx)
{
int ret;
- ret = ftdi_write_data(&ftdic, (unsigned char *)buf, size);
+ ret = ftdi_write_data(&ctx->ftdic, (unsigned char *)buf, size);
if (ret < 0) {
- g_warning("ftdi_write_data failed: %s",
- ftdi_get_error_string(&ftdic));
+ sr_err("sigma: ftdi_write_data failed: %s",
+ ftdi_get_error_string(&ctx->ftdic));
} else if ((size_t) ret != size) {
- g_warning("ftdi_write_data did not complete write\n");
+ sr_err("sigma: ftdi_write_data did not complete write\n");
}
return ret;
}
-static int sigma_write_register(uint8_t reg, uint8_t *data, size_t len)
+static int sigma_write_register(uint8_t reg, uint8_t *data, size_t len,
+ struct context *ctx)
{
size_t i;
uint8_t buf[len + 2];
buf[idx++] = REG_DATA_HIGH_WRITE | (data[i] >> 4);
}
- return sigma_write(buf, idx);
+ return sigma_write(buf, idx, ctx);
}
-static int sigma_set_register(uint8_t reg, uint8_t value)
+static int sigma_set_register(uint8_t reg, uint8_t value, struct context *ctx)
{
- return sigma_write_register(reg, &value, 1);
+ return sigma_write_register(reg, &value, 1, ctx);
}
-static int sigma_read_register(uint8_t reg, uint8_t *data, size_t len)
+static int sigma_read_register(uint8_t reg, uint8_t *data, size_t len,
+ struct context *ctx)
{
uint8_t buf[3];
buf[1] = REG_ADDR_HIGH | (reg >> 4);
buf[2] = REG_READ_ADDR;
- sigma_write(buf, sizeof(buf));
+ sigma_write(buf, sizeof(buf), ctx);
- return sigma_read(data, len);
+ return sigma_read(data, len, ctx);
}
-static uint8_t sigma_get_register(uint8_t reg)
+static uint8_t sigma_get_register(uint8_t reg, struct context *ctx)
{
uint8_t value;
- if (1 != sigma_read_register(reg, &value, 1)) {
- g_warning("Sigma_get_register: 1 byte expected");
+ if (1 != sigma_read_register(reg, &value, 1, ctx)) {
+ sr_err("sigma: sigma_get_register: 1 byte expected");
return 0;
}
return value;
}
-static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos)
+static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos,
+ struct context *ctx)
{
uint8_t buf[] = {
REG_ADDR_LOW | READ_TRIGGER_POS_LOW,
};
uint8_t result[6];
- sigma_write(buf, sizeof(buf));
+ sigma_write(buf, sizeof(buf), ctx);
- sigma_read(result, sizeof(result));
+ sigma_read(result, sizeof(result), ctx);
*triggerpos = result[0] | (result[1] << 8) | (result[2] << 16);
*stoppos = result[3] | (result[4] << 8) | (result[5] << 16);
+ /* Not really sure why this must be done, but according to spec. */
+ if ((--*stoppos & 0x1ff) == 0x1ff)
+ stoppos -= 64;
+
+ if ((*--triggerpos & 0x1ff) == 0x1ff)
+ triggerpos -= 64;
+
return 1;
}
-static int sigma_read_dram(uint16_t startchunk, size_t numchunks, uint8_t *data)
+static int sigma_read_dram(uint16_t startchunk, size_t numchunks,
+ uint8_t *data, struct context *ctx)
{
size_t i;
uint8_t buf[4096];
/* Send the startchunk. Index start with 1. */
buf[0] = startchunk >> 8;
buf[1] = startchunk & 0xff;
- sigma_write_register(WRITE_MEMROW, buf, 2);
+ sigma_write_register(WRITE_MEMROW, buf, 2, ctx);
/* Read the DRAM. */
buf[idx++] = REG_DRAM_BLOCK;
buf[idx++] = REG_DRAM_WAIT_ACK;
}
- sigma_write(buf, idx);
+ sigma_write(buf, idx, ctx);
+
+ return sigma_read(data, numchunks * CHUNK_SIZE, ctx);
+}
+
+/* Upload trigger look-up tables to Sigma. */
+static int sigma_write_trigger_lut(struct triggerlut *lut, struct context *ctx)
+{
+ int i;
+ uint8_t tmp[2];
+ uint16_t bit;
+
+ /* Transpose the table and send to Sigma. */
+ for (i = 0; i < 16; ++i) {
+ bit = 1 << i;
+
+ tmp[0] = tmp[1] = 0;
+
+ if (lut->m2d[0] & bit)
+ tmp[0] |= 0x01;
+ if (lut->m2d[1] & bit)
+ tmp[0] |= 0x02;
+ if (lut->m2d[2] & bit)
+ tmp[0] |= 0x04;
+ if (lut->m2d[3] & bit)
+ tmp[0] |= 0x08;
+
+ if (lut->m3 & bit)
+ tmp[0] |= 0x10;
+ if (lut->m3s & bit)
+ tmp[0] |= 0x20;
+ if (lut->m4 & bit)
+ tmp[0] |= 0x40;
+
+ if (lut->m0d[0] & bit)
+ tmp[1] |= 0x01;
+ if (lut->m0d[1] & bit)
+ tmp[1] |= 0x02;
+ if (lut->m0d[2] & bit)
+ tmp[1] |= 0x04;
+ if (lut->m0d[3] & bit)
+ tmp[1] |= 0x08;
+
+ if (lut->m1d[0] & bit)
+ tmp[1] |= 0x10;
+ if (lut->m1d[1] & bit)
+ tmp[1] |= 0x20;
+ if (lut->m1d[2] & bit)
+ tmp[1] |= 0x40;
+ if (lut->m1d[3] & bit)
+ tmp[1] |= 0x80;
+
+ sigma_write_register(WRITE_TRIGGER_SELECT0, tmp, sizeof(tmp),
+ ctx);
+ sigma_set_register(WRITE_TRIGGER_SELECT1, 0x30 | i, ctx);
+ }
+
+ /* Send the parameters */
+ sigma_write_register(WRITE_TRIGGER_SELECT0, (uint8_t *) &lut->params,
+ sizeof(lut->params), ctx);
- return sigma_read(data, numchunks * CHUNK_SIZE);
+ return SR_OK;
}
/* Generate the bitbang stream for programming the FPGA. */
int c, ret, bit, v;
uint32_t imm = 0x3f6df2ab;
- f = fopen(filename, "r");
+ f = g_fopen(filename, "rb");
if (!f) {
- g_warning("fopen(\"%s\", \"r\")", filename);
- return -1;
+ sr_err("sigma: g_fopen(\"%s\", \"rb\")", filename);
+ return SR_ERR;
}
if (-1 == fseek(f, 0, SEEK_END)) {
- g_warning("fseek on %s failed", filename);
+ sr_err("sigma: fseek on %s failed", filename);
fclose(f);
- return -1;
+ return SR_ERR;
}
file_size = ftell(f);
fseek(f, 0, SEEK_SET);
- compressed_buf = g_malloc(file_size);
- firmware = g_malloc(buffer_size);
+ if (!(compressed_buf = g_try_malloc(file_size))) {
+ sr_err("sigma: %s: compressed_buf malloc failed", __func__);
+ fclose(f);
+ return SR_ERR_MALLOC;
+ }
- if (!compressed_buf || !firmware) {
- g_warning("Error allocating buffers");
- return -1;
+ if (!(firmware = g_try_malloc(buffer_size))) {
+ sr_err("sigma: %s: firmware malloc failed", __func__);
+ fclose(f);
+ g_free(compressed_buf);
+ return SR_ERR_MALLOC;
}
csize = 0;
if (ret < 0) {
g_free(compressed_buf);
g_free(firmware);
- g_warning("Could not unpack Sigma firmware. (Error %d)\n", ret);
- return -1;
+ sr_err("sigma: Could not unpack Sigma firmware. "
+ "(Error %d)\n", ret);
+ return SR_ERR;
}
g_free(compressed_buf);
*buf_size = fwsize * 2 * 8;
- *buf = p = (unsigned char *)g_malloc(*buf_size);
-
+ *buf = p = (unsigned char *)g_try_malloc(*buf_size);
if (!p) {
- g_warning("Error allocating buffers");
- return -1;
+ sr_err("sigma: %s: buf/p malloc failed", __func__);
+ g_free(compressed_buf);
+ g_free(firmware);
+ return SR_ERR_MALLOC;
}
for (i = 0; i < fwsize; ++i) {
if (offset != *buf_size) {
g_free(*buf);
- g_warning("Error reading firmware %s "
- "offset=%ld, file_size=%ld, buf_size=%zd\n",
- filename, offset, file_size, *buf_size);
+ sr_err("sigma: Error reading firmware %s "
+ "offset=%ld, file_size=%ld, buf_size=%zd\n",
+ filename, offset, file_size, *buf_size);
- return -1;
+ return SR_ERR;
}
- return 0;
+ return SR_OK;
}
-static int hw_init(char *deviceinfo)
+static int hw_init(const char *devinfo)
{
- struct sigrok_device_instance *sdi;
+ struct sr_dev_inst *sdi;
+ struct context *ctx;
- deviceinfo = deviceinfo;
+ /* Avoid compiler warnings. */
+ (void)devinfo;
- ftdi_init(&ftdic);
+ if (!(ctx = g_try_malloc(sizeof(struct context)))) {
+ sr_err("sigma: %s: ctx malloc failed", __func__);
+ return 0; /* FIXME: Should be SR_ERR_MALLOC. */
+ }
+
+ ftdi_init(&ctx->ftdic);
/* Look for SIGMAs. */
- if (ftdi_usb_open_desc(&ftdic, USB_VENDOR, USB_PRODUCT,
+ if (ftdi_usb_open_desc(&ctx->ftdic, USB_VENDOR, USB_PRODUCT,
USB_DESCRIPTION, NULL) < 0)
- return 0;
+ goto free;
+
+ ctx->cur_samplerate = 0;
+ ctx->period_ps = 0;
+ ctx->limit_msec = 0;
+ ctx->cur_firmware = -1;
+ ctx->num_probes = 0;
+ ctx->samples_per_event = 0;
+ ctx->capture_ratio = 50;
+ ctx->use_triggers = 0;
/* Register SIGMA device. */
- sdi = sigrok_device_instance_new(0, ST_INITIALIZING,
- USB_VENDOR_NAME, USB_MODEL_NAME, USB_MODEL_VERSION);
- if (!sdi)
- return 0;
+ if (!(sdi = sr_dev_inst_new(0, SR_ST_INITIALIZING, USB_VENDOR_NAME,
+ USB_MODEL_NAME, USB_MODEL_VERSION))) {
+ sr_err("sigma: %s: sdi was NULL", __func__);
+ goto free;
+ }
- device_instances = g_slist_append(device_instances, sdi);
+ sdi->priv = ctx;
+
+ dev_insts = g_slist_append(dev_insts, sdi);
/* We will open the device again when we need it. */
- ftdi_usb_close(&ftdic);
+ ftdi_usb_close(&ctx->ftdic);
return 1;
+
+free:
+ g_free(ctx);
+ return 0;
}
-static int upload_firmware(int firmware_idx)
+static int upload_firmware(int firmware_idx, struct context *ctx)
{
int ret;
unsigned char *buf;
char firmware_path[128];
/* Make sure it's an ASIX SIGMA. */
- if ((ret = ftdi_usb_open_desc(&ftdic,
+ if ((ret = ftdi_usb_open_desc(&ctx->ftdic,
USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
- g_warning("ftdi_usb_open failed: %s",
- ftdi_get_error_string(&ftdic));
+ sr_err("sigma: ftdi_usb_open failed: %s",
+ ftdi_get_error_string(&ctx->ftdic));
return 0;
}
- if ((ret = ftdi_set_bitmode(&ftdic, 0xdf, BITMODE_BITBANG)) < 0) {
- g_warning("ftdi_set_bitmode failed: %s",
- ftdi_get_error_string(&ftdic));
+ if ((ret = ftdi_set_bitmode(&ctx->ftdic, 0xdf, BITMODE_BITBANG)) < 0) {
+ sr_err("sigma: ftdi_set_bitmode failed: %s",
+ ftdi_get_error_string(&ctx->ftdic));
return 0;
}
/* Four times the speed of sigmalogan - Works well. */
- if ((ret = ftdi_set_baudrate(&ftdic, 750000)) < 0) {
- g_warning("ftdi_set_baudrate failed: %s",
- ftdi_get_error_string(&ftdic));
+ if ((ret = ftdi_set_baudrate(&ctx->ftdic, 750000)) < 0) {
+ sr_err("sigma: ftdi_set_baudrate failed: %s",
+ ftdi_get_error_string(&ctx->ftdic));
return 0;
}
/* Force the FPGA to reboot. */
- sigma_write(suicide, sizeof(suicide));
- sigma_write(suicide, sizeof(suicide));
- sigma_write(suicide, sizeof(suicide));
- sigma_write(suicide, sizeof(suicide));
+ sigma_write(suicide, sizeof(suicide), ctx);
+ sigma_write(suicide, sizeof(suicide), ctx);
+ sigma_write(suicide, sizeof(suicide), ctx);
+ sigma_write(suicide, sizeof(suicide), ctx);
/* Prepare to upload firmware (FPGA specific). */
- sigma_write(init, sizeof(init));
+ sigma_write(init, sizeof(init), ctx);
- ftdi_usb_purge_buffers(&ftdic);
+ ftdi_usb_purge_buffers(&ctx->ftdic);
/* Wait until the FPGA asserts INIT_B. */
while (1) {
- ret = sigma_read(result, 1);
+ ret = sigma_read(result, 1, ctx);
if (result[0] & 0x20)
break;
}
- /* Prepare firmware */
+ /* Prepare firmware. */
snprintf(firmware_path, sizeof(firmware_path), "%s/%s", FIRMWARE_DIR,
firmware_files[firmware_idx]);
- if (-1 == bin2bitbang(firmware_path, &buf, &buf_size)) {
- g_warning("An error occured while reading the firmware: %s",
- firmware_path);
- return SIGROK_ERR;
+ if ((ret = bin2bitbang(firmware_path, &buf, &buf_size)) != SR_OK) {
+ sr_err("sigma: An error occured while reading the firmware: %s",
+ firmware_path);
+ return ret;
}
/* Upload firmare. */
- sigma_write(buf, buf_size);
+ sigma_write(buf, buf_size, ctx);
g_free(buf);
- if ((ret = ftdi_set_bitmode(&ftdic, 0x00, BITMODE_RESET)) < 0) {
- g_warning("ftdi_set_bitmode failed: %s",
- ftdi_get_error_string(&ftdic));
- return SIGROK_ERR;
+ if ((ret = ftdi_set_bitmode(&ctx->ftdic, 0x00, BITMODE_RESET)) < 0) {
+ sr_err("sigma: ftdi_set_bitmode failed: %s",
+ ftdi_get_error_string(&ctx->ftdic));
+ return SR_ERR;
}
- ftdi_usb_purge_buffers(&ftdic);
+ ftdi_usb_purge_buffers(&ctx->ftdic);
/* Discard garbage. */
- while (1 == sigma_read(&pins, 1))
+ while (1 == sigma_read(&pins, 1, ctx))
;
/* Initialize the logic analyzer mode. */
- sigma_write(logic_mode_start, sizeof(logic_mode_start));
+ sigma_write(logic_mode_start, sizeof(logic_mode_start), ctx);
/* Expect a 3 byte reply. */
- ret = sigma_read(result, 3);
+ ret = sigma_read(result, 3, ctx);
if (ret != 3 ||
result[0] != 0xa6 || result[1] != 0x55 || result[2] != 0xaa) {
- g_warning("Configuration failed. Invalid reply received.");
- return SIGROK_ERR;
+ sr_err("sigma: Configuration failed. Invalid reply received.");
+ return SR_ERR;
}
- cur_firmware = firmware_idx;
+ ctx->cur_firmware = firmware_idx;
- return SIGROK_OK;
+ return SR_OK;
}
-static int hw_opendev(int device_index)
+static int hw_dev_open(int dev_index)
{
- struct sigrok_device_instance *sdi;
+ struct sr_dev_inst *sdi;
+ struct context *ctx;
int ret;
- /* Make sure it's an ASIX SIGMA */
- if ((ret = ftdi_usb_open_desc(&ftdic,
+ if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
+ return SR_ERR;
+
+ ctx = sdi->priv;
+
+ /* Make sure it's an ASIX SIGMA. */
+ if ((ret = ftdi_usb_open_desc(&ctx->ftdic,
USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
- g_warning("ftdi_usb_open failed: %s",
- ftdi_get_error_string(&ftdic));
+ sr_err("sigma: ftdi_usb_open failed: %s",
+ ftdi_get_error_string(&ctx->ftdic));
return 0;
}
- if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
- return SIGROK_ERR;
+ sdi->status = SR_ST_ACTIVE;
- sdi->status = ST_ACTIVE;
-
- return SIGROK_OK;
+ return SR_OK;
}
-static int set_samplerate(struct sigrok_device_instance *sdi, uint64_t samplerate)
+static int set_samplerate(struct sr_dev_inst *sdi, uint64_t samplerate)
{
int i, ret;
-
- sdi = sdi;
+ struct context *ctx = sdi->priv;
for (i = 0; supported_samplerates[i]; i++) {
if (supported_samplerates[i] == samplerate)
break;
}
if (supported_samplerates[i] == 0)
- return SIGROK_ERR_SAMPLERATE;
+ return SR_ERR_SAMPLERATE;
- if (samplerate <= MHZ(50)) {
- ret = upload_firmware(0);
- num_probes = 16;
- // XXX: Setup divider
+ if (samplerate <= SR_MHZ(50)) {
+ ret = upload_firmware(0, ctx);
+ ctx->num_probes = 16;
}
- if (samplerate == MHZ(100)) {
- ret = upload_firmware(1);
- num_probes = 8;
+ if (samplerate == SR_MHZ(100)) {
+ ret = upload_firmware(1, ctx);
+ ctx->num_probes = 8;
}
- else if (samplerate == MHZ(200)) {
- ret = upload_firmware(2);
- num_probes = 4;
+ else if (samplerate == SR_MHZ(200)) {
+ ret = upload_firmware(2, ctx);
+ ctx->num_probes = 4;
}
- cur_samplerate = samplerate;
- samples_per_event = 16 / num_probes;
+ ctx->cur_samplerate = samplerate;
+ ctx->period_ps = 1000000000000 / samplerate;
+ ctx->samples_per_event = 16 / ctx->num_probes;
+ ctx->state.state = SIGMA_IDLE;
- g_message("Firmware uploaded");
+ sr_info("sigma: Firmware uploaded");
return ret;
}
-static void hw_closedev(int device_index)
+/*
+ * In 100 and 200 MHz mode, only a single pin rising/falling can be
+ * set as trigger. In other modes, two rising/falling triggers can be set,
+ * in addition to value/mask trigger for any number of probes.
+ *
+ * The Sigma supports complex triggers using boolean expressions, but this
+ * has not been implemented yet.
+ */
+static int configure_probes(struct sr_dev_inst *sdi, GSList *probes)
+{
+ struct context *ctx = sdi->priv;
+ struct sr_probe *probe;
+ GSList *l;
+ int trigger_set = 0;
+ int probebit;
+
+ memset(&ctx->trigger, 0, sizeof(struct sigma_trigger));
+
+ for (l = probes; l; l = l->next) {
+ probe = (struct sr_probe *)l->data;
+ probebit = 1 << (probe->index - 1);
+
+ if (!probe->enabled || !probe->trigger)
+ continue;
+
+ if (ctx->cur_samplerate >= SR_MHZ(100)) {
+ /* Fast trigger support. */
+ if (trigger_set) {
+ sr_err("sigma: ASIX SIGMA only supports a single "
+ "pin trigger in 100 and 200MHz mode.");
+ return SR_ERR;
+ }
+ if (probe->trigger[0] == 'f')
+ ctx->trigger.fallingmask |= probebit;
+ else if (probe->trigger[0] == 'r')
+ ctx->trigger.risingmask |= probebit;
+ else {
+ sr_err("sigma: ASIX SIGMA only supports "
+ "rising/falling trigger in 100 "
+ "and 200MHz mode.");
+ return SR_ERR;
+ }
+
+ ++trigger_set;
+ } else {
+ /* Simple trigger support (event). */
+ if (probe->trigger[0] == '1') {
+ ctx->trigger.simplevalue |= probebit;
+ ctx->trigger.simplemask |= probebit;
+ }
+ else if (probe->trigger[0] == '0') {
+ ctx->trigger.simplevalue &= ~probebit;
+ ctx->trigger.simplemask |= probebit;
+ }
+ else if (probe->trigger[0] == 'f') {
+ ctx->trigger.fallingmask |= probebit;
+ ++trigger_set;
+ }
+ else if (probe->trigger[0] == 'r') {
+ ctx->trigger.risingmask |= probebit;
+ ++trigger_set;
+ }
+
+ /*
+ * Actually, Sigma supports 2 rising/falling triggers,
+ * but they are ORed and the current trigger syntax
+ * does not permit ORed triggers.
+ */
+ if (trigger_set > 1) {
+ sr_err("sigma: ASIX SIGMA only supports 1 "
+ "rising/falling triggers.");
+ return SR_ERR;
+ }
+ }
+
+ if (trigger_set)
+ ctx->use_triggers = 1;
+ }
+
+ return SR_OK;
+}
+
+static int hw_dev_close(int dev_index)
{
- device_index = device_index;
+ struct sr_dev_inst *sdi;
+ struct context *ctx;
+
+ if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) {
+ sr_err("sigma: %s: sdi was NULL", __func__);
+ return SR_ERR; /* TODO: SR_ERR_ARG? */
+ }
+
+ if (!(ctx = sdi->priv)) {
+ sr_err("sigma: %s: sdi->priv was NULL", __func__);
+ return SR_ERR; /* TODO: SR_ERR_ARG? */
+ }
+
+ /* TODO */
+ if (sdi->status == SR_ST_ACTIVE)
+ ftdi_usb_close(&ctx->ftdic);
+
+ sdi->status = SR_ST_INACTIVE;
- ftdi_usb_close(&ftdic);
+ return SR_OK;
}
-static void hw_cleanup(void)
+static int hw_cleanup(void)
{
+ GSList *l;
+ struct sr_dev_inst *sdi;
+ int ret = SR_OK;
+
+ /* Properly close all devices. */
+ for (l = dev_insts; l; l = l->next) {
+ if (!(sdi = l->data)) {
+ /* Log error, but continue cleaning up the rest. */
+ sr_err("sigma: %s: sdi was NULL, continuing", __func__);
+ ret = SR_ERR_BUG;
+ continue;
+ }
+ sr_dev_inst_free(sdi);
+ }
+ g_slist_free(dev_insts);
+ dev_insts = NULL;
+
+ return ret;
}
-static void *hw_get_device_info(int device_index, int device_info_id)
+static void *hw_dev_info_get(int dev_index, int dev_info_id)
{
- struct sigrok_device_instance *sdi;
+ struct sr_dev_inst *sdi;
+ struct context *ctx;
void *info = NULL;
- if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) {
- fprintf(stderr, "It's NULL.\n");
+ if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) {
+ sr_err("sigma: %s: sdi was NULL", __func__);
return NULL;
}
- switch (device_info_id) {
- case DI_INSTANCE:
+ ctx = sdi->priv;
+
+ switch (dev_info_id) {
+ case SR_DI_INST:
info = sdi;
break;
- case DI_NUM_PROBES:
- info = GINT_TO_POINTER(4);
+ case SR_DI_NUM_PROBES:
+ info = GINT_TO_POINTER(NUM_PROBES);
+ break;
+ case SR_DI_PROBE_NAMES:
+ info = probe_names;
break;
- case DI_SAMPLERATES:
+ case SR_DI_SAMPLERATES:
info = &samplerates;
break;
- case DI_TRIGGER_TYPES:
- info = 0; //TRIGGER_TYPES;
+ case SR_DI_TRIGGER_TYPES:
+ info = (char *)TRIGGER_TYPES;
break;
- case DI_CUR_SAMPLERATE:
- info = &cur_samplerate;
+ case SR_DI_CUR_SAMPLERATE:
+ info = &ctx->cur_samplerate;
break;
}
return info;
}
-static int hw_get_status(int device_index)
+static int hw_dev_status_get(int dev_index)
{
- struct sigrok_device_instance *sdi;
+ struct sr_dev_inst *sdi;
- sdi = get_sigrok_device_instance(device_instances, device_index);
+ sdi = sr_dev_inst_get(dev_insts, dev_index);
if (sdi)
return sdi->status;
else
- return ST_NOT_FOUND;
+ return SR_ST_NOT_FOUND;
}
-static int *hw_get_capabilities(void)
+static int *hw_hwcap_get_all(void)
{
- return capabilities;
+ return hwcaps;
}
-static int hw_set_configuration(int device_index, int capability, void *value)
+static int hw_dev_config_set(int dev_index, int hwcap, void *value)
{
- struct sigrok_device_instance *sdi;
+ struct sr_dev_inst *sdi;
+ struct context *ctx;
int ret;
- if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
- return SIGROK_ERR;
-
- if (capability == HWCAP_SAMPLERATE) {
- ret = set_samplerate(sdi, *(uint64_t*) value);
- } else if (capability == HWCAP_PROBECONFIG) {
- ret = SIGROK_OK;
- } else if (capability == HWCAP_LIMIT_MSEC) {
- limit_msec = strtoull(value, NULL, 10);
- ret = SIGROK_OK;
+ if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
+ return SR_ERR;
+
+ ctx = sdi->priv;
+
+ if (hwcap == SR_HWCAP_SAMPLERATE) {
+ ret = set_samplerate(sdi, *(uint64_t *)value);
+ } else if (hwcap == SR_HWCAP_PROBECONFIG) {
+ ret = configure_probes(sdi, value);
+ } else if (hwcap == SR_HWCAP_LIMIT_MSEC) {
+ ctx->limit_msec = *(uint64_t *)value;
+ if (ctx->limit_msec > 0)
+ ret = SR_OK;
+ else
+ ret = SR_ERR;
+ } else if (hwcap == SR_HWCAP_CAPTURE_RATIO) {
+ ctx->capture_ratio = *(uint64_t *)value;
+ if (ctx->capture_ratio < 0 || ctx->capture_ratio > 100)
+ ret = SR_ERR;
+ else
+ ret = SR_OK;
} else {
- ret = SIGROK_ERR;
+ ret = SR_ERR;
}
return ret;
}
+/* Software trigger to determine exact trigger position. */
+static int get_trigger_offset(uint16_t *samples, uint16_t last_sample,
+ struct sigma_trigger *t)
+{
+ int i;
+
+ for (i = 0; i < 8; ++i) {
+ if (i > 0)
+ last_sample = samples[i-1];
+
+ /* Simple triggers. */
+ if ((samples[i] & t->simplemask) != t->simplevalue)
+ continue;
+
+ /* Rising edge. */
+ if ((last_sample & t->risingmask) != 0 || (samples[i] &
+ t->risingmask) != t->risingmask)
+ continue;
+
+ /* Falling edge. */
+ if ((last_sample & t->fallingmask) != t->fallingmask ||
+ (samples[i] & t->fallingmask) != 0)
+ continue;
+
+ break;
+ }
+
+ /* If we did not match, return original trigger pos. */
+ return i & 0x7;
+}
+
/*
* Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster.
* Each event is 20ns apart, and can contain multiple samples.
* spread 20 ns apart.
*/
static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts,
- uint16_t *lastsample, void *user_data)
+ uint16_t *lastsample, int triggerpos,
+ uint16_t limit_chunk, void *session_data)
{
+ struct sr_dev_inst *sdi = session_data;
+ struct context *ctx = sdi->priv;
uint16_t tsdiff, ts;
- uint16_t samples[65536 * samples_per_event];
- struct datafeed_packet packet;
+ uint16_t samples[65536 * ctx->samples_per_event];
+ struct sr_datafeed_packet packet;
+ struct sr_datafeed_logic logic;
int i, j, k, l, numpad, tosend;
size_t n = 0, sent = 0;
- int clustersize = EVENTS_PER_CLUSTER * samples_per_event;
+ int clustersize = EVENTS_PER_CLUSTER * ctx->samples_per_event;
uint16_t *event;
uint16_t cur_sample;
+ int triggerts = -1;
+
+ /* Check if trigger is in this chunk. */
+ if (triggerpos != -1) {
+ if (ctx->cur_samplerate <= SR_MHZ(50))
+ triggerpos -= EVENTS_PER_CLUSTER - 1;
+
+ if (triggerpos < 0)
+ triggerpos = 0;
+
+ /* Find in which cluster the trigger occured. */
+ triggerts = triggerpos / 7;
+ }
- /* For each ts */
+ /* For each ts. */
for (i = 0; i < 64; ++i) {
ts = *(uint16_t *) &buf[i * 16];
tsdiff = ts - *lastts;
*lastts = ts;
+ /* Decode partial chunk. */
+ if (limit_chunk && ts > limit_chunk)
+ return SR_OK;
+
/* Pad last sample up to current point. */
- numpad = tsdiff * samples_per_event - clustersize;
+ numpad = tsdiff * ctx->samples_per_event - clustersize;
if (numpad > 0) {
for (j = 0; j < numpad; ++j)
samples[j] = *lastsample;
n = numpad;
}
- event = (uint16_t *) &buf[i * 16 + 2];
+ /* Send samples between previous and this timestamp to sigrok. */
+ sent = 0;
+ while (sent < n) {
+ tosend = MIN(2048, n - sent);
+ packet.type = SR_DF_LOGIC;
+ packet.payload = &logic;
+ logic.length = tosend * sizeof(uint16_t);
+ logic.unitsize = 2;
+ logic.data = samples + sent;
+ sr_session_bus(ctx->session_id, &packet);
+
+ sent += tosend;
+ }
+ n = 0;
+
+ event = (uint16_t *) &buf[i * 16 + 2];
cur_sample = 0;
/* For each event in cluster. */
for (j = 0; j < 7; ++j) {
/* For each sample in event. */
- for (k = 0; k < samples_per_event; ++k) {
+ for (k = 0; k < ctx->samples_per_event; ++k) {
cur_sample = 0;
/* For each probe. */
- for (l = 0; l < num_probes; ++l)
- cur_sample |= (!!(event[j] &
- (1 << (l * 2 + k)))) << l;
+ for (l = 0; l < ctx->num_probes; ++l)
+ cur_sample |= (!!(event[j] & (1 << (l *
+ ctx->samples_per_event + k)))) << l;
samples[n++] = cur_sample;
}
}
- *lastsample = samples[n - 1];
-
- /* Send to sigrok. */
+ /* Send data up to trigger point (if triggered). */
sent = 0;
- while (sent < n) {
- tosend = MIN(2048, n - sent);
+ if (i == triggerts) {
+ /*
+ * Trigger is not always accurate to sample because of
+ * pipeline delay. However, it always triggers before
+ * the actual event. We therefore look at the next
+ * samples to pinpoint the exact position of the trigger.
+ */
+ tosend = get_trigger_offset(samples, *lastsample,
+ &ctx->trigger);
+
+ if (tosend > 0) {
+ packet.type = SR_DF_LOGIC;
+ packet.payload = &logic;
+ logic.length = tosend * sizeof(uint16_t);
+ logic.unitsize = 2;
+ logic.data = samples;
+ sr_session_bus(ctx->session_id, &packet);
+
+ sent += tosend;
+ }
+
+ /* Only send trigger if explicitly enabled. */
+ if (ctx->use_triggers) {
+ packet.type = SR_DF_TRIGGER;
+ sr_session_bus(ctx->session_id, &packet);
+ }
+ }
- packet.type = DF_LOGIC16;
- packet.length = tosend * sizeof(uint16_t);
- packet.payload = samples + sent;
- session_bus(user_data, &packet);
+ /* Send rest of the chunk to sigrok. */
+ tosend = n - sent;
- sent += tosend;
+ if (tosend > 0) {
+ packet.type = SR_DF_LOGIC;
+ packet.payload = &logic;
+ logic.length = tosend * sizeof(uint16_t);
+ logic.unitsize = 2;
+ logic.data = samples + sent;
+ sr_session_bus(ctx->session_id, &packet);
}
+
+ *lastsample = samples[n - 1];
}
- return SIGROK_OK;
+ return SR_OK;
}
-static int receive_data(int fd, int revents, void *user_data)
+static int receive_data(int fd, int revents, void *session_data)
{
- struct datafeed_packet packet;
+ struct sr_dev_inst *sdi = session_data;
+ struct context *ctx = sdi->priv;
+ struct sr_datafeed_packet packet;
const int chunks_per_read = 32;
unsigned char buf[chunks_per_read * CHUNK_SIZE];
- int bufsz, numchunks, curchunk, i, newchunks;
- uint32_t triggerpos, stoppos, running_msec;
+ int bufsz, numchunks, i, newchunks;
+ uint64_t running_msec;
struct timeval tv;
- uint16_t lastts = 0;
- uint16_t lastsample = 0;
-
- fd = fd;
- revents = revents;
- /* Get the current position. */
- sigma_read_pos(&stoppos, &triggerpos);
- numchunks = stoppos / 512;
+ /* Avoid compiler warnings. */
+ (void)fd;
+ (void)revents;
- /* Check if the has expired, or memory is full. */
- gettimeofday(&tv, 0);
- running_msec = (tv.tv_sec - start_tv.tv_sec) * 1000 +
- (tv.tv_usec - start_tv.tv_usec) / 1000;
+ numchunks = (ctx->state.stoppos + 511) / 512;
- if (running_msec < limit_msec && numchunks < 32767)
+ if (ctx->state.state == SIGMA_IDLE)
return FALSE;
- /* Stop acqusition. */
- sigma_set_register(WRITE_MODE, 0x11);
+ if (ctx->state.state == SIGMA_CAPTURE) {
+ /* Check if the timer has expired, or memory is full. */
+ gettimeofday(&tv, 0);
+ running_msec = (tv.tv_sec - ctx->start_tv.tv_sec) * 1000 +
+ (tv.tv_usec - ctx->start_tv.tv_usec) / 1000;
- /* Set SDRAM Read Enable. */
- sigma_set_register(WRITE_MODE, 0x02);
+ if (running_msec < ctx->limit_msec && numchunks < 32767)
+ return FALSE;
- /* Get the current position. */
- sigma_read_pos(&stoppos, &triggerpos);
+ hw_dev_acquisition_stop(sdi->index, session_data);
+
+ return FALSE;
+ } else if (ctx->state.state == SIGMA_DOWNLOAD) {
+ if (ctx->state.chunks_downloaded >= numchunks) {
+ /* End of samples. */
+ packet.type = SR_DF_END;
+ sr_session_bus(ctx->session_id, &packet);
+
+ ctx->state.state = SIGMA_IDLE;
- /* Read mode status. We will care for this later. */
- sigma_get_register(READ_MODE);
+ return TRUE;
+ }
- /* Download sample data. */
- for (curchunk = 0; curchunk < numchunks;) {
- newchunks = MIN(chunks_per_read, numchunks - curchunk);
+ newchunks = MIN(chunks_per_read,
+ numchunks - ctx->state.chunks_downloaded);
- g_message("Downloading sample data: %.0f %%",
- 100.0 * curchunk / numchunks);
+ sr_info("sigma: Downloading sample data: %.0f %%",
+ 100.0 * ctx->state.chunks_downloaded / numchunks);
- bufsz = sigma_read_dram(curchunk, newchunks, buf);
+ bufsz = sigma_read_dram(ctx->state.chunks_downloaded,
+ newchunks, buf, ctx);
+ /* TODO: Check bufsz. For now, just avoid compiler warnings. */
+ (void)bufsz;
/* Find first ts. */
- if (curchunk == 0)
- lastts = *(uint16_t *) buf - 1;
+ if (ctx->state.chunks_downloaded == 0) {
+ ctx->state.lastts = *(uint16_t *) buf - 1;
+ ctx->state.lastsample = 0;
+ }
/* Decode chunks and send them to sigrok. */
for (i = 0; i < newchunks; ++i) {
- decode_chunk_ts(buf + (i * CHUNK_SIZE),
- &lastts, &lastsample, user_data);
+ int limit_chunk = 0;
+
+ /* The last chunk may potentially be only in part. */
+ if (ctx->state.chunks_downloaded == numchunks - 1) {
+ /* Find the last valid timestamp */
+ limit_chunk = ctx->state.stoppos % 512 + ctx->state.lastts;
+ }
+
+ if (ctx->state.chunks_downloaded + i == ctx->state.triggerchunk)
+ decode_chunk_ts(buf + (i * CHUNK_SIZE),
+ &ctx->state.lastts,
+ &ctx->state.lastsample,
+ ctx->state.triggerpos & 0x1ff,
+ limit_chunk, session_data);
+ else
+ decode_chunk_ts(buf + (i * CHUNK_SIZE),
+ &ctx->state.lastts,
+ &ctx->state.lastsample,
+ -1, limit_chunk, session_data);
+
+ ++ctx->state.chunks_downloaded;
}
+ }
+
+ return TRUE;
+}
+
+/* Build a LUT entry used by the trigger functions. */
+static void build_lut_entry(uint16_t value, uint16_t mask, uint16_t *entry)
+{
+ int i, j, k, bit;
+
+ /* For each quad probe. */
+ for (i = 0; i < 4; ++i) {
+ entry[i] = 0xffff;
+
+ /* For each bit in LUT. */
+ for (j = 0; j < 16; ++j)
- curchunk += newchunks;
+ /* For each probe in quad. */
+ for (k = 0; k < 4; ++k) {
+ bit = 1 << (i * 4 + k);
+
+ /* Set bit in entry */
+ if ((mask & bit) &&
+ ((!(value & bit)) !=
+ (!(j & (1 << k)))))
+ entry[i] &= ~(1 << j);
+ }
}
+}
- /* End of data */
- packet.type = DF_END;
- packet.length = 0;
- session_bus(user_data, &packet);
+/* Add a logical function to LUT mask. */
+static void add_trigger_function(enum triggerop oper, enum triggerfunc func,
+ int index, int neg, uint16_t *mask)
+{
+ int i, j;
+ int x[2][2], tmp, a, b, aset, bset, rset;
- return TRUE;
+ memset(x, 0, 4 * sizeof(int));
+
+ /* Trigger detect condition. */
+ switch (oper) {
+ case OP_LEVEL:
+ x[0][1] = 1;
+ x[1][1] = 1;
+ break;
+ case OP_NOT:
+ x[0][0] = 1;
+ x[1][0] = 1;
+ break;
+ case OP_RISE:
+ x[0][1] = 1;
+ break;
+ case OP_FALL:
+ x[1][0] = 1;
+ break;
+ case OP_RISEFALL:
+ x[0][1] = 1;
+ x[1][0] = 1;
+ break;
+ case OP_NOTRISE:
+ x[1][1] = 1;
+ x[0][0] = 1;
+ x[1][0] = 1;
+ break;
+ case OP_NOTFALL:
+ x[1][1] = 1;
+ x[0][0] = 1;
+ x[0][1] = 1;
+ break;
+ case OP_NOTRISEFALL:
+ x[1][1] = 1;
+ x[0][0] = 1;
+ break;
+ }
+
+ /* Transpose if neg is set. */
+ if (neg) {
+ for (i = 0; i < 2; ++i) {
+ for (j = 0; j < 2; ++j) {
+ tmp = x[i][j];
+ x[i][j] = x[1-i][1-j];
+ x[1-i][1-j] = tmp;
+ }
+ }
+ }
+
+ /* Update mask with function. */
+ for (i = 0; i < 16; ++i) {
+ a = (i >> (2 * index + 0)) & 1;
+ b = (i >> (2 * index + 1)) & 1;
+
+ aset = (*mask >> i) & 1;
+ bset = x[b][a];
+
+ if (func == FUNC_AND || func == FUNC_NAND)
+ rset = aset & bset;
+ else if (func == FUNC_OR || func == FUNC_NOR)
+ rset = aset | bset;
+ else if (func == FUNC_XOR || func == FUNC_NXOR)
+ rset = aset ^ bset;
+
+ if (func == FUNC_NAND || func == FUNC_NOR || func == FUNC_NXOR)
+ rset = !rset;
+
+ *mask &= ~(1 << i);
+
+ if (rset)
+ *mask |= 1 << i;
+ }
}
-static int hw_start_acquisition(int device_index, gpointer session_device_id)
+/*
+ * Build trigger LUTs used by 50 MHz and lower sample rates for supporting
+ * simple pin change and state triggers. Only two transitions (rise/fall) can be
+ * set at any time, but a full mask and value can be set (0/1).
+ */
+static int build_basic_trigger(struct triggerlut *lut, struct context *ctx)
{
- struct sigrok_device_instance *sdi;
- struct datafeed_packet packet;
- struct datafeed_header header;
- uint8_t trigger_option[2] = { 0x38, 0x00 };
+ int i,j;
+ uint16_t masks[2] = { 0, 0 };
+
+ memset(lut, 0, sizeof(struct triggerlut));
+
+ /* Contant for simple triggers. */
+ lut->m4 = 0xa000;
- session_device_id = session_device_id;
+ /* Value/mask trigger support. */
+ build_lut_entry(ctx->trigger.simplevalue, ctx->trigger.simplemask,
+ lut->m2d);
- if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
- return SIGROK_ERR;
+ /* Rise/fall trigger support. */
+ for (i = 0, j = 0; i < 16; ++i) {
+ if (ctx->trigger.risingmask & (1 << i) ||
+ ctx->trigger.fallingmask & (1 << i))
+ masks[j++] = 1 << i;
+ }
+
+ build_lut_entry(masks[0], masks[0], lut->m0d);
+ build_lut_entry(masks[1], masks[1], lut->m1d);
+
+ /* Add glue logic */
+ if (masks[0] || masks[1]) {
+ /* Transition trigger. */
+ if (masks[0] & ctx->trigger.risingmask)
+ add_trigger_function(OP_RISE, FUNC_OR, 0, 0, &lut->m3);
+ if (masks[0] & ctx->trigger.fallingmask)
+ add_trigger_function(OP_FALL, FUNC_OR, 0, 0, &lut->m3);
+ if (masks[1] & ctx->trigger.risingmask)
+ add_trigger_function(OP_RISE, FUNC_OR, 1, 0, &lut->m3);
+ if (masks[1] & ctx->trigger.fallingmask)
+ add_trigger_function(OP_FALL, FUNC_OR, 1, 0, &lut->m3);
+ } else {
+ /* Only value/mask trigger. */
+ lut->m3 = 0xffff;
+ }
+
+ /* Triggertype: event. */
+ lut->params.selres = 3;
- device_index = device_index;
+ return SR_OK;
+}
- if (cur_firmware == -1) {
- /* Samplerate has not been set. Default to 200 MHz */
- set_samplerate(sdi, 200);
+static int hw_dev_acquisition_start(int dev_index, gpointer session_data)
+{
+ struct sr_dev_inst *sdi;
+ struct context *ctx;
+ struct sr_datafeed_packet packet;
+ struct sr_datafeed_header header;
+ struct clockselect_50 clockselect;
+ int frac, triggerpin, ret;
+ uint8_t triggerselect;
+ struct triggerinout triggerinout_conf;
+ struct triggerlut lut;
+
+ /* Avoid compiler warnings. */
+ (void)session_data;
+
+ if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
+ return SR_ERR;
+
+ ctx = sdi->priv;
+
+ /* If the samplerate has not been set, default to 200 kHz. */
+ if (ctx->cur_firmware == -1) {
+ if ((ret = set_samplerate(sdi, SR_KHZ(200))) != SR_OK)
+ return ret;
}
- /* Setup trigger (by trigger-in). */
- sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20);
+ /* Enter trigger programming mode. */
+ sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, ctx);
- /* More trigger setup. */
- sigma_write_register(WRITE_TRIGGER_OPTION,
- trigger_option, sizeof(trigger_option));
+ /* 100 and 200 MHz mode. */
+ if (ctx->cur_samplerate >= SR_MHZ(100)) {
+ sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, ctx);
- /* Trigger normal (falling edge). */
- sigma_set_register(WRITE_TRIGGER_SELECT1, 0x08);
+ /* Find which pin to trigger on from mask. */
+ for (triggerpin = 0; triggerpin < 8; ++triggerpin)
+ if ((ctx->trigger.risingmask | ctx->trigger.fallingmask) &
+ (1 << triggerpin))
+ break;
- /* Enable pins (200 MHz, 4 pins). */
- sigma_set_register(WRITE_CLOCK_SELECT, 0xf0);
+ /* Set trigger pin and light LED on trigger. */
+ triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);
- /* Setup maximum post trigger time. */
- sigma_set_register(WRITE_POST_TRIGGER, 0xff);
+ /* Default rising edge. */
+ if (ctx->trigger.fallingmask)
+ triggerselect |= 1 << 3;
- /* Start acqusition (software trigger start). */
- gettimeofday(&start_tv, 0);
- sigma_set_register(WRITE_MODE, 0x0d);
+ /* All other modes. */
+ } else if (ctx->cur_samplerate <= SR_MHZ(50)) {
+ build_basic_trigger(&lut, ctx);
- /* Add capture source. */
- source_add(0, G_IO_IN, 10, receive_data, session_device_id);
+ sigma_write_trigger_lut(&lut, ctx);
+
+ triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
+ }
- receive_data(0, 1, session_device_id);
+ /* Setup trigger in and out pins to default values. */
+ memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
+ triggerinout_conf.trgout_bytrigger = 1;
+ triggerinout_conf.trgout_enable = 1;
+
+ sigma_write_register(WRITE_TRIGGER_OPTION,
+ (uint8_t *) &triggerinout_conf,
+ sizeof(struct triggerinout), ctx);
+
+ /* Go back to normal mode. */
+ sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, ctx);
+
+ /* Set clock select register. */
+ if (ctx->cur_samplerate == SR_MHZ(200))
+ /* Enable 4 probes. */
+ sigma_set_register(WRITE_CLOCK_SELECT, 0xf0, ctx);
+ else if (ctx->cur_samplerate == SR_MHZ(100))
+ /* Enable 8 probes. */
+ sigma_set_register(WRITE_CLOCK_SELECT, 0x00, ctx);
+ else {
+ /*
+ * 50 MHz mode (or fraction thereof). Any fraction down to
+ * 50 MHz / 256 can be used, but is not supported by sigrok API.
+ */
+ frac = SR_MHZ(50) / ctx->cur_samplerate - 1;
+
+ clockselect.async = 0;
+ clockselect.fraction = frac;
+ clockselect.disabled_probes = 0;
+
+ sigma_write_register(WRITE_CLOCK_SELECT,
+ (uint8_t *) &clockselect,
+ sizeof(clockselect), ctx);
+ }
+
+ /* Setup maximum post trigger time. */
+ sigma_set_register(WRITE_POST_TRIGGER,
+ (ctx->capture_ratio * 255) / 100, ctx);
+
+ /* Start acqusition. */
+ gettimeofday(&ctx->start_tv, 0);
+ sigma_set_register(WRITE_MODE, 0x0d, ctx);
+
+ ctx->session_id = session_data;
/* Send header packet to the session bus. */
- packet.type = DF_HEADER;
- packet.length = sizeof(struct datafeed_header);
+ packet.type = SR_DF_HEADER;
packet.payload = &header;
header.feed_version = 1;
gettimeofday(&header.starttime, NULL);
- header.samplerate = cur_samplerate;
- header.protocol_id = PROTO_RAW;
- header.num_probes = 4;
- session_bus(session_device_id, &packet);
+ header.samplerate = ctx->cur_samplerate;
+ header.num_logic_probes = ctx->num_probes;
+ sr_session_bus(session_data, &packet);
+
+ /* Add capture source. */
+ sr_source_add(0, G_IO_IN, 10, receive_data, sdi);
- return SIGROK_OK;
+ ctx->state.state = SIGMA_CAPTURE;
+
+ return SR_OK;
}
-static void hw_stop_acquisition(int device_index, gpointer session_device_id)
+static int hw_dev_acquisition_stop(int dev_index, gpointer session_data)
{
- device_index = device_index;
- session_device_id = session_device_id;
+ struct sr_dev_inst *sdi;
+ struct context *ctx;
+ uint8_t modestatus;
+
+ /* Avoid compiler warnings. */
+ (void)session_data;
+
+ if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) {
+ sr_err("sigma: %s: sdi was NULL", __func__);
+ return SR_ERR_BUG;
+ }
+
+ if (!(ctx = sdi->priv)) {
+ sr_err("sigma: %s: sdi->priv was NULL", __func__);
+ return SR_ERR_BUG;
+ }
/* Stop acquisition. */
- sigma_set_register(WRITE_MODE, 0x11);
+ sigma_set_register(WRITE_MODE, 0x11, ctx);
+
+ /* Set SDRAM Read Enable. */
+ sigma_set_register(WRITE_MODE, 0x02, ctx);
+
+ /* Get the current position. */
+ sigma_read_pos(&ctx->state.stoppos, &ctx->state.triggerpos, ctx);
+
+ /* Check if trigger has fired. */
+ modestatus = sigma_get_register(READ_MODE, ctx);
+ if (modestatus & 0x20)
+ ctx->state.triggerchunk = ctx->state.triggerpos / 512;
+ else
+ ctx->state.triggerchunk = -1;
+
+ ctx->state.chunks_downloaded = 0;
+
+ ctx->state.state = SIGMA_DOWNLOAD;
- // XXX Set some state to indicate that data should be sent to sigrok
- // Now, we just wait for timeout
+ return SR_OK;
}
-struct device_plugin asix_sigma_plugin_info = {
- "asix-sigma",
- 1,
- hw_init,
- hw_cleanup,
- hw_opendev,
- hw_closedev,
- hw_get_device_info,
- hw_get_status,
- hw_get_capabilities,
- hw_set_configuration,
- hw_start_acquisition,
- hw_stop_acquisition
+SR_PRIV struct sr_dev_plugin asix_sigma_plugin_info = {
+ .name = "asix-sigma",
+ .longname = "ASIX SIGMA",
+ .api_version = 1,
+ .init = hw_init,
+ .cleanup = hw_cleanup,
+ .dev_open = hw_dev_open,
+ .dev_close = hw_dev_close,
+ .dev_info_get = hw_dev_info_get,
+ .dev_status_get = hw_dev_status_get,
+ .hwcap_get_all = hw_hwcap_get_all,
+ .dev_config_set = hw_dev_config_set,
+ .dev_acquisition_start = hw_dev_acquisition_start,
+ .dev_acquisition_stop = hw_dev_acquisition_stop,
};
projects / libsigrok.git / blobdiff