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Fix a few "value never read" scan-build warnings.
[libsigrok.git] / src / hardware / rigol-ds / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <config.h>
23#include <fcntl.h>
24#include <unistd.h>
25#include <stdlib.h>
26#include <string.h>
27#include <strings.h>
28#include <math.h>
29#include <glib.h>
30#include <libsigrok/libsigrok.h>
31#include "libsigrok-internal.h"
32#include "scpi.h"
33#include "protocol.h"
34
35static const uint32_t scanopts[] = {
36 SR_CONF_CONN,
37 SR_CONF_SERIALCOMM
38};
39
40static const uint32_t devopts[] = {
41 SR_CONF_OSCILLOSCOPE,
42 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
43 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
44 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
45 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
46 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
47 SR_CONF_NUM_HDIV | SR_CONF_GET,
48 SR_CONF_SAMPLERATE | SR_CONF_GET,
49 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
50};
51
52static const uint32_t analog_devopts[] = {
53 SR_CONF_NUM_VDIV | SR_CONF_GET,
54 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
55 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
56};
57
58static const uint64_t timebases[][2] = {
59 /* nanoseconds */
60 { 1, 1000000000 },
61 { 2, 1000000000 },
62 { 5, 1000000000 },
63 { 10, 1000000000 },
64 { 20, 1000000000 },
65 { 50, 1000000000 },
66 { 100, 1000000000 },
67 { 500, 1000000000 },
68 /* microseconds */
69 { 1, 1000000 },
70 { 2, 1000000 },
71 { 5, 1000000 },
72 { 10, 1000000 },
73 { 20, 1000000 },
74 { 50, 1000000 },
75 { 100, 1000000 },
76 { 200, 1000000 },
77 { 500, 1000000 },
78 /* milliseconds */
79 { 1, 1000 },
80 { 2, 1000 },
81 { 5, 1000 },
82 { 10, 1000 },
83 { 20, 1000 },
84 { 50, 1000 },
85 { 100, 1000 },
86 { 200, 1000 },
87 { 500, 1000 },
88 /* seconds */
89 { 1, 1 },
90 { 2, 1 },
91 { 5, 1 },
92 { 10, 1 },
93 { 20, 1 },
94 { 50, 1 },
95 { 100, 1 },
96 { 200, 1 },
97 { 500, 1 },
98 { 1000, 1 },
99};
100
101static const uint64_t vdivs[][2] = {
102 /* microvolts */
103 { 500, 1000000 },
104 /* millivolts */
105 { 1, 1000 },
106 { 2, 1000 },
107 { 5, 1000 },
108 { 10, 1000 },
109 { 20, 1000 },
110 { 50, 1000 },
111 { 100, 1000 },
112 { 200, 1000 },
113 { 500, 1000 },
114 /* volts */
115 { 1, 1 },
116 { 2, 1 },
117 { 5, 1 },
118 { 10, 1 },
119 { 20, 1 },
120 { 50, 1 },
121 { 100, 1 },
122};
123
124#define NUM_TIMEBASE ARRAY_SIZE(timebases)
125#define NUM_VDIV ARRAY_SIZE(vdivs)
126
127static const char *trigger_sources[] = {
128 "CH1",
129 "CH2",
130 "CH3",
131 "CH4",
132 "EXT",
133 "AC Line",
134 "D0",
135 "D1",
136 "D2",
137 "D3",
138 "D4",
139 "D5",
140 "D6",
141 "D7",
142 "D8",
143 "D9",
144 "D10",
145 "D11",
146 "D12",
147 "D13",
148 "D14",
149 "D15",
150};
151
152static const char *trigger_slopes[] = {
153 "r",
154 "f",
155};
156
157static const char *coupling[] = {
158 "AC",
159 "DC",
160 "GND",
161};
162
163/* Do not change the order of entries */
164static const char *data_sources[] = {
165 "Live",
166 "Memory",
167 "Segmented",
168};
169
170enum vendor {
171 RIGOL,
172 AGILENT,
173};
174
175enum series {
176 VS5000,
177 DS1000,
178 DS2000,
179 DS2000A,
180 DSO1000,
181 DS1000Z,
182};
183
184/* short name, full name */
185static const struct rigol_ds_vendor supported_vendors[] = {
186 [RIGOL] = {"Rigol", "Rigol Technologies"},
187 [AGILENT] = {"Agilent", "Agilent Technologies"},
188};
189
190#define VENDOR(x) &supported_vendors[x]
191/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
192 * live waveform samples, memory buffer samples */
193static const struct rigol_ds_series supported_series[] = {
194 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
195 {50, 1}, {2, 1000}, 14, 2048, 0},
196 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
197 {50, 1}, {2, 1000}, 12, 600, 1048576},
198 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
199 {500, 1}, {500, 1000000}, 14, 1400, 14000},
200 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
201 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
202 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
203 {50, 1}, {2, 1000}, 12, 600, 20480},
204 [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
205 {50, 1}, {1, 1000}, 12, 1200, 12000000},
206};
207
208#define SERIES(x) &supported_series[x]
209/* series, model, min timebase, analog channels, digital */
210static const struct rigol_ds_model supported_models[] = {
211 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
212 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
213 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
214 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
215 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
216 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
217 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
218 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
219 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
220 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
221 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
222 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
223 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
224 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
225 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
226 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
227 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
228 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
229 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
230 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
231 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
232 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
233 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
234 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
235 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
236 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
237 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
238 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
239 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
240 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
241 {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
242 {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
243 {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
244 {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
245 {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
246 {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
247 {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
248 {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
249 {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
250};
251
252SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
253
254static void clear_helper(void *priv)
255{
256 struct dev_context *devc;
257 unsigned int i;
258
259 devc = priv;
260 g_free(devc->data);
261 g_free(devc->buffer);
262 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
263 g_free(devc->coupling[i]);
264 g_free(devc->trigger_source);
265 g_free(devc->trigger_slope);
266 g_free(devc->analog_groups);
267 g_free(devc);
268}
269
270static int dev_clear(const struct sr_dev_driver *di)
271{
272 return std_dev_clear(di, clear_helper);
273}
274
275static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
276{
277 return std_init(sr_ctx, di, LOG_PREFIX);
278}
279
280static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
281{
282 struct dev_context *devc;
283 struct sr_dev_inst *sdi;
284 struct sr_scpi_hw_info *hw_info;
285 struct sr_channel *ch;
286 long n[3];
287 unsigned int i;
288 const struct rigol_ds_model *model = NULL;
289 gchar *channel_name, **version;
290
291 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
292 sr_info("Couldn't get IDN response, retrying.");
293 sr_scpi_close(scpi);
294 sr_scpi_open(scpi);
295 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
296 sr_info("Couldn't get IDN response.");
297 return NULL;
298 }
299 }
300
301 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
302 if (!g_ascii_strcasecmp(hw_info->manufacturer,
303 supported_models[i].series->vendor->full_name) &&
304 !strcmp(hw_info->model, supported_models[i].name)) {
305 model = &supported_models[i];
306 break;
307 }
308 }
309
310 if (!model) {
311 sr_scpi_hw_info_free(hw_info);
312 return NULL;
313 }
314
315 sdi = g_malloc0(sizeof(struct sr_dev_inst));
316 sdi->status = SR_ST_ACTIVE;
317 sdi->vendor = g_strdup(model->series->vendor->name);
318 sdi->model = g_strdup(model->name);
319 sdi->version = g_strdup(hw_info->firmware_version);
320 sdi->conn = scpi;
321 sdi->driver = &rigol_ds_driver_info;
322 sdi->inst_type = SR_INST_SCPI;
323 sdi->serial_num = g_strdup(hw_info->serial_number);
324 devc = g_malloc0(sizeof(struct dev_context));
325 devc->limit_frames = 0;
326 devc->model = model;
327 devc->format = model->series->format;
328
329 /* DS1000 models with firmware before 0.2.4 used the old data format. */
330 if (model->series == SERIES(DS1000)) {
331 version = g_strsplit(hw_info->firmware_version, ".", 0);
332 do {
333 if (!version[0] || !version[1] || !version[2])
334 break;
335 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
336 break;
337 for (i = 0; i < 3; i++) {
338 if (sr_atol(version[i], &n[i]) != SR_OK)
339 break;
340 }
341 if (i != 3)
342 break;
343 scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
344 if (scpi->firmware_version < 24) {
345 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
346 devc->format = FORMAT_RAW;
347 }
348 break;
349 } while (0);
350 g_strfreev(version);
351 }
352
353 sr_scpi_hw_info_free(hw_info);
354
355 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
356 model->analog_channels);
357
358 for (i = 0; i < model->analog_channels; i++) {
359 channel_name = g_strdup_printf("CH%d", i + 1);
360 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
361
362 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
363
364 devc->analog_groups[i]->name = channel_name;
365 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
366 sdi->channel_groups = g_slist_append(sdi->channel_groups,
367 devc->analog_groups[i]);
368 }
369
370 if (devc->model->has_digital) {
371 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
372
373 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
374 channel_name = g_strdup_printf("D%d", i);
375 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
376 g_free(channel_name);
377 devc->digital_group->channels = g_slist_append(
378 devc->digital_group->channels, ch);
379 }
380 devc->digital_group->name = g_strdup("LA");
381 sdi->channel_groups = g_slist_append(sdi->channel_groups,
382 devc->digital_group);
383 }
384
385 for (i = 0; i < NUM_TIMEBASE; i++) {
386 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
387 devc->timebases = &timebases[i];
388 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
389 devc->num_timebases = &timebases[i] - devc->timebases + 1;
390 }
391
392 for (i = 0; i < NUM_VDIV; i++) {
393 if (!memcmp(&devc->model->series->min_vdiv,
394 &vdivs[i], sizeof(uint64_t[2]))) {
395 devc->vdivs = &vdivs[i];
396 devc->num_vdivs = NUM_VDIV - i;
397 }
398 }
399
400 devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
401 devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
402
403 devc->data_source = DATA_SOURCE_LIVE;
404
405 sdi->priv = devc;
406
407 return sdi;
408}
409
410static GSList *scan(struct sr_dev_driver *di, GSList *options)
411{
412 return sr_scpi_scan(di->context, options, probe_device);
413}
414
415static GSList *dev_list(const struct sr_dev_driver *di)
416{
417 return ((struct drv_context *)(di->context))->instances;
418}
419
420static int dev_open(struct sr_dev_inst *sdi)
421{
422 int ret;
423 struct sr_scpi_dev_inst *scpi = sdi->conn;
424
425 if ((ret = sr_scpi_open(scpi)) < 0) {
426 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
427 return SR_ERR;
428 }
429
430 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
431 sr_err("Failed to get device config: %s.", sr_strerror(ret));
432 return SR_ERR;
433 }
434
435 sdi->status = SR_ST_ACTIVE;
436
437 return SR_OK;
438}
439
440static int dev_close(struct sr_dev_inst *sdi)
441{
442 struct sr_scpi_dev_inst *scpi;
443 struct dev_context *devc;
444
445 if (sdi->status != SR_ST_ACTIVE)
446 return SR_ERR_DEV_CLOSED;
447
448 scpi = sdi->conn;
449 devc = sdi->priv;
450
451 if (devc->model->series->protocol == PROTOCOL_V2)
452 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
453
454 if (scpi) {
455 if (sr_scpi_close(scpi) < 0)
456 return SR_ERR;
457 sdi->status = SR_ST_INACTIVE;
458 }
459
460 return SR_OK;
461}
462
463static int cleanup(const struct sr_dev_driver *di)
464{
465 return dev_clear(di);
466}
467
468static int analog_frame_size(const struct sr_dev_inst *sdi)
469{
470 struct dev_context *devc = sdi->priv;
471 struct sr_channel *ch;
472 int analog_channels = 0;
473 GSList *l;
474
475 for (l = sdi->channels; l; l = l->next) {
476 ch = l->data;
477 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
478 analog_channels++;
479 }
480
481 if (analog_channels == 0)
482 return 0;
483
484 switch (devc->data_source) {
485 case DATA_SOURCE_LIVE:
486 return devc->model->series->live_samples;
487 case DATA_SOURCE_MEMORY:
488 return devc->model->series->buffer_samples / analog_channels;
489 default:
490 return 0;
491 }
492}
493
494static int digital_frame_size(const struct sr_dev_inst *sdi)
495{
496 struct dev_context *devc = sdi->priv;
497
498 switch (devc->data_source) {
499 case DATA_SOURCE_LIVE:
500 return devc->model->series->live_samples * 2;
501 case DATA_SOURCE_MEMORY:
502 return devc->model->series->buffer_samples * 2;
503 default:
504 return 0;
505 }
506}
507
508static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
509 const struct sr_channel_group *cg)
510{
511 struct dev_context *devc;
512 struct sr_channel *ch;
513 const char *tmp_str;
514 uint64_t samplerate;
515 int analog_channel = -1;
516 float smallest_diff = INFINITY;
517 int idx = -1;
518 unsigned i;
519
520 if (!sdi || !(devc = sdi->priv))
521 return SR_ERR_ARG;
522
523 /* If a channel group is specified, it must be a valid one. */
524 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
525 sr_err("Invalid channel group specified.");
526 return SR_ERR;
527 }
528
529 if (cg) {
530 ch = g_slist_nth_data(cg->channels, 0);
531 if (!ch)
532 return SR_ERR;
533 if (ch->type == SR_CHANNEL_ANALOG) {
534 if (ch->name[2] < '1' || ch->name[2] > '4')
535 return SR_ERR;
536 analog_channel = ch->name[2] - '1';
537 }
538 }
539
540 switch (key) {
541 case SR_CONF_NUM_HDIV:
542 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
543 break;
544 case SR_CONF_NUM_VDIV:
545 *data = g_variant_new_int32(devc->num_vdivs);
546 break;
547 case SR_CONF_DATA_SOURCE:
548 if (devc->data_source == DATA_SOURCE_LIVE)
549 *data = g_variant_new_string("Live");
550 else if (devc->data_source == DATA_SOURCE_MEMORY)
551 *data = g_variant_new_string("Memory");
552 else
553 *data = g_variant_new_string("Segmented");
554 break;
555 case SR_CONF_SAMPLERATE:
556 if (devc->data_source == DATA_SOURCE_LIVE) {
557 samplerate = analog_frame_size(sdi) /
558 (devc->timebase * devc->model->series->num_horizontal_divs);
559 *data = g_variant_new_uint64(samplerate);
560 } else {
561 sr_dbg("Unknown data source: %d.", devc->data_source);
562 return SR_ERR_NA;
563 }
564 break;
565 case SR_CONF_TRIGGER_SOURCE:
566 if (!strcmp(devc->trigger_source, "ACL"))
567 tmp_str = "AC Line";
568 else if (!strcmp(devc->trigger_source, "CHAN1"))
569 tmp_str = "CH1";
570 else if (!strcmp(devc->trigger_source, "CHAN2"))
571 tmp_str = "CH2";
572 else if (!strcmp(devc->trigger_source, "CHAN3"))
573 tmp_str = "CH3";
574 else if (!strcmp(devc->trigger_source, "CHAN4"))
575 tmp_str = "CH4";
576 else
577 tmp_str = devc->trigger_source;
578 *data = g_variant_new_string(tmp_str);
579 break;
580 case SR_CONF_TRIGGER_SLOPE:
581 if (!strncmp(devc->trigger_slope, "POS", 3)) {
582 tmp_str = "r";
583 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
584 tmp_str = "f";
585 } else {
586 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
587 return SR_ERR_NA;
588 }
589 *data = g_variant_new_string(tmp_str);
590 break;
591 case SR_CONF_TIMEBASE:
592 for (i = 0; i < devc->num_timebases; i++) {
593 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
594 float diff = fabs(devc->timebase - tb);
595 if (diff < smallest_diff) {
596 smallest_diff = diff;
597 idx = i;
598 }
599 }
600 if (idx < 0) {
601 sr_dbg("Negative timebase index: %d.", idx);
602 return SR_ERR_NA;
603 }
604 *data = g_variant_new("(tt)", devc->timebases[idx][0],
605 devc->timebases[idx][1]);
606 break;
607 case SR_CONF_VDIV:
608 if (analog_channel < 0) {
609 sr_dbg("Negative analog channel: %d.", analog_channel);
610 return SR_ERR_NA;
611 }
612 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
613 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
614 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
615 if (diff < smallest_diff) {
616 smallest_diff = diff;
617 idx = i;
618 }
619 }
620 if (idx < 0) {
621 sr_dbg("Negative vdiv index: %d.", idx);
622 return SR_ERR_NA;
623 }
624 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
625 break;
626 case SR_CONF_COUPLING:
627 if (analog_channel < 0) {
628 sr_dbg("Negative analog channel: %d.", analog_channel);
629 return SR_ERR_NA;
630 }
631 *data = g_variant_new_string(devc->coupling[analog_channel]);
632 break;
633 default:
634 return SR_ERR_NA;
635 }
636
637 return SR_OK;
638}
639
640static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
641 const struct sr_channel_group *cg)
642{
643 struct dev_context *devc;
644 uint64_t p, q;
645 double t_dbl;
646 unsigned int i, j;
647 int ret;
648 const char *tmp_str;
649 char buffer[16];
650
651 if (!(devc = sdi->priv))
652 return SR_ERR_ARG;
653
654 if (sdi->status != SR_ST_ACTIVE)
655 return SR_ERR_DEV_CLOSED;
656
657 /* If a channel group is specified, it must be a valid one. */
658 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
659 sr_err("Invalid channel group specified.");
660 return SR_ERR;
661 }
662
663 ret = SR_OK;
664 switch (key) {
665 case SR_CONF_LIMIT_FRAMES:
666 devc->limit_frames = g_variant_get_uint64(data);
667 break;
668 case SR_CONF_TRIGGER_SLOPE:
669 tmp_str = g_variant_get_string(data, NULL);
670
671 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
672 sr_err("Unknown trigger slope: '%s'.",
673 (tmp_str) ? tmp_str : "NULL");
674 return SR_ERR_ARG;
675 }
676
677 g_free(devc->trigger_slope);
678 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
679 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
680 break;
681 case SR_CONF_HORIZ_TRIGGERPOS:
682 t_dbl = g_variant_get_double(data);
683 if (t_dbl < 0.0 || t_dbl > 1.0) {
684 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
685 return SR_ERR;
686 }
687 devc->horiz_triggerpos = t_dbl;
688 /* We have the trigger offset as a percentage of the frame, but
689 * need to express this in seconds. */
690 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
691 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
692 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
693 break;
694 case SR_CONF_TIMEBASE:
695 g_variant_get(data, "(tt)", &p, &q);
696 for (i = 0; i < devc->num_timebases; i++) {
697 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
698 devc->timebase = (float)p / q;
699 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
700 devc->timebase);
701 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
702 break;
703 }
704 }
705 if (i == devc->num_timebases) {
706 sr_err("Invalid timebase index: %d.", i);
707 ret = SR_ERR_ARG;
708 }
709 break;
710 case SR_CONF_TRIGGER_SOURCE:
711 tmp_str = g_variant_get_string(data, NULL);
712 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
713 if (!strcmp(trigger_sources[i], tmp_str)) {
714 g_free(devc->trigger_source);
715 devc->trigger_source = g_strdup(trigger_sources[i]);
716 if (!strcmp(devc->trigger_source, "AC Line"))
717 tmp_str = "ACL";
718 else if (!strcmp(devc->trigger_source, "CH1"))
719 tmp_str = "CHAN1";
720 else if (!strcmp(devc->trigger_source, "CH2"))
721 tmp_str = "CHAN2";
722 else if (!strcmp(devc->trigger_source, "CH3"))
723 tmp_str = "CHAN3";
724 else if (!strcmp(devc->trigger_source, "CH4"))
725 tmp_str = "CHAN4";
726 else
727 tmp_str = (char *)devc->trigger_source;
728 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
729 break;
730 }
731 }
732 if (i == ARRAY_SIZE(trigger_sources)) {
733 sr_err("Invalid trigger source index: %d.", i);
734 ret = SR_ERR_ARG;
735 }
736 break;
737 case SR_CONF_VDIV:
738 if (!cg) {
739 sr_err("No channel group specified.");
740 return SR_ERR_CHANNEL_GROUP;
741 }
742 g_variant_get(data, "(tt)", &p, &q);
743 for (i = 0; i < devc->model->analog_channels; i++) {
744 if (cg == devc->analog_groups[i]) {
745 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
746 if (vdivs[j][0] != p || vdivs[j][1] != q)
747 continue;
748 devc->vdiv[i] = (float)p / q;
749 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
750 devc->vdiv[i]);
751 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
752 buffer);
753 }
754 sr_err("Invalid vdiv index: %d.", j);
755 return SR_ERR_ARG;
756 }
757 }
758 sr_dbg("Didn't set vdiv, unknown channel(group).");
759 return SR_ERR_NA;
760 case SR_CONF_COUPLING:
761 if (!cg) {
762 sr_err("No channel group specified.");
763 return SR_ERR_CHANNEL_GROUP;
764 }
765 tmp_str = g_variant_get_string(data, NULL);
766 for (i = 0; i < devc->model->analog_channels; i++) {
767 if (cg == devc->analog_groups[i]) {
768 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
769 if (!strcmp(tmp_str, coupling[j])) {
770 g_free(devc->coupling[i]);
771 devc->coupling[i] = g_strdup(coupling[j]);
772 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
773 devc->coupling[i]);
774 }
775 }
776 sr_err("Invalid coupling index: %d.", j);
777 return SR_ERR_ARG;
778 }
779 }
780 sr_dbg("Didn't set coupling, unknown channel(group).");
781 return SR_ERR_NA;
782 case SR_CONF_DATA_SOURCE:
783 tmp_str = g_variant_get_string(data, NULL);
784 if (!strcmp(tmp_str, "Live"))
785 devc->data_source = DATA_SOURCE_LIVE;
786 else if (devc->model->series->protocol >= PROTOCOL_V2
787 && !strcmp(tmp_str, "Memory"))
788 devc->data_source = DATA_SOURCE_MEMORY;
789 else if (devc->model->series->protocol >= PROTOCOL_V3
790 && !strcmp(tmp_str, "Segmented"))
791 devc->data_source = DATA_SOURCE_SEGMENTED;
792 else {
793 sr_err("Unknown data source: '%s'.", tmp_str);
794 return SR_ERR;
795 }
796 break;
797 default:
798 return SR_ERR_NA;
799 }
800
801 return ret;
802}
803
804static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
805 const struct sr_channel_group *cg)
806{
807 GVariant *tuple, *rational[2];
808 GVariantBuilder gvb;
809 unsigned int i;
810 struct dev_context *devc = NULL;
811
812 if (key == SR_CONF_SCAN_OPTIONS) {
813 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
814 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
815 return SR_OK;
816 } else if (key == SR_CONF_DEVICE_OPTIONS && !cg) {
817 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
818 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
819 return SR_OK;
820 }
821
822 /* Every other option requires a valid device instance. */
823 if (!sdi || !(devc = sdi->priv))
824 return SR_ERR_ARG;
825
826 /* If a channel group is specified, it must be a valid one. */
827 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
828 sr_err("Invalid channel group specified.");
829 return SR_ERR;
830 }
831
832 switch (key) {
833 case SR_CONF_DEVICE_OPTIONS:
834 if (!cg) {
835 sr_err("No channel group specified.");
836 return SR_ERR_CHANNEL_GROUP;
837 }
838 if (cg == devc->digital_group) {
839 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
840 NULL, 0, sizeof(uint32_t));
841 return SR_OK;
842 } else {
843 for (i = 0; i < devc->model->analog_channels; i++) {
844 if (cg == devc->analog_groups[i]) {
845 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
846 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
847 return SR_OK;
848 }
849 }
850 return SR_ERR_NA;
851 }
852 break;
853 case SR_CONF_COUPLING:
854 if (!cg) {
855 sr_err("No channel group specified.");
856 return SR_ERR_CHANNEL_GROUP;
857 }
858 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
859 break;
860 case SR_CONF_VDIV:
861 if (!devc)
862 /* Can't know this until we have the exact model. */
863 return SR_ERR_ARG;
864 if (!cg) {
865 sr_err("No channel group specified.");
866 return SR_ERR_CHANNEL_GROUP;
867 }
868 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
869 for (i = 0; i < devc->num_vdivs; i++) {
870 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
871 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
872 tuple = g_variant_new_tuple(rational, 2);
873 g_variant_builder_add_value(&gvb, tuple);
874 }
875 *data = g_variant_builder_end(&gvb);
876 break;
877 case SR_CONF_TIMEBASE:
878 if (!devc)
879 /* Can't know this until we have the exact model. */
880 return SR_ERR_ARG;
881 if (devc->num_timebases <= 0)
882 return SR_ERR_NA;
883 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
884 for (i = 0; i < devc->num_timebases; i++) {
885 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
886 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
887 tuple = g_variant_new_tuple(rational, 2);
888 g_variant_builder_add_value(&gvb, tuple);
889 }
890 *data = g_variant_builder_end(&gvb);
891 break;
892 case SR_CONF_TRIGGER_SOURCE:
893 if (!devc)
894 /* Can't know this until we have the exact model. */
895 return SR_ERR_ARG;
896 *data = g_variant_new_strv(trigger_sources,
897 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
898 break;
899 case SR_CONF_TRIGGER_SLOPE:
900 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
901 break;
902 case SR_CONF_DATA_SOURCE:
903 if (!devc)
904 /* Can't know this until we have the exact model. */
905 return SR_ERR_ARG;
906 switch (devc->model->series->protocol) {
907 case PROTOCOL_V1:
908 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
909 break;
910 case PROTOCOL_V2:
911 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
912 break;
913 default:
914 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
915 break;
916 }
917 break;
918 default:
919 return SR_ERR_NA;
920 }
921
922 return SR_OK;
923}
924
925static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
926{
927 struct sr_scpi_dev_inst *scpi;
928 struct dev_context *devc;
929 struct sr_channel *ch;
930 struct sr_datafeed_packet packet;
931 gboolean some_digital;
932 GSList *l;
933
934 if (sdi->status != SR_ST_ACTIVE)
935 return SR_ERR_DEV_CLOSED;
936
937 scpi = sdi->conn;
938 devc = sdi->priv;
939
940 devc->num_frames = 0;
941
942 some_digital = FALSE;
943 for (l = sdi->channels; l; l = l->next) {
944 ch = l->data;
945 sr_dbg("handling channel %s", ch->name);
946 if (ch->type == SR_CHANNEL_ANALOG) {
947 if (ch->enabled)
948 devc->enabled_channels = g_slist_append(
949 devc->enabled_channels, ch);
950 if (ch->enabled != devc->analog_channels[ch->index]) {
951 /* Enabled channel is currently disabled, or vice versa. */
952 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
953 ch->enabled ? "ON" : "OFF") != SR_OK)
954 return SR_ERR;
955 devc->analog_channels[ch->index] = ch->enabled;
956 }
957 } else if (ch->type == SR_CHANNEL_LOGIC) {
958 /* Only one list entry for DS1000D series. All channels are retrieved
959 * together when this entry is processed. */
960 if (ch->enabled && (
961 devc->model->series->protocol > PROTOCOL_V2 ||
962 !some_digital))
963 devc->enabled_channels = g_slist_append(
964 devc->enabled_channels, ch);
965 if (ch->enabled) {
966 some_digital = TRUE;
967 /* Turn on LA module if currently off. */
968 if (!devc->la_enabled) {
969 if (rigol_ds_config_set(sdi,
970 devc->model->series->protocol >= PROTOCOL_V4 ?
971 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
972 return SR_ERR;
973 devc->la_enabled = TRUE;
974 }
975 }
976 if (ch->enabled != devc->digital_channels[ch->index]) {
977 /* Enabled channel is currently disabled, or vice versa. */
978 if (rigol_ds_config_set(sdi,
979 devc->model->series->protocol >= PROTOCOL_V4 ?
980 ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
981 ch->enabled ? "ON" : "OFF") != SR_OK)
982 return SR_ERR;
983 devc->digital_channels[ch->index] = ch->enabled;
984 }
985 }
986 }
987
988 if (!devc->enabled_channels)
989 return SR_ERR;
990
991 /* Turn off LA module if on and no digital channels selected. */
992 if (devc->la_enabled && !some_digital)
993 if (rigol_ds_config_set(sdi,
994 devc->model->series->protocol >= PROTOCOL_V4 ?
995 ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
996 return SR_ERR;
997
998 /* Set memory mode. */
999 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
1000 sr_err("Data source 'Segmented' not yet supported");
1001 return SR_ERR;
1002 }
1003
1004 devc->analog_frame_size = analog_frame_size(sdi);
1005 devc->digital_frame_size = digital_frame_size(sdi);
1006
1007 switch (devc->model->series->protocol) {
1008 case PROTOCOL_V2:
1009 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
1010 return SR_ERR;
1011 break;
1012 case PROTOCOL_V3:
1013 /* Apparently for the DS2000 the memory
1014 * depth can only be set in Running state -
1015 * this matches the behaviour of the UI. */
1016 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1017 return SR_ERR;
1018 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1019 devc->analog_frame_size) != SR_OK)
1020 return SR_ERR;
1021 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1022 return SR_ERR;
1023 break;
1024 default:
1025 break;
1026 }
1027
1028 if (devc->data_source == DATA_SOURCE_LIVE)
1029 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1030 return SR_ERR;
1031
1032 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1033 rigol_ds_receive, (void *)sdi);
1034
1035 /* Send header packet to the session bus. */
1036 std_session_send_df_header(cb_data, LOG_PREFIX);
1037
1038 devc->channel_entry = devc->enabled_channels;
1039
1040 if (rigol_ds_capture_start(sdi) != SR_OK)
1041 return SR_ERR;
1042
1043 /* Start of first frame. */
1044 packet.type = SR_DF_FRAME_BEGIN;
1045 sr_session_send(cb_data, &packet);
1046
1047 return SR_OK;
1048}
1049
1050static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
1051{
1052 struct dev_context *devc;
1053 struct sr_scpi_dev_inst *scpi;
1054 struct sr_datafeed_packet packet;
1055
1056 (void)cb_data;
1057
1058 devc = sdi->priv;
1059
1060 if (sdi->status != SR_ST_ACTIVE) {
1061 sr_err("Device inactive, can't stop acquisition.");
1062 return SR_ERR;
1063 }
1064
1065 /* End of last frame. */
1066 packet.type = SR_DF_END;
1067 sr_session_send(sdi, &packet);
1068
1069 g_slist_free(devc->enabled_channels);
1070 devc->enabled_channels = NULL;
1071 scpi = sdi->conn;
1072 sr_scpi_source_remove(sdi->session, scpi);
1073
1074 return SR_OK;
1075}
1076
1077SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1078 .name = "rigol-ds",
1079 .longname = "Rigol DS",
1080 .api_version = 1,
1081 .init = init,
1082 .cleanup = cleanup,
1083 .scan = scan,
1084 .dev_list = dev_list,
1085 .dev_clear = dev_clear,
1086 .config_get = config_get,
1087 .config_set = config_set,
1088 .config_list = config_list,
1089 .dev_open = dev_open,
1090 .dev_close = dev_close,
1091 .dev_acquisition_start = dev_acquisition_start,
1092 .dev_acquisition_stop = dev_acquisition_stop,
1093 .context = NULL,
1094};
Hardware access and backend lib