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sr_dev_clear(): Always free sdi->priv (devc).
[libsigrok.git] / src / hardware / rigol-ds / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <config.h>
23#include <fcntl.h>
24#include <unistd.h>
25#include <stdlib.h>
26#include <string.h>
27#include <strings.h>
28#include <math.h>
29#include <glib.h>
30#include <libsigrok/libsigrok.h>
31#include "libsigrok-internal.h"
32#include "scpi.h"
33#include "protocol.h"
34
35static const uint32_t scanopts[] = {
36 SR_CONF_CONN,
37 SR_CONF_SERIALCOMM
38};
39
40static const uint32_t drvopts[] = {
41 SR_CONF_OSCILLOSCOPE,
42};
43
44static const uint32_t devopts[] = {
45 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
46 SR_CONF_SAMPLERATE | SR_CONF_GET,
47 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
48 SR_CONF_NUM_HDIV | SR_CONF_GET,
49 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
50 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
53 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54};
55
56static const uint32_t analog_devopts[] = {
57 SR_CONF_NUM_VDIV | SR_CONF_GET,
58 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
59 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
60 SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
61};
62
63static const uint64_t timebases[][2] = {
64 /* nanoseconds */
65 { 1, 1000000000 },
66 { 2, 1000000000 },
67 { 5, 1000000000 },
68 { 10, 1000000000 },
69 { 20, 1000000000 },
70 { 50, 1000000000 },
71 { 100, 1000000000 },
72 { 500, 1000000000 },
73 /* microseconds */
74 { 1, 1000000 },
75 { 2, 1000000 },
76 { 5, 1000000 },
77 { 10, 1000000 },
78 { 20, 1000000 },
79 { 50, 1000000 },
80 { 100, 1000000 },
81 { 200, 1000000 },
82 { 500, 1000000 },
83 /* milliseconds */
84 { 1, 1000 },
85 { 2, 1000 },
86 { 5, 1000 },
87 { 10, 1000 },
88 { 20, 1000 },
89 { 50, 1000 },
90 { 100, 1000 },
91 { 200, 1000 },
92 { 500, 1000 },
93 /* seconds */
94 { 1, 1 },
95 { 2, 1 },
96 { 5, 1 },
97 { 10, 1 },
98 { 20, 1 },
99 { 50, 1 },
100 { 100, 1 },
101 { 200, 1 },
102 { 500, 1 },
103 { 1000, 1 },
104};
105
106static const uint64_t vdivs[][2] = {
107 /* microvolts */
108 { 500, 1000000 },
109 /* millivolts */
110 { 1, 1000 },
111 { 2, 1000 },
112 { 5, 1000 },
113 { 10, 1000 },
114 { 20, 1000 },
115 { 50, 1000 },
116 { 100, 1000 },
117 { 200, 1000 },
118 { 500, 1000 },
119 /* volts */
120 { 1, 1 },
121 { 2, 1 },
122 { 5, 1 },
123 { 10, 1 },
124 { 20, 1 },
125 { 50, 1 },
126 { 100, 1 },
127};
128
129#define NUM_TIMEBASE ARRAY_SIZE(timebases)
130#define NUM_VDIV ARRAY_SIZE(vdivs)
131
132static const char *trigger_sources[] = {
133 "CH1",
134 "CH2",
135 "CH3",
136 "CH4",
137 "EXT",
138 "AC Line",
139 "D0",
140 "D1",
141 "D2",
142 "D3",
143 "D4",
144 "D5",
145 "D6",
146 "D7",
147 "D8",
148 "D9",
149 "D10",
150 "D11",
151 "D12",
152 "D13",
153 "D14",
154 "D15",
155};
156
157static const char *trigger_slopes[] = {
158 "r",
159 "f",
160};
161
162static const char *coupling[] = {
163 "AC",
164 "DC",
165 "GND",
166};
167
168static const uint64_t probe_factor[] = {
169 1,
170 2,
171 5,
172 10,
173 20,
174 50,
175 100,
176 200,
177 500,
178 1000,
179};
180
181/* Do not change the order of entries */
182static const char *data_sources[] = {
183 "Live",
184 "Memory",
185 "Segmented",
186};
187
188enum vendor {
189 RIGOL,
190 AGILENT,
191};
192
193enum series {
194 VS5000,
195 DS1000,
196 DS2000,
197 DS2000A,
198 DSO1000,
199 DS1000Z,
200};
201
202/* short name, full name */
203static const struct rigol_ds_vendor supported_vendors[] = {
204 [RIGOL] = {"Rigol", "Rigol Technologies"},
205 [AGILENT] = {"Agilent", "Agilent Technologies"},
206};
207
208#define VENDOR(x) &supported_vendors[x]
209/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
210 * live waveform samples, memory buffer samples */
211static const struct rigol_ds_series supported_series[] = {
212 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
213 {50, 1}, {2, 1000}, 14, 2048, 0},
214 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
215 {50, 1}, {2, 1000}, 12, 600, 1048576},
216 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
217 {500, 1}, {500, 1000000}, 14, 1400, 14000},
218 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
219 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
220 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
221 {50, 1}, {2, 1000}, 12, 600, 20480},
222 [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
223 {50, 1}, {1, 1000}, 12, 1200, 12000000},
224};
225
226#define SERIES(x) &supported_series[x]
227/* series, model, min timebase, analog channels, digital */
228static const struct rigol_ds_model supported_models[] = {
229 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
230 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
231 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
232 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
233 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
234 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
235 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
236 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
237 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
238 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
239 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
240 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
241 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
242 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
243 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
244 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
245 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
246 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
247 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
248 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
249 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
250 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
251 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
252 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
253 {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, 2, true},
254 {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, 2, true},
255 {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, 2, true},
256 {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, 2, true},
257 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
258 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
259 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
260 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
261 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
262 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
263 {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
264 {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
265 {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
266 {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
267 {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
268 {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, 4, false},
269 {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, 4, false},
270 {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
271 {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
272 {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
273 {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
274};
275
276static struct sr_dev_driver rigol_ds_driver_info;
277
278static void clear_helper(void *priv)
279{
280 struct dev_context *devc;
281 unsigned int i;
282
283 devc = priv;
284 g_free(devc->data);
285 g_free(devc->buffer);
286 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
287 g_free(devc->coupling[i]);
288 g_free(devc->trigger_source);
289 g_free(devc->trigger_slope);
290 g_free(devc->analog_groups);
291}
292
293static int dev_clear(const struct sr_dev_driver *di)
294{
295 return std_dev_clear_with_callback(di, clear_helper);
296}
297
298static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
299{
300 struct dev_context *devc;
301 struct sr_dev_inst *sdi;
302 struct sr_scpi_hw_info *hw_info;
303 struct sr_channel *ch;
304 long n[3];
305 unsigned int i;
306 const struct rigol_ds_model *model = NULL;
307 gchar *channel_name, **version;
308
309 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
310 sr_info("Couldn't get IDN response, retrying.");
311 sr_scpi_close(scpi);
312 sr_scpi_open(scpi);
313 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
314 sr_info("Couldn't get IDN response.");
315 return NULL;
316 }
317 }
318
319 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
320 if (!g_ascii_strcasecmp(hw_info->manufacturer,
321 supported_models[i].series->vendor->full_name) &&
322 !strcmp(hw_info->model, supported_models[i].name)) {
323 model = &supported_models[i];
324 break;
325 }
326 }
327
328 if (!model) {
329 sr_scpi_hw_info_free(hw_info);
330 return NULL;
331 }
332
333 sdi = g_malloc0(sizeof(struct sr_dev_inst));
334 sdi->vendor = g_strdup(model->series->vendor->name);
335 sdi->model = g_strdup(model->name);
336 sdi->version = g_strdup(hw_info->firmware_version);
337 sdi->conn = scpi;
338 sdi->driver = &rigol_ds_driver_info;
339 sdi->inst_type = SR_INST_SCPI;
340 sdi->serial_num = g_strdup(hw_info->serial_number);
341 devc = g_malloc0(sizeof(struct dev_context));
342 devc->limit_frames = 0;
343 devc->model = model;
344 devc->format = model->series->format;
345
346 /* DS1000 models with firmware before 0.2.4 used the old data format. */
347 if (model->series == SERIES(DS1000)) {
348 version = g_strsplit(hw_info->firmware_version, ".", 0);
349 do {
350 if (!version[0] || !version[1] || !version[2])
351 break;
352 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
353 break;
354 for (i = 0; i < 3; i++) {
355 if (sr_atol(version[i], &n[i]) != SR_OK)
356 break;
357 }
358 if (i != 3)
359 break;
360 scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
361 if (scpi->firmware_version < 24) {
362 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
363 devc->format = FORMAT_RAW;
364 }
365 break;
366 } while (0);
367 g_strfreev(version);
368 }
369
370 sr_scpi_hw_info_free(hw_info);
371
372 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
373 model->analog_channels);
374
375 for (i = 0; i < model->analog_channels; i++) {
376 channel_name = g_strdup_printf("CH%d", i + 1);
377 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
378
379 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
380
381 devc->analog_groups[i]->name = channel_name;
382 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
383 sdi->channel_groups = g_slist_append(sdi->channel_groups,
384 devc->analog_groups[i]);
385 }
386
387 if (devc->model->has_digital) {
388 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
389
390 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
391 channel_name = g_strdup_printf("D%d", i);
392 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
393 g_free(channel_name);
394 devc->digital_group->channels = g_slist_append(
395 devc->digital_group->channels, ch);
396 }
397 devc->digital_group->name = g_strdup("LA");
398 sdi->channel_groups = g_slist_append(sdi->channel_groups,
399 devc->digital_group);
400 }
401
402 for (i = 0; i < NUM_TIMEBASE; i++) {
403 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
404 devc->timebases = &timebases[i];
405 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
406 devc->num_timebases = &timebases[i] - devc->timebases + 1;
407 }
408
409 for (i = 0; i < NUM_VDIV; i++) {
410 if (!memcmp(&devc->model->series->min_vdiv,
411 &vdivs[i], sizeof(uint64_t[2]))) {
412 devc->vdivs = &vdivs[i];
413 devc->num_vdivs = NUM_VDIV - i;
414 }
415 }
416
417 devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
418 devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
419
420 devc->data_source = DATA_SOURCE_LIVE;
421
422 sdi->priv = devc;
423
424 return sdi;
425}
426
427static GSList *scan(struct sr_dev_driver *di, GSList *options)
428{
429 return sr_scpi_scan(di->context, options, probe_device);
430}
431
432static int dev_open(struct sr_dev_inst *sdi)
433{
434 int ret;
435 struct sr_scpi_dev_inst *scpi = sdi->conn;
436
437 if ((ret = sr_scpi_open(scpi)) < 0) {
438 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
439 return SR_ERR;
440 }
441
442 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
443 sr_err("Failed to get device config: %s.", sr_strerror(ret));
444 return SR_ERR;
445 }
446
447 return SR_OK;
448}
449
450static int dev_close(struct sr_dev_inst *sdi)
451{
452 struct sr_scpi_dev_inst *scpi;
453 struct dev_context *devc;
454
455 scpi = sdi->conn;
456 devc = sdi->priv;
457
458 if (!scpi)
459 return SR_ERR_BUG;
460
461 if (devc->model->series->protocol == PROTOCOL_V2)
462 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
463
464 return sr_scpi_close(scpi);
465}
466
467static int analog_frame_size(const struct sr_dev_inst *sdi)
468{
469 struct dev_context *devc = sdi->priv;
470 struct sr_channel *ch;
471 int analog_channels = 0;
472 GSList *l;
473
474 for (l = sdi->channels; l; l = l->next) {
475 ch = l->data;
476 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
477 analog_channels++;
478 }
479
480 if (analog_channels == 0)
481 return 0;
482
483 switch (devc->data_source) {
484 case DATA_SOURCE_LIVE:
485 return devc->model->series->live_samples;
486 case DATA_SOURCE_MEMORY:
487 return devc->model->series->buffer_samples / analog_channels;
488 default:
489 return 0;
490 }
491}
492
493static int digital_frame_size(const struct sr_dev_inst *sdi)
494{
495 struct dev_context *devc = sdi->priv;
496
497 switch (devc->data_source) {
498 case DATA_SOURCE_LIVE:
499 return devc->model->series->live_samples * 2;
500 case DATA_SOURCE_MEMORY:
501 return devc->model->series->buffer_samples * 2;
502 default:
503 return 0;
504 }
505}
506
507static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
508 const struct sr_channel_group *cg)
509{
510 struct dev_context *devc;
511 struct sr_channel *ch;
512 const char *tmp_str;
513 uint64_t samplerate;
514 int analog_channel = -1;
515 float smallest_diff = INFINITY;
516 int idx = -1;
517 unsigned i;
518
519 if (!sdi)
520 return SR_ERR_ARG;
521
522 devc = sdi->priv;
523
524 /* If a channel group is specified, it must be a valid one. */
525 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
526 sr_err("Invalid channel group specified.");
527 return SR_ERR;
528 }
529
530 if (cg) {
531 ch = g_slist_nth_data(cg->channels, 0);
532 if (!ch)
533 return SR_ERR;
534 if (ch->type == SR_CHANNEL_ANALOG) {
535 if (ch->name[2] < '1' || ch->name[2] > '4')
536 return SR_ERR;
537 analog_channel = ch->name[2] - '1';
538 }
539 }
540
541 switch (key) {
542 case SR_CONF_NUM_HDIV:
543 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
544 break;
545 case SR_CONF_NUM_VDIV:
546 *data = g_variant_new_int32(devc->num_vdivs);
547 break;
548 case SR_CONF_DATA_SOURCE:
549 if (devc->data_source == DATA_SOURCE_LIVE)
550 *data = g_variant_new_string("Live");
551 else if (devc->data_source == DATA_SOURCE_MEMORY)
552 *data = g_variant_new_string("Memory");
553 else
554 *data = g_variant_new_string("Segmented");
555 break;
556 case SR_CONF_SAMPLERATE:
557 if (devc->data_source == DATA_SOURCE_LIVE) {
558 samplerate = analog_frame_size(sdi) /
559 (devc->timebase * devc->model->series->num_horizontal_divs);
560 *data = g_variant_new_uint64(samplerate);
561 } else {
562 sr_dbg("Unknown data source: %d.", devc->data_source);
563 return SR_ERR_NA;
564 }
565 break;
566 case SR_CONF_TRIGGER_SOURCE:
567 if (!strcmp(devc->trigger_source, "ACL"))
568 tmp_str = "AC Line";
569 else if (!strcmp(devc->trigger_source, "CHAN1"))
570 tmp_str = "CH1";
571 else if (!strcmp(devc->trigger_source, "CHAN2"))
572 tmp_str = "CH2";
573 else if (!strcmp(devc->trigger_source, "CHAN3"))
574 tmp_str = "CH3";
575 else if (!strcmp(devc->trigger_source, "CHAN4"))
576 tmp_str = "CH4";
577 else
578 tmp_str = devc->trigger_source;
579 *data = g_variant_new_string(tmp_str);
580 break;
581 case SR_CONF_TRIGGER_SLOPE:
582 if (!strncmp(devc->trigger_slope, "POS", 3)) {
583 tmp_str = "r";
584 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
585 tmp_str = "f";
586 } else {
587 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
588 return SR_ERR_NA;
589 }
590 *data = g_variant_new_string(tmp_str);
591 break;
592 case SR_CONF_TRIGGER_LEVEL:
593 *data = g_variant_new_double(devc->trigger_level);
594 break;
595 case SR_CONF_TIMEBASE:
596 for (i = 0; i < devc->num_timebases; i++) {
597 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
598 float diff = fabs(devc->timebase - tb);
599 if (diff < smallest_diff) {
600 smallest_diff = diff;
601 idx = i;
602 }
603 }
604 if (idx < 0) {
605 sr_dbg("Negative timebase index: %d.", idx);
606 return SR_ERR_NA;
607 }
608 *data = g_variant_new("(tt)", devc->timebases[idx][0],
609 devc->timebases[idx][1]);
610 break;
611 case SR_CONF_VDIV:
612 if (analog_channel < 0) {
613 sr_dbg("Negative analog channel: %d.", analog_channel);
614 return SR_ERR_NA;
615 }
616 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
617 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
618 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
619 if (diff < smallest_diff) {
620 smallest_diff = diff;
621 idx = i;
622 }
623 }
624 if (idx < 0) {
625 sr_dbg("Negative vdiv index: %d.", idx);
626 return SR_ERR_NA;
627 }
628 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
629 break;
630 case SR_CONF_COUPLING:
631 if (analog_channel < 0) {
632 sr_dbg("Negative analog channel: %d.", analog_channel);
633 return SR_ERR_NA;
634 }
635 *data = g_variant_new_string(devc->coupling[analog_channel]);
636 break;
637 case SR_CONF_PROBE_FACTOR:
638 if (analog_channel < 0) {
639 sr_dbg("Negative analog channel: %d.", analog_channel);
640 return SR_ERR_NA;
641 }
642 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
643 break;
644 default:
645 return SR_ERR_NA;
646 }
647
648 return SR_OK;
649}
650
651static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
652 const struct sr_channel_group *cg)
653{
654 struct dev_context *devc;
655 uint64_t p, q;
656 double t_dbl;
657 unsigned int i, j;
658 int ret;
659 const char *tmp_str;
660 char buffer[16];
661
662 devc = sdi->priv;
663
664 /* If a channel group is specified, it must be a valid one. */
665 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
666 sr_err("Invalid channel group specified.");
667 return SR_ERR;
668 }
669
670 ret = SR_OK;
671 switch (key) {
672 case SR_CONF_LIMIT_FRAMES:
673 devc->limit_frames = g_variant_get_uint64(data);
674 break;
675 case SR_CONF_TRIGGER_SLOPE:
676 tmp_str = g_variant_get_string(data, NULL);
677
678 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
679 sr_err("Unknown trigger slope: '%s'.",
680 (tmp_str) ? tmp_str : "NULL");
681 return SR_ERR_ARG;
682 }
683
684 g_free(devc->trigger_slope);
685 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
686 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
687 break;
688 case SR_CONF_HORIZ_TRIGGERPOS:
689 t_dbl = g_variant_get_double(data);
690 if (t_dbl < 0.0 || t_dbl > 1.0) {
691 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
692 return SR_ERR;
693 }
694 devc->horiz_triggerpos = t_dbl;
695 /* We have the trigger offset as a percentage of the frame, but
696 * need to express this in seconds. */
697 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
698 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
699 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
700 break;
701 case SR_CONF_TRIGGER_LEVEL:
702 t_dbl = g_variant_get_double(data);
703 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
704 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
705 if (ret == SR_OK)
706 devc->trigger_level = t_dbl;
707 break;
708 case SR_CONF_TIMEBASE:
709 g_variant_get(data, "(tt)", &p, &q);
710 for (i = 0; i < devc->num_timebases; i++) {
711 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
712 devc->timebase = (float)p / q;
713 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
714 devc->timebase);
715 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
716 break;
717 }
718 }
719 if (i == devc->num_timebases) {
720 sr_err("Invalid timebase index: %d.", i);
721 ret = SR_ERR_ARG;
722 }
723 break;
724 case SR_CONF_TRIGGER_SOURCE:
725 tmp_str = g_variant_get_string(data, NULL);
726 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
727 if (!strcmp(trigger_sources[i], tmp_str)) {
728 g_free(devc->trigger_source);
729 devc->trigger_source = g_strdup(trigger_sources[i]);
730 if (!strcmp(devc->trigger_source, "AC Line"))
731 tmp_str = "ACL";
732 else if (!strcmp(devc->trigger_source, "CH1"))
733 tmp_str = "CHAN1";
734 else if (!strcmp(devc->trigger_source, "CH2"))
735 tmp_str = "CHAN2";
736 else if (!strcmp(devc->trigger_source, "CH3"))
737 tmp_str = "CHAN3";
738 else if (!strcmp(devc->trigger_source, "CH4"))
739 tmp_str = "CHAN4";
740 else
741 tmp_str = (char *)devc->trigger_source;
742 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
743 break;
744 }
745 }
746 if (i == ARRAY_SIZE(trigger_sources)) {
747 sr_err("Invalid trigger source index: %d.", i);
748 ret = SR_ERR_ARG;
749 }
750 break;
751 case SR_CONF_VDIV:
752 if (!cg) {
753 sr_err("No channel group specified.");
754 return SR_ERR_CHANNEL_GROUP;
755 }
756 g_variant_get(data, "(tt)", &p, &q);
757 for (i = 0; i < devc->model->analog_channels; i++) {
758 if (cg == devc->analog_groups[i]) {
759 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
760 if (vdivs[j][0] != p || vdivs[j][1] != q)
761 continue;
762 devc->vdiv[i] = (float)p / q;
763 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
764 devc->vdiv[i]);
765 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
766 buffer);
767 }
768 sr_err("Invalid vdiv index: %d.", j);
769 return SR_ERR_ARG;
770 }
771 }
772 sr_dbg("Didn't set vdiv, unknown channel(group).");
773 return SR_ERR_NA;
774 case SR_CONF_COUPLING:
775 if (!cg) {
776 sr_err("No channel group specified.");
777 return SR_ERR_CHANNEL_GROUP;
778 }
779 tmp_str = g_variant_get_string(data, NULL);
780 for (i = 0; i < devc->model->analog_channels; i++) {
781 if (cg == devc->analog_groups[i]) {
782 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
783 if (!strcmp(tmp_str, coupling[j])) {
784 g_free(devc->coupling[i]);
785 devc->coupling[i] = g_strdup(coupling[j]);
786 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
787 devc->coupling[i]);
788 }
789 }
790 sr_err("Invalid coupling index: %d.", j);
791 return SR_ERR_ARG;
792 }
793 }
794 sr_dbg("Didn't set coupling, unknown channel(group).");
795 return SR_ERR_NA;
796 case SR_CONF_PROBE_FACTOR:
797 if (!cg) {
798 sr_err("No channel group specified.");
799 return SR_ERR_CHANNEL_GROUP;
800 }
801 p = g_variant_get_uint64(data);
802 for (i = 0; i < devc->model->analog_channels; i++) {
803 if (cg == devc->analog_groups[i]) {
804 for (j = 0; j < ARRAY_SIZE(probe_factor); j++) {
805 if (p == probe_factor[j]) {
806 devc->attenuation[i] = p;
807 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64,
808 i + 1, p);
809 if (ret == SR_OK)
810 rigol_ds_get_dev_cfg_vertical(sdi);
811 return ret;
812 }
813 }
814 sr_err("Invalid probe factor: %"PRIu64".", p);
815 return SR_ERR_ARG;
816 }
817 }
818 sr_dbg("Didn't set probe factor, unknown channel(group).");
819 return SR_ERR_NA;
820 case SR_CONF_DATA_SOURCE:
821 tmp_str = g_variant_get_string(data, NULL);
822 if (!strcmp(tmp_str, "Live"))
823 devc->data_source = DATA_SOURCE_LIVE;
824 else if (devc->model->series->protocol >= PROTOCOL_V2
825 && !strcmp(tmp_str, "Memory"))
826 devc->data_source = DATA_SOURCE_MEMORY;
827 else if (devc->model->series->protocol >= PROTOCOL_V3
828 && !strcmp(tmp_str, "Segmented"))
829 devc->data_source = DATA_SOURCE_SEGMENTED;
830 else {
831 sr_err("Unknown data source: '%s'.", tmp_str);
832 return SR_ERR;
833 }
834 break;
835 default:
836 return SR_ERR_NA;
837 }
838
839 return ret;
840}
841
842static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
843 const struct sr_channel_group *cg)
844{
845 GVariant *tuple, *rational[2];
846 GVariantBuilder gvb;
847 unsigned int i;
848 struct dev_context *devc = NULL;
849
850 /* SR_CONF_SCAN_OPTIONS is always valid, regardless of sdi or channel group. */
851 if (key == SR_CONF_SCAN_OPTIONS) {
852 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
853 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
854 return SR_OK;
855 }
856
857 /* If sdi is NULL, nothing except SR_CONF_DEVICE_OPTIONS can be provided. */
858 if (key == SR_CONF_DEVICE_OPTIONS && !sdi) {
859 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
860 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
861 return SR_OK;
862 }
863
864 /* Every other option requires a valid device instance. */
865 if (!sdi)
866 return SR_ERR_ARG;
867 devc = sdi->priv;
868
869 /* If a channel group is specified, it must be a valid one. */
870 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
871 sr_err("Invalid channel group specified.");
872 return SR_ERR;
873 }
874
875 switch (key) {
876 case SR_CONF_DEVICE_OPTIONS:
877 if (!cg) {
878 /* If cg is NULL, only the SR_CONF_DEVICE_OPTIONS that are not
879 * specific to a channel group must be returned. */
880 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
881 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
882 return SR_OK;
883 }
884 if (cg == devc->digital_group) {
885 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
886 NULL, 0, sizeof(uint32_t));
887 return SR_OK;
888 } else {
889 for (i = 0; i < devc->model->analog_channels; i++) {
890 if (cg == devc->analog_groups[i]) {
891 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
892 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
893 return SR_OK;
894 }
895 }
896 return SR_ERR_NA;
897 }
898 break;
899 case SR_CONF_COUPLING:
900 if (!cg) {
901 sr_err("No channel group specified.");
902 return SR_ERR_CHANNEL_GROUP;
903 }
904 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
905 break;
906 case SR_CONF_PROBE_FACTOR:
907 if (!cg) {
908 sr_err("No channel group specified.");
909 return SR_ERR_CHANNEL_GROUP;
910 }
911 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
912 probe_factor, ARRAY_SIZE(probe_factor), sizeof(uint64_t));
913 break;
914 case SR_CONF_VDIV:
915 if (!devc)
916 /* Can't know this until we have the exact model. */
917 return SR_ERR_ARG;
918 if (!cg) {
919 sr_err("No channel group specified.");
920 return SR_ERR_CHANNEL_GROUP;
921 }
922 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
923 for (i = 0; i < devc->num_vdivs; i++) {
924 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
925 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
926 tuple = g_variant_new_tuple(rational, 2);
927 g_variant_builder_add_value(&gvb, tuple);
928 }
929 *data = g_variant_builder_end(&gvb);
930 break;
931 case SR_CONF_TIMEBASE:
932 if (!devc)
933 /* Can't know this until we have the exact model. */
934 return SR_ERR_ARG;
935 if (devc->num_timebases <= 0)
936 return SR_ERR_NA;
937 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
938 for (i = 0; i < devc->num_timebases; i++) {
939 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
940 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
941 tuple = g_variant_new_tuple(rational, 2);
942 g_variant_builder_add_value(&gvb, tuple);
943 }
944 *data = g_variant_builder_end(&gvb);
945 break;
946 case SR_CONF_TRIGGER_SOURCE:
947 if (!devc)
948 /* Can't know this until we have the exact model. */
949 return SR_ERR_ARG;
950 *data = g_variant_new_strv(trigger_sources,
951 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
952 break;
953 case SR_CONF_TRIGGER_SLOPE:
954 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
955 break;
956 case SR_CONF_DATA_SOURCE:
957 if (!devc)
958 /* Can't know this until we have the exact model. */
959 return SR_ERR_ARG;
960 switch (devc->model->series->protocol) {
961 case PROTOCOL_V1:
962 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
963 break;
964 case PROTOCOL_V2:
965 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
966 break;
967 default:
968 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
969 break;
970 }
971 break;
972 default:
973 return SR_ERR_NA;
974 }
975
976 return SR_OK;
977}
978
979static int dev_acquisition_start(const struct sr_dev_inst *sdi)
980{
981 struct sr_scpi_dev_inst *scpi;
982 struct dev_context *devc;
983 struct sr_channel *ch;
984 struct sr_datafeed_packet packet;
985 gboolean some_digital;
986 GSList *l;
987
988 scpi = sdi->conn;
989 devc = sdi->priv;
990
991 devc->num_frames = 0;
992
993 some_digital = FALSE;
994 for (l = sdi->channels; l; l = l->next) {
995 ch = l->data;
996 sr_dbg("handling channel %s", ch->name);
997 if (ch->type == SR_CHANNEL_ANALOG) {
998 if (ch->enabled)
999 devc->enabled_channels = g_slist_append(
1000 devc->enabled_channels, ch);
1001 if (ch->enabled != devc->analog_channels[ch->index]) {
1002 /* Enabled channel is currently disabled, or vice versa. */
1003 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
1004 ch->enabled ? "ON" : "OFF") != SR_OK)
1005 return SR_ERR;
1006 devc->analog_channels[ch->index] = ch->enabled;
1007 }
1008 } else if (ch->type == SR_CHANNEL_LOGIC) {
1009 /* Only one list entry for older protocols. All channels are
1010 * retrieved together when this entry is processed. */
1011 if (ch->enabled && (
1012 devc->model->series->protocol > PROTOCOL_V3 ||
1013 !some_digital))
1014 devc->enabled_channels = g_slist_append(
1015 devc->enabled_channels, ch);
1016 if (ch->enabled) {
1017 some_digital = TRUE;
1018 /* Turn on LA module if currently off. */
1019 if (!devc->la_enabled) {
1020 if (rigol_ds_config_set(sdi,
1021 devc->model->series->protocol >= PROTOCOL_V3 ?
1022 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
1023 return SR_ERR;
1024 devc->la_enabled = TRUE;
1025 }
1026 }
1027 if (ch->enabled != devc->digital_channels[ch->index]) {
1028 /* Enabled channel is currently disabled, or vice versa. */
1029 if (rigol_ds_config_set(sdi,
1030 devc->model->series->protocol >= PROTOCOL_V3 ?
1031 ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
1032 ch->enabled ? "ON" : "OFF") != SR_OK)
1033 return SR_ERR;
1034 devc->digital_channels[ch->index] = ch->enabled;
1035 }
1036 }
1037 }
1038
1039 if (!devc->enabled_channels)
1040 return SR_ERR;
1041
1042 /* Turn off LA module if on and no digital channels selected. */
1043 if (devc->la_enabled && !some_digital)
1044 if (rigol_ds_config_set(sdi,
1045 devc->model->series->protocol >= PROTOCOL_V3 ?
1046 ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
1047 return SR_ERR;
1048
1049 /* Set memory mode. */
1050 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
1051 sr_err("Data source 'Segmented' not yet supported");
1052 return SR_ERR;
1053 }
1054
1055 devc->analog_frame_size = analog_frame_size(sdi);
1056 devc->digital_frame_size = digital_frame_size(sdi);
1057
1058 switch (devc->model->series->protocol) {
1059 case PROTOCOL_V2:
1060 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
1061 return SR_ERR;
1062 break;
1063 case PROTOCOL_V3:
1064 /* Apparently for the DS2000 the memory
1065 * depth can only be set in Running state -
1066 * this matches the behaviour of the UI. */
1067 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1068 return SR_ERR;
1069 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1070 devc->analog_frame_size) != SR_OK)
1071 return SR_ERR;
1072 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1073 return SR_ERR;
1074 break;
1075 default:
1076 break;
1077 }
1078
1079 if (devc->data_source == DATA_SOURCE_LIVE)
1080 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1081 return SR_ERR;
1082
1083 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1084 rigol_ds_receive, (void *)sdi);
1085
1086 std_session_send_df_header(sdi);
1087
1088 devc->channel_entry = devc->enabled_channels;
1089
1090 if (rigol_ds_capture_start(sdi) != SR_OK)
1091 return SR_ERR;
1092
1093 /* Start of first frame. */
1094 packet.type = SR_DF_FRAME_BEGIN;
1095 sr_session_send(sdi, &packet);
1096
1097 return SR_OK;
1098}
1099
1100static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1101{
1102 struct dev_context *devc;
1103 struct sr_scpi_dev_inst *scpi;
1104
1105 devc = sdi->priv;
1106
1107 std_session_send_df_end(sdi);
1108
1109 g_slist_free(devc->enabled_channels);
1110 devc->enabled_channels = NULL;
1111 scpi = sdi->conn;
1112 sr_scpi_source_remove(sdi->session, scpi);
1113
1114 return SR_OK;
1115}
1116
1117static struct sr_dev_driver rigol_ds_driver_info = {
1118 .name = "rigol-ds",
1119 .longname = "Rigol DS",
1120 .api_version = 1,
1121 .init = std_init,
1122 .cleanup = std_cleanup,
1123 .scan = scan,
1124 .dev_list = std_dev_list,
1125 .dev_clear = dev_clear,
1126 .config_get = config_get,
1127 .config_set = config_set,
1128 .config_list = config_list,
1129 .dev_open = dev_open,
1130 .dev_close = dev_close,
1131 .dev_acquisition_start = dev_acquisition_start,
1132 .dev_acquisition_stop = dev_acquisition_stop,
1133 .context = NULL,
1134};
1135SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);
Hardware access and backend lib