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rigol-ds: Add DS1000Z series support.
[libsigrok.git] / src / hardware / rigol-ds / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <fcntl.h>
23#include <unistd.h>
24#include <stdlib.h>
25#include <string.h>
26#include <math.h>
27#include <glib.h>
28#include "libsigrok.h"
29#include "libsigrok-internal.h"
30#include "protocol.h"
31
32static const uint32_t scanopts[] = {
33 SR_CONF_CONN,
34 SR_CONF_SERIALCOMM
35};
36
37static const uint32_t devopts[] = {
38 SR_CONF_OSCILLOSCOPE,
39 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
40 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
41 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
42 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
43 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
44 SR_CONF_NUM_HDIV | SR_CONF_GET,
45 SR_CONF_SAMPLERATE | SR_CONF_GET,
46 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
47};
48
49static const uint32_t analog_devopts[] = {
50 SR_CONF_NUM_VDIV | SR_CONF_GET,
51 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
53};
54
55static const uint64_t timebases[][2] = {
56 /* nanoseconds */
57 { 1, 1000000000 },
58 { 2, 1000000000 },
59 { 5, 1000000000 },
60 { 10, 1000000000 },
61 { 20, 1000000000 },
62 { 50, 1000000000 },
63 { 100, 1000000000 },
64 { 500, 1000000000 },
65 /* microseconds */
66 { 1, 1000000 },
67 { 2, 1000000 },
68 { 5, 1000000 },
69 { 10, 1000000 },
70 { 20, 1000000 },
71 { 50, 1000000 },
72 { 100, 1000000 },
73 { 200, 1000000 },
74 { 500, 1000000 },
75 /* milliseconds */
76 { 1, 1000 },
77 { 2, 1000 },
78 { 5, 1000 },
79 { 10, 1000 },
80 { 20, 1000 },
81 { 50, 1000 },
82 { 100, 1000 },
83 { 200, 1000 },
84 { 500, 1000 },
85 /* seconds */
86 { 1, 1 },
87 { 2, 1 },
88 { 5, 1 },
89 { 10, 1 },
90 { 20, 1 },
91 { 50, 1 },
92 { 100, 1 },
93 { 200, 1 },
94 { 500, 1 },
95 { 1000, 1 },
96};
97
98static const uint64_t vdivs[][2] = {
99 /* microvolts */
100 { 500, 1000000 },
101 /* millivolts */
102 { 1, 1000 },
103 { 2, 1000 },
104 { 5, 1000 },
105 { 10, 1000 },
106 { 20, 1000 },
107 { 50, 1000 },
108 { 100, 1000 },
109 { 200, 1000 },
110 { 500, 1000 },
111 /* volts */
112 { 1, 1 },
113 { 2, 1 },
114 { 5, 1 },
115 { 10, 1 },
116 { 20, 1 },
117 { 50, 1 },
118 { 100, 1 },
119};
120
121#define NUM_TIMEBASE ARRAY_SIZE(timebases)
122#define NUM_VDIV ARRAY_SIZE(vdivs)
123
124static const char *trigger_sources[] = {
125 "CH1",
126 "CH2",
127 "CH3",
128 "CH4",
129 "EXT",
130 "AC Line",
131 "D0",
132 "D1",
133 "D2",
134 "D3",
135 "D4",
136 "D5",
137 "D6",
138 "D7",
139 "D8",
140 "D9",
141 "D10",
142 "D11",
143 "D12",
144 "D13",
145 "D14",
146 "D15",
147};
148
149static const char *trigger_slopes[] = {
150 "r",
151 "f",
152};
153
154static const char *coupling[] = {
155 "AC",
156 "DC",
157 "GND",
158};
159
160/* Do not change the order of entries */
161static const char *data_sources[] = {
162 "Live",
163 "Memory",
164 "Segmented",
165};
166
167enum vendor {
168 RIGOL,
169 AGILENT,
170};
171
172enum series {
173 VS5000,
174 DS1000,
175 DS2000,
176 DS2000A,
177 DSO1000,
178 DS1000Z,
179};
180
181/* short name, full name */
182static const struct rigol_ds_vendor supported_vendors[] = {
183 [RIGOL] = {"Rigol", "Rigol Technologies"},
184 [AGILENT] = {"Agilent", "Agilent Technologies"},
185};
186
187#define VENDOR(x) &supported_vendors[x]
188/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
189 * live waveform samples, memory buffer samples */
190static const struct rigol_ds_series supported_series[] = {
191 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
192 {50, 1}, {2, 1000}, 14, 2048, 0},
193 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
194 {50, 1}, {2, 1000}, 12, 600, 1048576},
195 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
196 {500, 1}, {500, 1000000}, 14, 1400, 14000},
197 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
198 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
199 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
200 {50, 1}, {2, 1000}, 12, 600, 20480},
201 [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
202 {50, 1}, {1, 1000}, 12, 1200, 12000000},
203};
204
205#define SERIES(x) &supported_series[x]
206/* series, model, min timebase, analog channels, digital */
207static const struct rigol_ds_model supported_models[] = {
208 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
209 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
210 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
211 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
212 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
213 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
214 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
215 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
216 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
217 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
218 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
219 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
220 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
221 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
222 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
223 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
224 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
225 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
226 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
227 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
228 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
229 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
230 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
231 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
232 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
233 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
234 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
235 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
236 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
237 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
238 {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
239 {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
240 {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
241 {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
242 {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
243 {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
244 {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
245 {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
246 {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
247};
248
249SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
250static struct sr_dev_driver *di = &rigol_ds_driver_info;
251
252static void clear_helper(void *priv)
253{
254 struct dev_context *devc;
255 unsigned int i;
256
257 devc = priv;
258 g_free(devc->data);
259 g_free(devc->buffer);
260 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
261 g_free(devc->coupling[i]);
262 g_free(devc->trigger_source);
263 g_free(devc->trigger_slope);
264 g_free(devc->analog_groups);
265 g_free(devc);
266}
267
268static int dev_clear(void)
269{
270 return std_dev_clear(di, clear_helper);
271}
272
273static int init(struct sr_context *sr_ctx)
274{
275 return std_init(sr_ctx, di, LOG_PREFIX);
276}
277
278static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
279{
280 struct dev_context *devc;
281 struct sr_dev_inst *sdi;
282 struct sr_scpi_hw_info *hw_info;
283 struct sr_channel *ch;
284 long n[3];
285 unsigned int i;
286 const struct rigol_ds_model *model = NULL;
287 gchar *channel_name, **version;
288
289 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
290 sr_info("Couldn't get IDN response, retrying.");
291 sr_scpi_close(scpi);
292 sr_scpi_open(scpi);
293 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
294 sr_info("Couldn't get IDN response.");
295 return NULL;
296 }
297 }
298
299 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
300 if (!strcasecmp(hw_info->manufacturer,
301 supported_models[i].series->vendor->full_name) &&
302 !strcmp(hw_info->model, supported_models[i].name)) {
303 model = &supported_models[i];
304 break;
305 }
306 }
307
308 if (!model) {
309 sr_scpi_hw_info_free(hw_info);
310 return NULL;
311 }
312
313 sdi = g_malloc0(sizeof(struct sr_dev_inst));
314 sdi->status = SR_ST_ACTIVE;
315 sdi->vendor = g_strdup(model->series->vendor->name);
316 sdi->model = g_strdup(model->name);
317 sdi->version = g_strdup(hw_info->firmware_version);
318 sdi->conn = scpi;
319 sdi->driver = di;
320 sdi->inst_type = SR_INST_SCPI;
321 sdi->serial_num = g_strdup(hw_info->serial_number);
322 devc = g_malloc0(sizeof(struct dev_context));
323 devc->limit_frames = 0;
324 devc->model = model;
325 devc->format = model->series->format;
326
327 /* DS1000 models with firmware before 0.2.4 used the old data format. */
328 if (model->series == SERIES(DS1000)) {
329 version = g_strsplit(hw_info->firmware_version, ".", 0);
330 do {
331 if (!version[0] || !version[1] || !version[2])
332 break;
333 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
334 break;
335 for (i = 0; i < 3; i++) {
336 if (sr_atol(version[i], &n[i]) != SR_OK)
337 break;
338 }
339 if (i != 3)
340 break;
341 if (n[0] != 0 || n[1] > 2)
342 break;
343 if (n[1] == 2 && n[2] > 3)
344 break;
345 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
346 devc->format = FORMAT_RAW;
347 } while(0);
348 g_strfreev(version);
349 }
350
351 sr_scpi_hw_info_free(hw_info);
352
353 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
354 model->analog_channels);
355
356 for (i = 0; i < model->analog_channels; i++) {
357 if (!(channel_name = g_strdup_printf("CH%d", i + 1)))
358 return NULL;
359 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
360
361 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
362
363 devc->analog_groups[i]->name = channel_name;
364 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
365 sdi->channel_groups = g_slist_append(sdi->channel_groups,
366 devc->analog_groups[i]);
367 }
368
369 if (devc->model->has_digital) {
370 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
371
372 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
373 if (!(channel_name = g_strdup_printf("D%d", i)))
374 return NULL;
375 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
376 g_free(channel_name);
377 devc->digital_group->channels = g_slist_append(
378 devc->digital_group->channels, ch);
379 }
380 devc->digital_group->name = g_strdup("LA");
381 sdi->channel_groups = g_slist_append(sdi->channel_groups,
382 devc->digital_group);
383 }
384
385 for (i = 0; i < NUM_TIMEBASE; i++) {
386 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
387 devc->timebases = &timebases[i];
388 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
389 devc->num_timebases = &timebases[i] - devc->timebases + 1;
390 }
391
392 for (i = 0; i < NUM_VDIV; i++)
393 if (!memcmp(&devc->model->series->min_vdiv, &vdivs[i], sizeof(uint64_t[2]))) {
394 devc->vdivs = &vdivs[i];
395 devc->num_vdivs = NUM_VDIV - i;
396 }
397
398 if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE)))
399 return NULL;
400 if (!(devc->data = g_try_malloc(ACQ_BUFFER_SIZE * sizeof(float))))
401 return NULL;
402
403 devc->data_source = DATA_SOURCE_LIVE;
404
405 sdi->priv = devc;
406
407 return sdi;
408}
409
410static GSList *scan(GSList *options)
411{
412 return sr_scpi_scan(di->priv, options, probe_device);
413}
414
415static GSList *dev_list(void)
416{
417 return ((struct drv_context *)(di->priv))->instances;
418}
419
420static int dev_open(struct sr_dev_inst *sdi)
421{
422 int ret;
423 struct sr_scpi_dev_inst *scpi = sdi->conn;
424
425 if ((ret = sr_scpi_open(scpi)) < 0) {
426 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
427 return SR_ERR;
428 }
429
430 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
431 sr_err("Failed to get device config: %s.", sr_strerror(ret));
432 return SR_ERR;
433 }
434
435 sdi->status = SR_ST_ACTIVE;
436
437 return SR_OK;
438}
439
440static int dev_close(struct sr_dev_inst *sdi)
441{
442 struct sr_scpi_dev_inst *scpi;
443 struct dev_context *devc;
444
445 if (sdi->status != SR_ST_ACTIVE)
446 return SR_ERR_DEV_CLOSED;
447
448 scpi = sdi->conn;
449 devc = sdi->priv;
450
451 if (devc->model->series->protocol == PROTOCOL_V2)
452 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
453
454 if (scpi) {
455 if (sr_scpi_close(scpi) < 0)
456 return SR_ERR;
457 sdi->status = SR_ST_INACTIVE;
458 }
459
460 return SR_OK;
461}
462
463static int cleanup(void)
464{
465 return dev_clear();
466}
467
468static int analog_frame_size(const struct sr_dev_inst *sdi)
469{
470 struct dev_context *devc = sdi->priv;
471 struct sr_channel *ch;
472 int analog_channels = 0;
473 GSList *l;
474
475 for (l = sdi->channels; l; l = l->next) {
476 ch = l->data;
477 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
478 analog_channels++;
479 }
480
481 if (analog_channels == 0)
482 return 0;
483
484 switch (devc->data_source) {
485 case DATA_SOURCE_LIVE:
486 return devc->model->series->live_samples;
487 case DATA_SOURCE_MEMORY:
488 return devc->model->series->buffer_samples / analog_channels;
489 default:
490 return 0;
491 }
492}
493
494static int digital_frame_size(const struct sr_dev_inst *sdi)
495{
496 struct dev_context *devc = sdi->priv;
497
498 switch (devc->data_source) {
499 case DATA_SOURCE_LIVE:
500 return devc->model->series->live_samples * 2;
501 case DATA_SOURCE_MEMORY:
502 return devc->model->series->buffer_samples * 2;
503 default:
504 return 0;
505 }
506}
507
508static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
509 const struct sr_channel_group *cg)
510{
511 struct dev_context *devc;
512 struct sr_channel *ch;
513 const char *tmp_str;
514 uint64_t samplerate;
515 int analog_channel = -1;
516 float smallest_diff = INFINITY;
517 int idx = -1;
518 unsigned i;
519
520 if (!sdi || !(devc = sdi->priv))
521 return SR_ERR_ARG;
522
523 /* If a channel group is specified, it must be a valid one. */
524 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
525 sr_err("Invalid channel group specified.");
526 return SR_ERR;
527 }
528
529 if (cg) {
530 ch = g_slist_nth_data(cg->channels, 0);
531 if (!ch)
532 return SR_ERR;
533 if (ch->type == SR_CHANNEL_ANALOG) {
534 if (ch->name[2] < '1' || ch->name[2] > '4')
535 return SR_ERR;
536 analog_channel = ch->name[2] - '1';
537 }
538 }
539
540 switch (key) {
541 case SR_CONF_NUM_HDIV:
542 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
543 break;
544 case SR_CONF_NUM_VDIV:
545 *data = g_variant_new_int32(devc->num_vdivs);
546 break;
547 case SR_CONF_DATA_SOURCE:
548 if (devc->data_source == DATA_SOURCE_LIVE)
549 *data = g_variant_new_string("Live");
550 else if (devc->data_source == DATA_SOURCE_MEMORY)
551 *data = g_variant_new_string("Memory");
552 else
553 *data = g_variant_new_string("Segmented");
554 break;
555 case SR_CONF_SAMPLERATE:
556 if (devc->data_source == DATA_SOURCE_LIVE) {
557 samplerate = analog_frame_size(sdi) /
558 (devc->timebase * devc->model->series->num_horizontal_divs);
559 *data = g_variant_new_uint64(samplerate);
560 } else {
561 sr_dbg("Unknown data source: %d.", devc->data_source);
562 return SR_ERR_NA;
563 }
564 break;
565 case SR_CONF_TRIGGER_SOURCE:
566 if (!strcmp(devc->trigger_source, "ACL"))
567 tmp_str = "AC Line";
568 else if (!strcmp(devc->trigger_source, "CHAN1"))
569 tmp_str = "CH1";
570 else if (!strcmp(devc->trigger_source, "CHAN2"))
571 tmp_str = "CH2";
572 else if (!strcmp(devc->trigger_source, "CHAN3"))
573 tmp_str = "CH3";
574 else if (!strcmp(devc->trigger_source, "CHAN4"))
575 tmp_str = "CH4";
576 else
577 tmp_str = devc->trigger_source;
578 *data = g_variant_new_string(tmp_str);
579 break;
580 case SR_CONF_TRIGGER_SLOPE:
581 if (!strncmp(devc->trigger_slope, "POS", 3)) {
582 tmp_str = "r";
583 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
584 tmp_str = "f";
585 } else {
586 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
587 return SR_ERR_NA;
588 }
589 *data = g_variant_new_string(tmp_str);
590 break;
591 case SR_CONF_TIMEBASE:
592 for (i = 0; i < devc->num_timebases; i++) {
593 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
594 float diff = fabs(devc->timebase - tb);
595 if (diff < smallest_diff) {
596 smallest_diff = diff;
597 idx = i;
598 }
599 }
600 if (idx < 0) {
601 sr_dbg("Negative timebase index: %d.", idx);
602 return SR_ERR_NA;
603 }
604 *data = g_variant_new("(tt)", devc->timebases[idx][0],
605 devc->timebases[idx][1]);
606 break;
607 case SR_CONF_VDIV:
608 if (analog_channel < 0) {
609 sr_dbg("Negative analog channel: %d.", analog_channel);
610 return SR_ERR_NA;
611 }
612 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
613 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
614 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
615 if (diff < smallest_diff) {
616 smallest_diff = diff;
617 idx = i;
618 }
619 }
620 if (idx < 0) {
621 sr_dbg("Negative vdiv index: %d.", idx);
622 return SR_ERR_NA;
623 }
624 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
625 break;
626 case SR_CONF_COUPLING:
627 if (analog_channel < 0) {
628 sr_dbg("Negative analog channel: %d.", analog_channel);
629 return SR_ERR_NA;
630 }
631 *data = g_variant_new_string(devc->coupling[analog_channel]);
632 break;
633 default:
634 sr_dbg("Tried to get unknown config key: %d.", key);
635 return SR_ERR_NA;
636 }
637
638 return SR_OK;
639}
640
641static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
642 const struct sr_channel_group *cg)
643{
644 struct dev_context *devc;
645 uint64_t p, q;
646 double t_dbl;
647 unsigned int i, j;
648 int ret;
649 const char *tmp_str;
650 char buffer[16];
651
652 if (!(devc = sdi->priv))
653 return SR_ERR_ARG;
654
655 if (sdi->status != SR_ST_ACTIVE)
656 return SR_ERR_DEV_CLOSED;
657
658 /* If a channel group is specified, it must be a valid one. */
659 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
660 sr_err("Invalid channel group specified.");
661 return SR_ERR;
662 }
663
664 ret = SR_OK;
665 switch (key) {
666 case SR_CONF_LIMIT_FRAMES:
667 devc->limit_frames = g_variant_get_uint64(data);
668 break;
669 case SR_CONF_TRIGGER_SLOPE:
670 tmp_str = g_variant_get_string(data, NULL);
671
672 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
673 sr_err("Unknown trigger slope: '%s'.",
674 (tmp_str) ? tmp_str : "NULL");
675 return SR_ERR_ARG;
676 }
677
678 g_free(devc->trigger_slope);
679 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
680 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
681 break;
682 case SR_CONF_HORIZ_TRIGGERPOS:
683 t_dbl = g_variant_get_double(data);
684 if (t_dbl < 0.0 || t_dbl > 1.0) {
685 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
686 return SR_ERR;
687 }
688 devc->horiz_triggerpos = t_dbl;
689 /* We have the trigger offset as a percentage of the frame, but
690 * need to express this in seconds. */
691 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
692 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
693 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
694 break;
695 case SR_CONF_TIMEBASE:
696 g_variant_get(data, "(tt)", &p, &q);
697 for (i = 0; i < devc->num_timebases; i++) {
698 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
699 devc->timebase = (float)p / q;
700 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
701 devc->timebase);
702 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
703 break;
704 }
705 }
706 if (i == devc->num_timebases) {
707 sr_err("Invalid timebase index: %d.", i);
708 ret = SR_ERR_ARG;
709 }
710 break;
711 case SR_CONF_TRIGGER_SOURCE:
712 tmp_str = g_variant_get_string(data, NULL);
713 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
714 if (!strcmp(trigger_sources[i], tmp_str)) {
715 g_free(devc->trigger_source);
716 devc->trigger_source = g_strdup(trigger_sources[i]);
717 if (!strcmp(devc->trigger_source, "AC Line"))
718 tmp_str = "ACL";
719 else if (!strcmp(devc->trigger_source, "CH1"))
720 tmp_str = "CHAN1";
721 else if (!strcmp(devc->trigger_source, "CH2"))
722 tmp_str = "CHAN2";
723 else if (!strcmp(devc->trigger_source, "CH3"))
724 tmp_str = "CHAN3";
725 else if (!strcmp(devc->trigger_source, "CH4"))
726 tmp_str = "CHAN4";
727 else
728 tmp_str = (char *)devc->trigger_source;
729 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
730 break;
731 }
732 }
733 if (i == ARRAY_SIZE(trigger_sources)) {
734 sr_err("Invalid trigger source index: %d.", i);
735 ret = SR_ERR_ARG;
736 }
737 break;
738 case SR_CONF_VDIV:
739 if (!cg) {
740 sr_err("No channel group specified.");
741 return SR_ERR_CHANNEL_GROUP;
742 }
743 g_variant_get(data, "(tt)", &p, &q);
744 for (i = 0; i < devc->model->analog_channels; i++) {
745 if (cg == devc->analog_groups[i]) {
746 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
747 if (vdivs[j][0] != p || vdivs[j][1] != q)
748 continue;
749 devc->vdiv[i] = (float)p / q;
750 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
751 devc->vdiv[i]);
752 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
753 buffer);
754 }
755 sr_err("Invalid vdiv index: %d.", j);
756 return SR_ERR_ARG;
757 }
758 }
759 sr_dbg("Didn't set vdiv, unknown channel(group).");
760 return SR_ERR_NA;
761 case SR_CONF_COUPLING:
762 if (!cg) {
763 sr_err("No channel group specified.");
764 return SR_ERR_CHANNEL_GROUP;
765 }
766 tmp_str = g_variant_get_string(data, NULL);
767 for (i = 0; i < devc->model->analog_channels; i++) {
768 if (cg == devc->analog_groups[i]) {
769 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
770 if (!strcmp(tmp_str, coupling[j])) {
771 g_free(devc->coupling[i]);
772 devc->coupling[i] = g_strdup(coupling[j]);
773 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
774 devc->coupling[i]);
775 }
776 }
777 sr_err("Invalid coupling index: %d.", j);
778 return SR_ERR_ARG;
779 }
780 }
781 sr_dbg("Didn't set coupling, unknown channel(group).");
782 return SR_ERR_NA;
783 case SR_CONF_DATA_SOURCE:
784 tmp_str = g_variant_get_string(data, NULL);
785 if (!strcmp(tmp_str, "Live"))
786 devc->data_source = DATA_SOURCE_LIVE;
787 else if (devc->model->series->protocol >= PROTOCOL_V2
788 && !strcmp(tmp_str, "Memory"))
789 devc->data_source = DATA_SOURCE_MEMORY;
790 else if (devc->model->series->protocol >= PROTOCOL_V3
791 && !strcmp(tmp_str, "Segmented"))
792 devc->data_source = DATA_SOURCE_SEGMENTED;
793 else {
794 sr_err("Unknown data source: '%s'.", tmp_str);
795 return SR_ERR;
796 }
797 break;
798 default:
799 sr_dbg("Tried to set unknown config key: %d.", key);
800 ret = SR_ERR_NA;
801 break;
802 }
803
804 return ret;
805}
806
807static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
808 const struct sr_channel_group *cg)
809{
810 GVariant *tuple, *rational[2];
811 GVariantBuilder gvb;
812 unsigned int i;
813 struct dev_context *devc = NULL;
814
815 if (sdi)
816 devc = sdi->priv;
817
818 if (key == SR_CONF_SCAN_OPTIONS) {
819 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
820 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
821 return SR_OK;
822 } else if (key == SR_CONF_DEVICE_OPTIONS && cg == NULL) {
823 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
824 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
825 return SR_OK;
826 }
827
828 /* Every other option requires a valid device instance. */
829 if (!sdi || !(devc = sdi->priv))
830 return SR_ERR_ARG;
831
832 /* If a channel group is specified, it must be a valid one. */
833 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
834 sr_err("Invalid channel group specified.");
835 return SR_ERR;
836 }
837
838 switch (key) {
839 case SR_CONF_DEVICE_OPTIONS:
840 if (!cg) {
841 sr_err("No channel group specified.");
842 return SR_ERR_CHANNEL_GROUP;
843 }
844 if (cg == devc->digital_group) {
845 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
846 NULL, 0, sizeof(uint32_t));
847 return SR_OK;
848 } else {
849 for (i = 0; i < devc->model->analog_channels; i++) {
850 if (cg == devc->analog_groups[i]) {
851 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
852 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
853 return SR_OK;
854 }
855 }
856 return SR_ERR_NA;
857 }
858 break;
859 case SR_CONF_COUPLING:
860 if (!cg) {
861 sr_err("No channel group specified.");
862 return SR_ERR_CHANNEL_GROUP;
863 }
864 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
865 break;
866 case SR_CONF_VDIV:
867 if (!devc)
868 /* Can't know this until we have the exact model. */
869 return SR_ERR_ARG;
870 if (!cg) {
871 sr_err("No channel group specified.");
872 return SR_ERR_CHANNEL_GROUP;
873 }
874 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
875 for (i = 0; i < devc->num_vdivs; i++) {
876 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
877 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
878 tuple = g_variant_new_tuple(rational, 2);
879 g_variant_builder_add_value(&gvb, tuple);
880 }
881 *data = g_variant_builder_end(&gvb);
882 break;
883 case SR_CONF_TIMEBASE:
884 if (!devc)
885 /* Can't know this until we have the exact model. */
886 return SR_ERR_ARG;
887 if (devc->num_timebases <= 0)
888 return SR_ERR_NA;
889 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
890 for (i = 0; i < devc->num_timebases; i++) {
891 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
892 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
893 tuple = g_variant_new_tuple(rational, 2);
894 g_variant_builder_add_value(&gvb, tuple);
895 }
896 *data = g_variant_builder_end(&gvb);
897 break;
898 case SR_CONF_TRIGGER_SOURCE:
899 if (!devc)
900 /* Can't know this until we have the exact model. */
901 return SR_ERR_ARG;
902 *data = g_variant_new_strv(trigger_sources,
903 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
904 break;
905 case SR_CONF_TRIGGER_SLOPE:
906 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
907 break;
908 case SR_CONF_DATA_SOURCE:
909 if (!devc)
910 /* Can't know this until we have the exact model. */
911 return SR_ERR_ARG;
912 switch (devc->model->series->protocol) {
913 case PROTOCOL_V1:
914 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
915 break;
916 case PROTOCOL_V2:
917 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
918 break;
919 default:
920 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
921 break;
922 }
923 break;
924 default:
925 sr_dbg("Tried to list unknown config key: %d.", key);
926 return SR_ERR_NA;
927 }
928
929 return SR_OK;
930}
931
932static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
933{
934 struct sr_scpi_dev_inst *scpi;
935 struct dev_context *devc;
936 struct sr_channel *ch;
937 struct sr_datafeed_packet packet;
938 gboolean some_digital;
939 GSList *l;
940
941 if (sdi->status != SR_ST_ACTIVE)
942 return SR_ERR_DEV_CLOSED;
943
944 scpi = sdi->conn;
945 devc = sdi->priv;
946
947 devc->num_frames = 0;
948
949 some_digital = FALSE;
950 for (l = sdi->channels; l; l = l->next) {
951 ch = l->data;
952 sr_dbg("handling channel %s", ch->name);
953 if (ch->type == SR_CHANNEL_ANALOG) {
954 if (ch->enabled)
955 devc->enabled_channels = g_slist_append(
956 devc->enabled_channels, ch);
957 if (ch->enabled != devc->analog_channels[ch->index]) {
958 /* Enabled channel is currently disabled, or vice versa. */
959 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
960 ch->enabled ? "ON" : "OFF") != SR_OK)
961 return SR_ERR;
962 devc->analog_channels[ch->index] = ch->enabled;
963 }
964 } else if (ch->type == SR_CHANNEL_LOGIC) {
965 /* Only one list entry for DS1000D series. All channels are retrieved
966 * together when this entry is processed. */
967 if (ch->enabled && (
968 devc->model->series->protocol > PROTOCOL_V2 ||
969 !some_digital))
970 devc->enabled_channels = g_slist_append(
971 devc->enabled_channels, ch);
972 if (ch->enabled) {
973 some_digital = TRUE;
974 /* Turn on LA module if currently off. */
975 if (!devc->la_enabled) {
976 if (rigol_ds_config_set(sdi,
977 devc->model->series->protocol >= PROTOCOL_V4 ?
978 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
979 return SR_ERR;
980 devc->la_enabled = TRUE;
981 }
982 }
983 if (ch->enabled != devc->digital_channels[ch->index]) {
984 /* Enabled channel is currently disabled, or vice versa. */
985 if (rigol_ds_config_set(sdi,
986 devc->model->series->protocol >= PROTOCOL_V4 ?
987 ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
988 ch->enabled ? "ON" : "OFF") != SR_OK)
989 return SR_ERR;
990 devc->digital_channels[ch->index] = ch->enabled;
991 }
992 }
993 }
994
995 if (!devc->enabled_channels)
996 return SR_ERR;
997
998 /* Turn off LA module if on and no digital channels selected. */
999 if (devc->la_enabled && !some_digital)
1000 if (rigol_ds_config_set(sdi,
1001 devc->model->series->protocol >= PROTOCOL_V4 ?
1002 ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
1003 return SR_ERR;
1004
1005 /* Set memory mode. */
1006 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
1007 sr_err("Data source 'Segmented' not yet supported");
1008 return SR_ERR;
1009 }
1010
1011 devc->analog_frame_size = analog_frame_size(sdi);
1012 devc->digital_frame_size = digital_frame_size(sdi);
1013
1014 switch (devc->model->series->protocol) {
1015 case PROTOCOL_V2:
1016 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
1017 return SR_ERR;
1018 break;
1019 case PROTOCOL_V3:
1020 /* Apparently for the DS2000 the memory
1021 * depth can only be set in Running state -
1022 * this matches the behaviour of the UI. */
1023 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1024 return SR_ERR;
1025 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1026 devc->analog_frame_size) != SR_OK)
1027 return SR_ERR;
1028 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1029 return SR_ERR;
1030 break;
1031 default:
1032 break;
1033 }
1034
1035 if (devc->data_source == DATA_SOURCE_LIVE)
1036 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1037 return SR_ERR;
1038
1039 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1040 rigol_ds_receive, (void *)sdi);
1041
1042 /* Send header packet to the session bus. */
1043 std_session_send_df_header(cb_data, LOG_PREFIX);
1044
1045 devc->channel_entry = devc->enabled_channels;
1046
1047 if (rigol_ds_capture_start(sdi) != SR_OK)
1048 return SR_ERR;
1049
1050 /* Start of first frame. */
1051 packet.type = SR_DF_FRAME_BEGIN;
1052 sr_session_send(cb_data, &packet);
1053
1054 return SR_OK;
1055}
1056
1057static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
1058{
1059 struct dev_context *devc;
1060 struct sr_scpi_dev_inst *scpi;
1061 struct sr_datafeed_packet packet;
1062
1063 (void)cb_data;
1064
1065 devc = sdi->priv;
1066
1067 if (sdi->status != SR_ST_ACTIVE) {
1068 sr_err("Device inactive, can't stop acquisition.");
1069 return SR_ERR;
1070 }
1071
1072 /* End of last frame. */
1073 packet.type = SR_DF_END;
1074 sr_session_send(sdi, &packet);
1075
1076 g_slist_free(devc->enabled_channels);
1077 devc->enabled_channels = NULL;
1078 scpi = sdi->conn;
1079 sr_scpi_source_remove(sdi->session, scpi);
1080
1081 return SR_OK;
1082}
1083
1084SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1085 .name = "rigol-ds",
1086 .longname = "Rigol DS",
1087 .api_version = 1,
1088 .init = init,
1089 .cleanup = cleanup,
1090 .scan = scan,
1091 .dev_list = dev_list,
1092 .dev_clear = dev_clear,
1093 .config_get = config_get,
1094 .config_set = config_set,
1095 .config_list = config_list,
1096 .dev_open = dev_open,
1097 .dev_close = dev_close,
1098 .dev_acquisition_start = dev_acquisition_start,
1099 .dev_acquisition_stop = dev_acquisition_stop,
1100 .priv = NULL,
1101};
Hardware access and backend lib