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Introduce standard cleanup helper
[libsigrok.git] / src / hardware / rigol-ds / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <config.h>
23#include <fcntl.h>
24#include <unistd.h>
25#include <stdlib.h>
26#include <string.h>
27#include <strings.h>
28#include <math.h>
29#include <glib.h>
30#include <libsigrok/libsigrok.h>
31#include "libsigrok-internal.h"
32#include "scpi.h"
33#include "protocol.h"
34
35static const uint32_t scanopts[] = {
36 SR_CONF_CONN,
37 SR_CONF_SERIALCOMM
38};
39
40static const uint32_t devopts[] = {
41 SR_CONF_OSCILLOSCOPE,
42 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
43 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
44 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
45 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
46 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
47 SR_CONF_NUM_HDIV | SR_CONF_GET,
48 SR_CONF_SAMPLERATE | SR_CONF_GET,
49 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
50};
51
52static const uint32_t analog_devopts[] = {
53 SR_CONF_NUM_VDIV | SR_CONF_GET,
54 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
55 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
56};
57
58static const uint64_t timebases[][2] = {
59 /* nanoseconds */
60 { 1, 1000000000 },
61 { 2, 1000000000 },
62 { 5, 1000000000 },
63 { 10, 1000000000 },
64 { 20, 1000000000 },
65 { 50, 1000000000 },
66 { 100, 1000000000 },
67 { 500, 1000000000 },
68 /* microseconds */
69 { 1, 1000000 },
70 { 2, 1000000 },
71 { 5, 1000000 },
72 { 10, 1000000 },
73 { 20, 1000000 },
74 { 50, 1000000 },
75 { 100, 1000000 },
76 { 200, 1000000 },
77 { 500, 1000000 },
78 /* milliseconds */
79 { 1, 1000 },
80 { 2, 1000 },
81 { 5, 1000 },
82 { 10, 1000 },
83 { 20, 1000 },
84 { 50, 1000 },
85 { 100, 1000 },
86 { 200, 1000 },
87 { 500, 1000 },
88 /* seconds */
89 { 1, 1 },
90 { 2, 1 },
91 { 5, 1 },
92 { 10, 1 },
93 { 20, 1 },
94 { 50, 1 },
95 { 100, 1 },
96 { 200, 1 },
97 { 500, 1 },
98 { 1000, 1 },
99};
100
101static const uint64_t vdivs[][2] = {
102 /* microvolts */
103 { 500, 1000000 },
104 /* millivolts */
105 { 1, 1000 },
106 { 2, 1000 },
107 { 5, 1000 },
108 { 10, 1000 },
109 { 20, 1000 },
110 { 50, 1000 },
111 { 100, 1000 },
112 { 200, 1000 },
113 { 500, 1000 },
114 /* volts */
115 { 1, 1 },
116 { 2, 1 },
117 { 5, 1 },
118 { 10, 1 },
119 { 20, 1 },
120 { 50, 1 },
121 { 100, 1 },
122};
123
124#define NUM_TIMEBASE ARRAY_SIZE(timebases)
125#define NUM_VDIV ARRAY_SIZE(vdivs)
126
127static const char *trigger_sources[] = {
128 "CH1",
129 "CH2",
130 "CH3",
131 "CH4",
132 "EXT",
133 "AC Line",
134 "D0",
135 "D1",
136 "D2",
137 "D3",
138 "D4",
139 "D5",
140 "D6",
141 "D7",
142 "D8",
143 "D9",
144 "D10",
145 "D11",
146 "D12",
147 "D13",
148 "D14",
149 "D15",
150};
151
152static const char *trigger_slopes[] = {
153 "r",
154 "f",
155};
156
157static const char *coupling[] = {
158 "AC",
159 "DC",
160 "GND",
161};
162
163/* Do not change the order of entries */
164static const char *data_sources[] = {
165 "Live",
166 "Memory",
167 "Segmented",
168};
169
170enum vendor {
171 RIGOL,
172 AGILENT,
173};
174
175enum series {
176 VS5000,
177 DS1000,
178 DS2000,
179 DS2000A,
180 DSO1000,
181 DS1000Z,
182};
183
184/* short name, full name */
185static const struct rigol_ds_vendor supported_vendors[] = {
186 [RIGOL] = {"Rigol", "Rigol Technologies"},
187 [AGILENT] = {"Agilent", "Agilent Technologies"},
188};
189
190#define VENDOR(x) &supported_vendors[x]
191/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
192 * live waveform samples, memory buffer samples */
193static const struct rigol_ds_series supported_series[] = {
194 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
195 {50, 1}, {2, 1000}, 14, 2048, 0},
196 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
197 {50, 1}, {2, 1000}, 12, 600, 1048576},
198 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
199 {500, 1}, {500, 1000000}, 14, 1400, 14000},
200 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
201 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
202 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
203 {50, 1}, {2, 1000}, 12, 600, 20480},
204 [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
205 {50, 1}, {1, 1000}, 12, 1200, 12000000},
206};
207
208#define SERIES(x) &supported_series[x]
209/* series, model, min timebase, analog channels, digital */
210static const struct rigol_ds_model supported_models[] = {
211 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
212 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
213 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
214 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
215 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
216 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
217 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
218 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
219 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
220 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
221 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
222 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
223 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
224 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
225 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
226 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
227 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
228 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
229 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
230 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
231 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
232 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
233 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
234 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
235 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
236 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
237 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
238 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
239 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
240 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
241 {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
242 {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
243 {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
244 {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
245 {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
246 {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
247 {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
248 {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
249 {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
250};
251
252SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
253
254static void clear_helper(void *priv)
255{
256 struct dev_context *devc;
257 unsigned int i;
258
259 devc = priv;
260 g_free(devc->data);
261 g_free(devc->buffer);
262 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
263 g_free(devc->coupling[i]);
264 g_free(devc->trigger_source);
265 g_free(devc->trigger_slope);
266 g_free(devc->analog_groups);
267 g_free(devc);
268}
269
270static int dev_clear(const struct sr_dev_driver *di)
271{
272 return std_dev_clear(di, clear_helper);
273}
274
275static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
276{
277 return std_init(sr_ctx, di, LOG_PREFIX);
278}
279
280static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
281{
282 struct dev_context *devc;
283 struct sr_dev_inst *sdi;
284 struct sr_scpi_hw_info *hw_info;
285 struct sr_channel *ch;
286 long n[3];
287 unsigned int i;
288 const struct rigol_ds_model *model = NULL;
289 gchar *channel_name, **version;
290
291 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
292 sr_info("Couldn't get IDN response, retrying.");
293 sr_scpi_close(scpi);
294 sr_scpi_open(scpi);
295 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
296 sr_info("Couldn't get IDN response.");
297 return NULL;
298 }
299 }
300
301 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
302 if (!g_ascii_strcasecmp(hw_info->manufacturer,
303 supported_models[i].series->vendor->full_name) &&
304 !strcmp(hw_info->model, supported_models[i].name)) {
305 model = &supported_models[i];
306 break;
307 }
308 }
309
310 if (!model) {
311 sr_scpi_hw_info_free(hw_info);
312 return NULL;
313 }
314
315 sdi = g_malloc0(sizeof(struct sr_dev_inst));
316 sdi->vendor = g_strdup(model->series->vendor->name);
317 sdi->model = g_strdup(model->name);
318 sdi->version = g_strdup(hw_info->firmware_version);
319 sdi->conn = scpi;
320 sdi->driver = &rigol_ds_driver_info;
321 sdi->inst_type = SR_INST_SCPI;
322 sdi->serial_num = g_strdup(hw_info->serial_number);
323 devc = g_malloc0(sizeof(struct dev_context));
324 devc->limit_frames = 0;
325 devc->model = model;
326 devc->format = model->series->format;
327
328 /* DS1000 models with firmware before 0.2.4 used the old data format. */
329 if (model->series == SERIES(DS1000)) {
330 version = g_strsplit(hw_info->firmware_version, ".", 0);
331 do {
332 if (!version[0] || !version[1] || !version[2])
333 break;
334 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
335 break;
336 for (i = 0; i < 3; i++) {
337 if (sr_atol(version[i], &n[i]) != SR_OK)
338 break;
339 }
340 if (i != 3)
341 break;
342 scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
343 if (scpi->firmware_version < 24) {
344 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
345 devc->format = FORMAT_RAW;
346 }
347 break;
348 } while (0);
349 g_strfreev(version);
350 }
351
352 sr_scpi_hw_info_free(hw_info);
353
354 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
355 model->analog_channels);
356
357 for (i = 0; i < model->analog_channels; i++) {
358 channel_name = g_strdup_printf("CH%d", i + 1);
359 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
360
361 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
362
363 devc->analog_groups[i]->name = channel_name;
364 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
365 sdi->channel_groups = g_slist_append(sdi->channel_groups,
366 devc->analog_groups[i]);
367 }
368
369 if (devc->model->has_digital) {
370 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
371
372 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
373 channel_name = g_strdup_printf("D%d", i);
374 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
375 g_free(channel_name);
376 devc->digital_group->channels = g_slist_append(
377 devc->digital_group->channels, ch);
378 }
379 devc->digital_group->name = g_strdup("LA");
380 sdi->channel_groups = g_slist_append(sdi->channel_groups,
381 devc->digital_group);
382 }
383
384 for (i = 0; i < NUM_TIMEBASE; i++) {
385 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
386 devc->timebases = &timebases[i];
387 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
388 devc->num_timebases = &timebases[i] - devc->timebases + 1;
389 }
390
391 for (i = 0; i < NUM_VDIV; i++) {
392 if (!memcmp(&devc->model->series->min_vdiv,
393 &vdivs[i], sizeof(uint64_t[2]))) {
394 devc->vdivs = &vdivs[i];
395 devc->num_vdivs = NUM_VDIV - i;
396 }
397 }
398
399 devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
400 devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
401
402 devc->data_source = DATA_SOURCE_LIVE;
403
404 sdi->priv = devc;
405
406 return sdi;
407}
408
409static GSList *scan(struct sr_dev_driver *di, GSList *options)
410{
411 return sr_scpi_scan(di->context, options, probe_device);
412}
413
414static GSList *dev_list(const struct sr_dev_driver *di)
415{
416 return ((struct drv_context *)(di->context))->instances;
417}
418
419static int dev_open(struct sr_dev_inst *sdi)
420{
421 int ret;
422 struct sr_scpi_dev_inst *scpi = sdi->conn;
423
424 if ((ret = sr_scpi_open(scpi)) < 0) {
425 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
426 return SR_ERR;
427 }
428
429 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
430 sr_err("Failed to get device config: %s.", sr_strerror(ret));
431 return SR_ERR;
432 }
433
434 sdi->status = SR_ST_ACTIVE;
435
436 return SR_OK;
437}
438
439static int dev_close(struct sr_dev_inst *sdi)
440{
441 struct sr_scpi_dev_inst *scpi;
442 struct dev_context *devc;
443
444 if (sdi->status != SR_ST_ACTIVE)
445 return SR_ERR_DEV_CLOSED;
446
447 scpi = sdi->conn;
448 devc = sdi->priv;
449
450 if (devc->model->series->protocol == PROTOCOL_V2)
451 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
452
453 if (scpi) {
454 if (sr_scpi_close(scpi) < 0)
455 return SR_ERR;
456 sdi->status = SR_ST_INACTIVE;
457 }
458
459 return SR_OK;
460}
461
462static int analog_frame_size(const struct sr_dev_inst *sdi)
463{
464 struct dev_context *devc = sdi->priv;
465 struct sr_channel *ch;
466 int analog_channels = 0;
467 GSList *l;
468
469 for (l = sdi->channels; l; l = l->next) {
470 ch = l->data;
471 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
472 analog_channels++;
473 }
474
475 if (analog_channels == 0)
476 return 0;
477
478 switch (devc->data_source) {
479 case DATA_SOURCE_LIVE:
480 return devc->model->series->live_samples;
481 case DATA_SOURCE_MEMORY:
482 return devc->model->series->buffer_samples / analog_channels;
483 default:
484 return 0;
485 }
486}
487
488static int digital_frame_size(const struct sr_dev_inst *sdi)
489{
490 struct dev_context *devc = sdi->priv;
491
492 switch (devc->data_source) {
493 case DATA_SOURCE_LIVE:
494 return devc->model->series->live_samples * 2;
495 case DATA_SOURCE_MEMORY:
496 return devc->model->series->buffer_samples * 2;
497 default:
498 return 0;
499 }
500}
501
502static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
503 const struct sr_channel_group *cg)
504{
505 struct dev_context *devc;
506 struct sr_channel *ch;
507 const char *tmp_str;
508 uint64_t samplerate;
509 int analog_channel = -1;
510 float smallest_diff = INFINITY;
511 int idx = -1;
512 unsigned i;
513
514 if (!sdi || !(devc = sdi->priv))
515 return SR_ERR_ARG;
516
517 /* If a channel group is specified, it must be a valid one. */
518 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
519 sr_err("Invalid channel group specified.");
520 return SR_ERR;
521 }
522
523 if (cg) {
524 ch = g_slist_nth_data(cg->channels, 0);
525 if (!ch)
526 return SR_ERR;
527 if (ch->type == SR_CHANNEL_ANALOG) {
528 if (ch->name[2] < '1' || ch->name[2] > '4')
529 return SR_ERR;
530 analog_channel = ch->name[2] - '1';
531 }
532 }
533
534 switch (key) {
535 case SR_CONF_NUM_HDIV:
536 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
537 break;
538 case SR_CONF_NUM_VDIV:
539 *data = g_variant_new_int32(devc->num_vdivs);
540 break;
541 case SR_CONF_DATA_SOURCE:
542 if (devc->data_source == DATA_SOURCE_LIVE)
543 *data = g_variant_new_string("Live");
544 else if (devc->data_source == DATA_SOURCE_MEMORY)
545 *data = g_variant_new_string("Memory");
546 else
547 *data = g_variant_new_string("Segmented");
548 break;
549 case SR_CONF_SAMPLERATE:
550 if (devc->data_source == DATA_SOURCE_LIVE) {
551 samplerate = analog_frame_size(sdi) /
552 (devc->timebase * devc->model->series->num_horizontal_divs);
553 *data = g_variant_new_uint64(samplerate);
554 } else {
555 sr_dbg("Unknown data source: %d.", devc->data_source);
556 return SR_ERR_NA;
557 }
558 break;
559 case SR_CONF_TRIGGER_SOURCE:
560 if (!strcmp(devc->trigger_source, "ACL"))
561 tmp_str = "AC Line";
562 else if (!strcmp(devc->trigger_source, "CHAN1"))
563 tmp_str = "CH1";
564 else if (!strcmp(devc->trigger_source, "CHAN2"))
565 tmp_str = "CH2";
566 else if (!strcmp(devc->trigger_source, "CHAN3"))
567 tmp_str = "CH3";
568 else if (!strcmp(devc->trigger_source, "CHAN4"))
569 tmp_str = "CH4";
570 else
571 tmp_str = devc->trigger_source;
572 *data = g_variant_new_string(tmp_str);
573 break;
574 case SR_CONF_TRIGGER_SLOPE:
575 if (!strncmp(devc->trigger_slope, "POS", 3)) {
576 tmp_str = "r";
577 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
578 tmp_str = "f";
579 } else {
580 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
581 return SR_ERR_NA;
582 }
583 *data = g_variant_new_string(tmp_str);
584 break;
585 case SR_CONF_TIMEBASE:
586 for (i = 0; i < devc->num_timebases; i++) {
587 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
588 float diff = fabs(devc->timebase - tb);
589 if (diff < smallest_diff) {
590 smallest_diff = diff;
591 idx = i;
592 }
593 }
594 if (idx < 0) {
595 sr_dbg("Negative timebase index: %d.", idx);
596 return SR_ERR_NA;
597 }
598 *data = g_variant_new("(tt)", devc->timebases[idx][0],
599 devc->timebases[idx][1]);
600 break;
601 case SR_CONF_VDIV:
602 if (analog_channel < 0) {
603 sr_dbg("Negative analog channel: %d.", analog_channel);
604 return SR_ERR_NA;
605 }
606 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
607 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
608 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
609 if (diff < smallest_diff) {
610 smallest_diff = diff;
611 idx = i;
612 }
613 }
614 if (idx < 0) {
615 sr_dbg("Negative vdiv index: %d.", idx);
616 return SR_ERR_NA;
617 }
618 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
619 break;
620 case SR_CONF_COUPLING:
621 if (analog_channel < 0) {
622 sr_dbg("Negative analog channel: %d.", analog_channel);
623 return SR_ERR_NA;
624 }
625 *data = g_variant_new_string(devc->coupling[analog_channel]);
626 break;
627 default:
628 return SR_ERR_NA;
629 }
630
631 return SR_OK;
632}
633
634static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
635 const struct sr_channel_group *cg)
636{
637 struct dev_context *devc;
638 uint64_t p, q;
639 double t_dbl;
640 unsigned int i, j;
641 int ret;
642 const char *tmp_str;
643 char buffer[16];
644
645 if (!(devc = sdi->priv))
646 return SR_ERR_ARG;
647
648 if (sdi->status != SR_ST_ACTIVE)
649 return SR_ERR_DEV_CLOSED;
650
651 /* If a channel group is specified, it must be a valid one. */
652 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
653 sr_err("Invalid channel group specified.");
654 return SR_ERR;
655 }
656
657 ret = SR_OK;
658 switch (key) {
659 case SR_CONF_LIMIT_FRAMES:
660 devc->limit_frames = g_variant_get_uint64(data);
661 break;
662 case SR_CONF_TRIGGER_SLOPE:
663 tmp_str = g_variant_get_string(data, NULL);
664
665 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
666 sr_err("Unknown trigger slope: '%s'.",
667 (tmp_str) ? tmp_str : "NULL");
668 return SR_ERR_ARG;
669 }
670
671 g_free(devc->trigger_slope);
672 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
673 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
674 break;
675 case SR_CONF_HORIZ_TRIGGERPOS:
676 t_dbl = g_variant_get_double(data);
677 if (t_dbl < 0.0 || t_dbl > 1.0) {
678 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
679 return SR_ERR;
680 }
681 devc->horiz_triggerpos = t_dbl;
682 /* We have the trigger offset as a percentage of the frame, but
683 * need to express this in seconds. */
684 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
685 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
686 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
687 break;
688 case SR_CONF_TIMEBASE:
689 g_variant_get(data, "(tt)", &p, &q);
690 for (i = 0; i < devc->num_timebases; i++) {
691 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
692 devc->timebase = (float)p / q;
693 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
694 devc->timebase);
695 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
696 break;
697 }
698 }
699 if (i == devc->num_timebases) {
700 sr_err("Invalid timebase index: %d.", i);
701 ret = SR_ERR_ARG;
702 }
703 break;
704 case SR_CONF_TRIGGER_SOURCE:
705 tmp_str = g_variant_get_string(data, NULL);
706 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
707 if (!strcmp(trigger_sources[i], tmp_str)) {
708 g_free(devc->trigger_source);
709 devc->trigger_source = g_strdup(trigger_sources[i]);
710 if (!strcmp(devc->trigger_source, "AC Line"))
711 tmp_str = "ACL";
712 else if (!strcmp(devc->trigger_source, "CH1"))
713 tmp_str = "CHAN1";
714 else if (!strcmp(devc->trigger_source, "CH2"))
715 tmp_str = "CHAN2";
716 else if (!strcmp(devc->trigger_source, "CH3"))
717 tmp_str = "CHAN3";
718 else if (!strcmp(devc->trigger_source, "CH4"))
719 tmp_str = "CHAN4";
720 else
721 tmp_str = (char *)devc->trigger_source;
722 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
723 break;
724 }
725 }
726 if (i == ARRAY_SIZE(trigger_sources)) {
727 sr_err("Invalid trigger source index: %d.", i);
728 ret = SR_ERR_ARG;
729 }
730 break;
731 case SR_CONF_VDIV:
732 if (!cg) {
733 sr_err("No channel group specified.");
734 return SR_ERR_CHANNEL_GROUP;
735 }
736 g_variant_get(data, "(tt)", &p, &q);
737 for (i = 0; i < devc->model->analog_channels; i++) {
738 if (cg == devc->analog_groups[i]) {
739 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
740 if (vdivs[j][0] != p || vdivs[j][1] != q)
741 continue;
742 devc->vdiv[i] = (float)p / q;
743 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
744 devc->vdiv[i]);
745 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
746 buffer);
747 }
748 sr_err("Invalid vdiv index: %d.", j);
749 return SR_ERR_ARG;
750 }
751 }
752 sr_dbg("Didn't set vdiv, unknown channel(group).");
753 return SR_ERR_NA;
754 case SR_CONF_COUPLING:
755 if (!cg) {
756 sr_err("No channel group specified.");
757 return SR_ERR_CHANNEL_GROUP;
758 }
759 tmp_str = g_variant_get_string(data, NULL);
760 for (i = 0; i < devc->model->analog_channels; i++) {
761 if (cg == devc->analog_groups[i]) {
762 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
763 if (!strcmp(tmp_str, coupling[j])) {
764 g_free(devc->coupling[i]);
765 devc->coupling[i] = g_strdup(coupling[j]);
766 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
767 devc->coupling[i]);
768 }
769 }
770 sr_err("Invalid coupling index: %d.", j);
771 return SR_ERR_ARG;
772 }
773 }
774 sr_dbg("Didn't set coupling, unknown channel(group).");
775 return SR_ERR_NA;
776 case SR_CONF_DATA_SOURCE:
777 tmp_str = g_variant_get_string(data, NULL);
778 if (!strcmp(tmp_str, "Live"))
779 devc->data_source = DATA_SOURCE_LIVE;
780 else if (devc->model->series->protocol >= PROTOCOL_V2
781 && !strcmp(tmp_str, "Memory"))
782 devc->data_source = DATA_SOURCE_MEMORY;
783 else if (devc->model->series->protocol >= PROTOCOL_V3
784 && !strcmp(tmp_str, "Segmented"))
785 devc->data_source = DATA_SOURCE_SEGMENTED;
786 else {
787 sr_err("Unknown data source: '%s'.", tmp_str);
788 return SR_ERR;
789 }
790 break;
791 default:
792 return SR_ERR_NA;
793 }
794
795 return ret;
796}
797
798static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
799 const struct sr_channel_group *cg)
800{
801 GVariant *tuple, *rational[2];
802 GVariantBuilder gvb;
803 unsigned int i;
804 struct dev_context *devc = NULL;
805
806 if (key == SR_CONF_SCAN_OPTIONS) {
807 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
808 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
809 return SR_OK;
810 } else if (key == SR_CONF_DEVICE_OPTIONS && !cg) {
811 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
812 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
813 return SR_OK;
814 }
815
816 /* Every other option requires a valid device instance. */
817 if (!sdi || !(devc = sdi->priv))
818 return SR_ERR_ARG;
819
820 /* If a channel group is specified, it must be a valid one. */
821 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
822 sr_err("Invalid channel group specified.");
823 return SR_ERR;
824 }
825
826 switch (key) {
827 case SR_CONF_DEVICE_OPTIONS:
828 if (!cg) {
829 sr_err("No channel group specified.");
830 return SR_ERR_CHANNEL_GROUP;
831 }
832 if (cg == devc->digital_group) {
833 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
834 NULL, 0, sizeof(uint32_t));
835 return SR_OK;
836 } else {
837 for (i = 0; i < devc->model->analog_channels; i++) {
838 if (cg == devc->analog_groups[i]) {
839 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
840 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
841 return SR_OK;
842 }
843 }
844 return SR_ERR_NA;
845 }
846 break;
847 case SR_CONF_COUPLING:
848 if (!cg) {
849 sr_err("No channel group specified.");
850 return SR_ERR_CHANNEL_GROUP;
851 }
852 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
853 break;
854 case SR_CONF_VDIV:
855 if (!devc)
856 /* Can't know this until we have the exact model. */
857 return SR_ERR_ARG;
858 if (!cg) {
859 sr_err("No channel group specified.");
860 return SR_ERR_CHANNEL_GROUP;
861 }
862 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
863 for (i = 0; i < devc->num_vdivs; i++) {
864 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
865 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
866 tuple = g_variant_new_tuple(rational, 2);
867 g_variant_builder_add_value(&gvb, tuple);
868 }
869 *data = g_variant_builder_end(&gvb);
870 break;
871 case SR_CONF_TIMEBASE:
872 if (!devc)
873 /* Can't know this until we have the exact model. */
874 return SR_ERR_ARG;
875 if (devc->num_timebases <= 0)
876 return SR_ERR_NA;
877 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
878 for (i = 0; i < devc->num_timebases; i++) {
879 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
880 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
881 tuple = g_variant_new_tuple(rational, 2);
882 g_variant_builder_add_value(&gvb, tuple);
883 }
884 *data = g_variant_builder_end(&gvb);
885 break;
886 case SR_CONF_TRIGGER_SOURCE:
887 if (!devc)
888 /* Can't know this until we have the exact model. */
889 return SR_ERR_ARG;
890 *data = g_variant_new_strv(trigger_sources,
891 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
892 break;
893 case SR_CONF_TRIGGER_SLOPE:
894 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
895 break;
896 case SR_CONF_DATA_SOURCE:
897 if (!devc)
898 /* Can't know this until we have the exact model. */
899 return SR_ERR_ARG;
900 switch (devc->model->series->protocol) {
901 case PROTOCOL_V1:
902 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
903 break;
904 case PROTOCOL_V2:
905 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
906 break;
907 default:
908 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
909 break;
910 }
911 break;
912 default:
913 return SR_ERR_NA;
914 }
915
916 return SR_OK;
917}
918
919static int dev_acquisition_start(const struct sr_dev_inst *sdi)
920{
921 struct sr_scpi_dev_inst *scpi;
922 struct dev_context *devc;
923 struct sr_channel *ch;
924 struct sr_datafeed_packet packet;
925 gboolean some_digital;
926 GSList *l;
927
928 if (sdi->status != SR_ST_ACTIVE)
929 return SR_ERR_DEV_CLOSED;
930
931 scpi = sdi->conn;
932 devc = sdi->priv;
933
934 devc->num_frames = 0;
935
936 some_digital = FALSE;
937 for (l = sdi->channels; l; l = l->next) {
938 ch = l->data;
939 sr_dbg("handling channel %s", ch->name);
940 if (ch->type == SR_CHANNEL_ANALOG) {
941 if (ch->enabled)
942 devc->enabled_channels = g_slist_append(
943 devc->enabled_channels, ch);
944 if (ch->enabled != devc->analog_channels[ch->index]) {
945 /* Enabled channel is currently disabled, or vice versa. */
946 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
947 ch->enabled ? "ON" : "OFF") != SR_OK)
948 return SR_ERR;
949 devc->analog_channels[ch->index] = ch->enabled;
950 }
951 } else if (ch->type == SR_CHANNEL_LOGIC) {
952 /* Only one list entry for DS1000D series. All channels are retrieved
953 * together when this entry is processed. */
954 if (ch->enabled && (
955 devc->model->series->protocol > PROTOCOL_V2 ||
956 !some_digital))
957 devc->enabled_channels = g_slist_append(
958 devc->enabled_channels, ch);
959 if (ch->enabled) {
960 some_digital = TRUE;
961 /* Turn on LA module if currently off. */
962 if (!devc->la_enabled) {
963 if (rigol_ds_config_set(sdi,
964 devc->model->series->protocol >= PROTOCOL_V4 ?
965 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
966 return SR_ERR;
967 devc->la_enabled = TRUE;
968 }
969 }
970 if (ch->enabled != devc->digital_channels[ch->index]) {
971 /* Enabled channel is currently disabled, or vice versa. */
972 if (rigol_ds_config_set(sdi,
973 devc->model->series->protocol >= PROTOCOL_V4 ?
974 ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
975 ch->enabled ? "ON" : "OFF") != SR_OK)
976 return SR_ERR;
977 devc->digital_channels[ch->index] = ch->enabled;
978 }
979 }
980 }
981
982 if (!devc->enabled_channels)
983 return SR_ERR;
984
985 /* Turn off LA module if on and no digital channels selected. */
986 if (devc->la_enabled && !some_digital)
987 if (rigol_ds_config_set(sdi,
988 devc->model->series->protocol >= PROTOCOL_V4 ?
989 ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
990 return SR_ERR;
991
992 /* Set memory mode. */
993 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
994 sr_err("Data source 'Segmented' not yet supported");
995 return SR_ERR;
996 }
997
998 devc->analog_frame_size = analog_frame_size(sdi);
999 devc->digital_frame_size = digital_frame_size(sdi);
1000
1001 switch (devc->model->series->protocol) {
1002 case PROTOCOL_V2:
1003 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
1004 return SR_ERR;
1005 break;
1006 case PROTOCOL_V3:
1007 /* Apparently for the DS2000 the memory
1008 * depth can only be set in Running state -
1009 * this matches the behaviour of the UI. */
1010 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1011 return SR_ERR;
1012 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1013 devc->analog_frame_size) != SR_OK)
1014 return SR_ERR;
1015 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1016 return SR_ERR;
1017 break;
1018 default:
1019 break;
1020 }
1021
1022 if (devc->data_source == DATA_SOURCE_LIVE)
1023 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1024 return SR_ERR;
1025
1026 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1027 rigol_ds_receive, (void *)sdi);
1028
1029 std_session_send_df_header(sdi, LOG_PREFIX);
1030
1031 devc->channel_entry = devc->enabled_channels;
1032
1033 if (rigol_ds_capture_start(sdi) != SR_OK)
1034 return SR_ERR;
1035
1036 /* Start of first frame. */
1037 packet.type = SR_DF_FRAME_BEGIN;
1038 sr_session_send(sdi, &packet);
1039
1040 return SR_OK;
1041}
1042
1043static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1044{
1045 struct dev_context *devc;
1046 struct sr_scpi_dev_inst *scpi;
1047
1048 devc = sdi->priv;
1049
1050 if (sdi->status != SR_ST_ACTIVE) {
1051 sr_err("Device inactive, can't stop acquisition.");
1052 return SR_ERR;
1053 }
1054
1055 std_session_send_df_end(sdi, LOG_PREFIX);
1056
1057 g_slist_free(devc->enabled_channels);
1058 devc->enabled_channels = NULL;
1059 scpi = sdi->conn;
1060 sr_scpi_source_remove(sdi->session, scpi);
1061
1062 return SR_OK;
1063}
1064
1065SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1066 .name = "rigol-ds",
1067 .longname = "Rigol DS",
1068 .api_version = 1,
1069 .init = init,
1070 .cleanup = std_cleanup,
1071 .scan = scan,
1072 .dev_list = dev_list,
1073 .dev_clear = dev_clear,
1074 .config_get = config_get,
1075 .config_set = config_set,
1076 .config_list = config_list,
1077 .dev_open = dev_open,
1078 .dev_close = dev_close,
1079 .dev_acquisition_start = dev_acquisition_start,
1080 .dev_acquisition_stop = dev_acquisition_stop,
1081 .context = NULL,
1082};
Hardware access and backend lib